JPS5916056U - plasma display panel - Google Patents

plasma display panel

Info

Publication number
JPS5916056U
JPS5916056U JP1982111224U JP11122482U JPS5916056U JP S5916056 U JPS5916056 U JP S5916056U JP 1982111224 U JP1982111224 U JP 1982111224U JP 11122482 U JP11122482 U JP 11122482U JP S5916056 U JPS5916056 U JP S5916056U
Authority
JP
Japan
Prior art keywords
display panel
plasma display
gap
opposing gap
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982111224U
Other languages
Japanese (ja)
Inventor
博 山本
亀山 茂樹
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP1982111224U priority Critical patent/JPS5916056U/en
Publication of JPS5916056U publication Critical patent/JPS5916056U/en
Pending legal-status Critical Current

Links

Landscapes

  • Gas-Filled Discharge Tubes (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は表示パネルの基本的構成図、第2図と第3図は
本考案の実施例としての中空スペーサ斜視図とパネル基
体の断面図である。 図中、1と1′はパネル基板、2と3は電極、4は絶縁
層、6は微細空隙又は空隙、9は本考案の中空スペーサ
、及び14は9の配置間隔である。
FIG. 1 is a basic configuration diagram of a display panel, and FIGS. 2 and 3 are a perspective view of a hollow spacer and a sectional view of a panel base as an embodiment of the present invention. In the figure, 1 and 1' are panel substrates, 2 and 3 are electrodes, 4 is an insulating layer, 6 is a fine gap or gap, 9 is a hollow spacer of the present invention, and 14 is an arrangement interval of 9.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 微細空隙でもって対向する夫々の基板面上に放電電極と
絶縁層が配置され且つ前記基板の対向空隙に放電ガスを
気密封止せる表示パネルにおいて、前記の対向空隙に中
空スペーサが挿入されてなることを特徴とするプラズマ
ディスプレイパネル。
A display panel in which a discharge electrode and an insulating layer are disposed on the surfaces of respective substrates facing each other with a fine gap, and a discharge gas is hermetically sealed in the opposing gap of the substrate, and a hollow spacer is inserted into the opposing gap. A plasma display panel characterized by:
JP1982111224U 1982-07-22 1982-07-22 plasma display panel Pending JPS5916056U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982111224U JPS5916056U (en) 1982-07-22 1982-07-22 plasma display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982111224U JPS5916056U (en) 1982-07-22 1982-07-22 plasma display panel

Publications (1)

Publication Number Publication Date
JPS5916056U true JPS5916056U (en) 1984-01-31

Family

ID=30258344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982111224U Pending JPS5916056U (en) 1982-07-22 1982-07-22 plasma display panel

Country Status (1)

Country Link
JP (1) JPS5916056U (en)

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