JPS59154954U - Power monitor circuit - Google Patents
Power monitor circuitInfo
- Publication number
- JPS59154954U JPS59154954U JP1983048301U JP4830183U JPS59154954U JP S59154954 U JPS59154954 U JP S59154954U JP 1983048301 U JP1983048301 U JP 1983048301U JP 4830183 U JP4830183 U JP 4830183U JP S59154954 U JPS59154954 U JP S59154954U
- Authority
- JP
- Japan
- Prior art keywords
- power monitor
- monitor circuit
- diode
- pass filter
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来回路の回路構成図、第２図は従来回路の特
性を示す図、第３図は来者実弟１の実施例の回路構成図
、第４図は来者実弟１の実施例の動作を示す図、第５図
は来者実弟２の実施例の回路構成図、第６図は来者実弟
２の実施例の動作を示す図。
１・・・・・・検波ダイオード、２・・・・・・低域通
過ろ波器、３・・・・・・抵抗、４・・・・・・ＤＣＩ
Ｊターン、５・・・・・・抵抗、６・・・・・・スイッ
チング・ダイオード、７・・・・・・ツェナー・ダイオ
ード。
／Fig. 1 is a circuit configuration diagram of a conventional circuit, Fig. 2 is a diagram showing the characteristics of a conventional circuit, Fig. 3 is a circuit configuration diagram of an embodiment of the visitor's younger brother 1, and Fig. 4 is an example of the embodiment of the visitor's younger brother 1. FIG. 5 is a circuit configuration diagram of the embodiment of the visitor's younger brother 2, and FIG. 6 is a diagram showing the operation of the embodiment of the visitor's younger brother 2. 1...Detection diode, 2...Low pass filter, 3...Resistor, 4...DCI
J-turn, 5...Resistor, 6...Switching diode, 7...Zener diode. /
Claims (1)
ろ波器と、前記検波ダイオードの入力に接続されるＤＣ
ＩＪターン回路と、前記低域ろ波器の出力に接続される
負荷とからなるパワー・モニタ回路において前記負荷が
、ダイオ−Ｖと、このダイオードに直列、並列あるいは
直並列に接続した抵抗とにより構成されたことを特徴と
するパワー・モニタ回路。a detection diode, a low-pass filter for filtering the detection diode, and a DC connected to the input of the detection diode.
In a power monitor circuit consisting of an IJ turn circuit and a load connected to the output of the low-pass filter, the load is composed of a diode-V and a resistor connected in series, parallel, or series-parallel to the diode. A power monitor circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983048301U JPS59154954U (en) | 1983-04-01 | 1983-04-01 | Power monitor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983048301U JPS59154954U (en) | 1983-04-01 | 1983-04-01 | Power monitor circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59154954U true JPS59154954U (en) | 1984-10-17 |
Family
ID=30178832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983048301U Pending JPS59154954U (en) | 1983-04-01 | 1983-04-01 | Power monitor circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59154954U (en) |
-
1983
- 1983-04-01 JP JP1983048301U patent/JPS59154954U/en active Pending
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