JPS59154844A - Packet communication device - Google Patents

Abstract

PURPOSE:To attain packet communication by performing efficient packet transmission suitable for channel and traffic state, and using in common one communication medium such as communication satellife by plural users. CONSTITUTION:A transmission data is applied from an input terminal 21 and transmitted through a modulator via a buffer 27, a gate circuit 28 and an output terminal 23. A demodulated signal is applied to an address filter 33 as the receiving signal and when the signal is addressed to itself, the signal is fetched from a terminal 22 and other signals are neglected. When the transmitted signal and the received signal are not coincident, it is discriminated as collision by a collision detector 31 and retransmission is attained. The transmission is performed only when a gate circuit 28 is opened. A control circuit 29 computes the probability of opening the gate 28 depending on the state of use and collision at each channel and controls it.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a packet communication device that performs packet communication by sharing one communication medium among a plurality of users.

The TDMA (time division multiplexing) system and the ALOHA system are well known as packet communication systems that use an artificial satellite as a communication medium as shown in FIG.

In the former case, the channel is divided into time slots for each packet transmission time, and if the number of users is N (a positive integer), N slots are considered to be one frame, and each time slot in the frame is fixed for each user. It was assigned to This method is very #t1 when the number of users is small and the traffic of each user is large, but when the number of users is large and the traffic of each user is small, the channel utilization rate is very low. , has the disadvantage that the average delay time is very large. It is also inconvenient when there is an imbalance in traffic. The latter ALOHA method includes the first pure ALOHA method and its improved version, slot AL.
There is an OHA method. Here, the slotted ALOHA method will be described. In this method, as shown in Figure 2, the channel is cut by time suit (K) in the same way as in the TDMA method, and each user, if there is a transmission request, synchronizes with this time slot and immediately sends out a packet. If a collision occurs while a user is transmitting, retransmission is performed at random.

This method is excellent when the number of users is large and the traffic for each user is small. However, channel capacity 1
On the other hand, the maximum throughput of this method is as low as 0368, and if transmission exceeds this, collisions will occur and a deadlock state will occur.

Therefore, neither method is suitable when the number of users is large and the traffic for each user varies over a wide range. In this case, depending on the traffic, A
Possible methods include LOHA mode and TDMA mode. The patent application No. 101913/1983 for the patent "Multi-access system" that was filed earlier is based on the above idea, and when low maintenance is required, ALOT
(It becomes A mode and TD when there is high traffic) It becomes French mode. As shown in Fig. 3, this main formula requires a time of 1
Cut into time slots for each packet transmission time and M slot.

Now, the parameter P of user j corresponding to slot l is
, then if user j has a transmission request including retransmission in slot l'i, it will transmit with probability Pij.If the sent packets collide on the channel, Sq y ) AT , 0T (same as A method,
'P is extended and retransmitted according to a certain distribution.

Here we show an algorithm for adjusting P, . The first column shows the basic algorithm, and then the improved constrained algorithm. The basic algorithm is PT±1-P
, τ+αδ9.・・・・・・(1) IJ
It is expressed as IJ I J.

T indicates time, the unit is frame (M slot)
Dechiru. α is a small positive number and is called the Shimoji positive coefficient. or,
Since the parameters (P, j) represent probabilities, constraints are placed outside the above algorithm.

Now, I think about the time of low traffic and ivy. At this time, the channel is often empty, so the parameters P, j
are all modified in the direction of increase, and eventually become Pij-1 due to the constraint of equation (3). This means that the speed value request is l
-1.This is a traditional suit because it can be sent immediately)
The operation is similar to the ALOHA method. This state is called the J SO lower AT, OHA mode.

Next, consider the case of high traffic. First AT, 0) TA
mode, collisions occur frequently and all parameters (P, j) become smaller by one. When the size decreases to a certain extent, successful packets appear. Now, suppose that the packet sent by user j to slot 1 is successful, the parameter Pij increases, and the other parameters "ik(M'j
) will decrease. As a result of this K, the opportunity for user j to send out slot iK increases, and the opportunity for other users to send out slot iK decreases, so the packets sent by user j are more likely to succeed. As a result, the parameters P, j of user j continue to increase to Ptj-1, and the parameters P of other users
, k(k/j) continues to decrease and becomes Pik-O(k/j). Once determined in this way, no collision will occur in slot i. The parameters of the other slots are determined in the same way, and the system that avoids the Ii collision is marked as a usage.

9 is the behavior of the basic algorithm. By the way +B
(7”) *: This algorithm has several degrees of freedom, so it is possible for a user to occupy the left side of a channel and shut out users in the same channel.This tendency is particularly strong when the traffic is unbalanced. Therefore, when actually applying it, it is desirable to attach some kind of constraint.The conventional method described above is as follows.
・(4) Created 1=11j- and made the parameter move within that range.
It is something. This constraint condition certainly suppressed the phenomenon of locking out J5, but the dispersion in the number of slots occupied by high-traffic users still remained. Some users will be able to occupy at most one slot, while others will be able to occupy only one slot at most.

SUMMARY OF THE INVENTION An object of the present invention is to provide a packet countertransmission device f that takes a low-traffic switching ALOHA mode and occupies a number of slots depending on the user's communication needs during high traffic.

The above objective can be achieved by updating a plurality of parameters that control the amount of access by using, in addition to the information obtained from the channel, a value determined according to the degree of communication demand. 1
Example 1: It is conceivable to use the arrival frequency of packets as the required degree of communication.

In other words, as a constraint condition, 1φ ΣP j−xij2−01M j−1〜N ・・・・・・
Put (5). σ is the frequency at which packets arrive at one slot for user j, and 09M, which is multiplied by M, indicates the number of slots required by user j. Therefore (5)
Due to the constraints of the equation, at least f of the arriving packets will necessarily access the channel on average. The algorithm to actually see this is given by. However, β is a small positive number. ko<7) 7/)-1'su'1"(h"ru1 sea urchin・kopij<a,"If λ,
increases, P + j is modified in the direction of increasing I, X, P month ≧ "jM" is maintained.Hereinafter, one embodiment in which the present invention is applied to time axis multiplexing will be described in detail with reference to the drawings. , reveal.

FIG. 4 is a basic configuration diagram of a wireless terminal. Terminal 1 is an input/output terminal and is connected to a data terminal or the like. The interface section 2 condenses the data sent from the data terminal through the terminal 1 into packets, and sends the data to the next network control section 3.
It also disassembles the packets sent from the network control unit 3 and sends them to the data terminal through the terminal 1. The network control section 3 mainly performs access control, and the modulation/demodulation section 4 performs word modulation and harmonization.

The RF section 5 receives the IF (intermediate frequency) sent from the modulation/demodulation section 4.
The frequency of the signal is raised to the transmission frequency, radiated into the air through an antenna, received by the antenna, and the frequency of the left received signal is lowered to the IF frequency and sent to the modulation/demodulation section 4.

The above basic configuration is the same as the ALOHA system, but the internals of the network control unit 3 and modulation/demodulation s4 are significantly different. Figure 5 (9) is a block diagram of the modulation/demodulation section 4. The terminals 11-14 are connected to the network control section 3 shown in FIG. 4, and the end 5.16 is connected to the RF section shown in FIG. Modulator 17 modulates the packet coming in from terminal 11 and sends it out through terminal 15. The demodulator 18 converts the modulated signal coming from the terminal 16 to 0! /iL, sent through terminal 14. The carrier detector 19 detects the power of the signal before the demodulator 18 to detect whether the channel is in a degenerate state, and if the power exceeds a certain threshold, it determines that the channel is in a transmitting state and outputs a busy signal. If it is below the threshold value, it is determined that it is empty, and an empty signal is sent to the network control unit 3 through the terminal 12. The slot synchronization signal detector 20 extracts the slot synchronization signal constantly flowing on the channel and sends synchronization pulses to the network control section 3 through the terminal 13.

Variable 11i device 17 in FIG. Although the demodulator 1B and the slot synchronization signal detector 20 are also internal to the device implementing the ALOHA system, the present invention has the added benefit of carrier detection (10) to check whether the channel is in a transmitting state. Ru.

FIG. 6 shows a block diagram of the network control section 3. The terminals 21 , 22 are connected to the interface section 2 , and the terminals 23 to 26 are connected to the converter section 4 .

Packets coming from the terminal 21 are transferred to the buffer 27
When the gate is opened, the packet is sent to the modulation/demodulation unit 4 through the terminal 23. Also, buffer 27
Then, each time a packet enters from the terminal 21, an arrival pulse is sent to the control circuit 29. The gate 28 circuit is opened and closed by a control signal sent from a control circuit 29. The packet output from the gate circuit 28 is sent out through the terminal 23 and simultaneously delayed by the propagation delay time in the delay device 30 and input to the collision detector 31. The collision detector 31 is a circuit that determines whether a transmitted packet has collided with a packet sent by another user on the channel. Since it is assumed to be a broadcast channel, it can also receive packets sent by itself. Inside the collision detector 31, a signal enters from the terminal 26 (11
) The packet is compared with the packet coming from the delay device 30, and if they match, a success signal is output, and if they are different, a friction signal is output. The repeater 32 takes in one packet from the delayer 30, receives a friction signal from the collision detector 31, delays it according to a certain distribution, and sends the packet to the buffer 27.
Once the success signal is received, the packet is removed.

The address filter 33 takes in only the packet addressed to itself from among the received packets coming from the pinholder 26 and sends it to the interface section 2 through the terminal 22. The control circuit 29 takes in a busy signal or an empty signal from a terminal 24, a slot synchronization pulse from a terminal 25, an arrival pulse from a buffer 27, and a success signal or friction signal from a collision detector 31, and performs a gate operation based on these signals. It controls the circuit 28. Next, the control circuit will be explained in detail.

FIG. 7 shows a schematic diagram of the control circuit 29. A slot synchronization pulse is sent from the terminal 34, a busy signal or empty signal is sent from the terminal 35, a success signal or friction signal is sent from the terminal 36 (12), an arrival pulse is sent from the terminal 37, and the opening/closing of the gate circuit 28 is sent to the terminal 38. Control (send fJ signal) Counter 39 counts the slot synchronization pulse modulo M, and calculates the number of slots corresponding to the propagation delay time from the value I (slot number) and the value I.
FHff+I', which is obtained by subtracting the modulus of FHff+I', is sent to the selector 40, and only the 4'I value ■' is input into the vi calculation circuit 41. This is because when the propagation delay is large, the sending and receiving timeslots are different, so two slot numbers are required.

The selector 40 selects the parameter P corresponding to the inclusive lot number I from the memory circuit 42 that stores M parameters.
j and b for I and slot number I' (parameter PI
/ and parameter [3I) (turn generator 4
3, P1/ is sent to the arithmetic circuit 41. The arithmetic circuit 41 updates the parameter I'I7 and returns it to the selector 40. The selector 40 returns the updated parameter PI to the primary circuit 42. ) (In the turn generator 43, the selector 40 is clicked in response to the slot synchronization pulse coming in from the terminal 34.) to circuit 28.

FIG. 8 shows a block diagram of the arithmetic circuit 41. A busy signal or an empty signal is input from a terminal 44, a success signal or a friction signal is input from a terminal 45, an arrival pulse is input from a terminal 46, a slot number code is input from a terminal 47, and parameters PI are input and output through a terminal 48. Function unit I4
At 9, the function value δ is outputted from the signal coming in from the terminals 44 and 45, and sent to the next arithmetic circuit I50. Arithmetic circuit I50
Now, if the parameter PI input from the terminal 48 is P, then based on the function value δ from the function unit I49 and λ updated by the arithmetic circuit 151,
(δ+λ) . . . (7) (14) Calculations are performed as shown below, and P obtained from equation (8) is returned to the memory circuit 40 from the terminal 41 as a new PI/. α is a small positive number. Also, at the same time Q - Q
＋P
, "° ° Perform the calculation (9) and hold Q.

A flat anchor logic circuit 52 temporally averages the number of arriving pulses coming in from the terminal 46 to obtain an arrival frequency σ, which is multiplied by M and sent to the arithmetic circuit 151. The M(I value of this △ corresponds to the number of slots required by this user. In the arithmetic circuit 151, when the slot number input from the terminal 47 changes from M to 1, the arithmetic circuit 1
Read λ and Q from 51, (t) Wt, , -λ
-β(Q-aM) ---・(10)Q
, =, -0, and again Q and λ are calculated by the calculation circuit l50 (15
) Return to.

The above is one embodiment of the present invention, but instead of the arrival frequency σ of new packets, the total arrival frequency ′ including retransmitted packets may be used. It is also possible to set the minimum required number of slots, and when +M<M, give △σM instead of , so that the request for M6 slots can be made no matter how low the traffic is. Furthermore, instead of ΦM, the degree of communication necessity is set to buffer 2.
The value may be determined based on the number of packets stored in 7, or the value may be determined based on the priority of incoming packets.

Although the above has been described with reference to time-axis multiplexing, it is similarly applicable to frequency multiplexing.

As described above, according to the present invention, it is possible to obtain a multi-access packet communication device that can perform efficient packet transmission while adapting to channel and traffic conditions, and uses one communication medium in five, unlike satellite communication. It is highly effective when used in communication systems that are shared by many users.

(16)

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing satellite communication, FIG. 2 is a diagram showing the slot ALOHA system, and FIG. 3 is a diagram showing frames.
4 is a basic configuration diagram of the present invention, FIG. 5 is a block diagram of the modulation/demodulation section 4, FIG. 6 is a block diagram of the network control section 3, and FIG. 7 is a block diagram showing the control circuit 29 of the present invention. FIG. 8 is a block diagram of the arithmetic circuit 41. In the figure, 1 is an input/output terminal, 2 is an interface section,
3 is a network control section, 4 is a modulation/demodulation section, 5 is an RF section,
11.16 is an input terminal, 12 to 15 are output terminals, 17 is a modulator, 18 is a demodulator, 19 is a carrier detector, 20 is a slot synchronization signal detector, 21.24 to 26 are input terminals, 22.23 is an output terminal, 27 is a buffer, 28 is a gate circuit, 29 is a control circuit, 30 is a delay device, 31 is a collision detector, 32 is a repeater, 33 is an address filter, 43-
37 is an input terminal, 38 is an output terminal, 39 is a counter, 4
0 is a selector, 41 is an arithmetic circuit, 42 is a memory circuit, 43
is a pattern generator, 44 to 47 are input terminals, (17) 48 is an input/output terminal, 49 is a function unit I, and 50 is an operator. (18) 'Yato To ￥ ``It(r-1') 5 Figure Kyo 6 Figure

Claims (1)

[Claims] In the multi-access method, in which one communication medium is shared and packet communication is performed, one communication medium is divided into M (positive integer) channels, and each user watches the usage status of each channel and performs the above observation and measurement. A packet communication device using a multi-access method that controls the amount of access to each channel based on information includes a memory circuit that stores M parameters corresponding to each channel, and a memory circuit that stores M parameters corresponding to each channel and determines whether a channel is in a transmitting state. carrier detection means for checking; collision detection means for checking whether a transmitted packet has caused a collision; means for retransmitting the same packet as the transmitted packet when the collision detection means detects a collision; means for transmitting a packet to the channel using a parameter corresponding to the channel of the storage circuit as a probability when a request occurs; When the parameter corresponding to the channel of the circuit is modified in the positive direction or the negative direction, and the sum of the M parameters of the storage circuit becomes smaller than a certain value determined based on the degree of communication necessity, the parameter is modified in the positive direction. It is characterized by comprising an arithmetic circuit that corrects the value to be large and small in the negative direction, and a means for setting the value according to the degree of communication necessity, and realizes an efficient system that adapts to traffic. Packet communication device.