JPS59152812U - transistor circuit - Google Patents

transistor circuit

Info

Publication number
JPS59152812U
JPS59152812U JP4503883U JP4503883U JPS59152812U JP S59152812 U JPS59152812 U JP S59152812U JP 4503883 U JP4503883 U JP 4503883U JP 4503883 U JP4503883 U JP 4503883U JP S59152812 U JPS59152812 U JP S59152812U
Authority
JP
Japan
Prior art keywords
transistor
input terminal
circuit
external input
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4503883U
Other languages
Japanese (ja)
Inventor
坂根 敏朗
昌夫 山澤
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP4503883U priority Critical patent/JPS59152812U/en
Publication of JPS59152812U publication Critical patent/JPS59152812U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例のトランジスタ回路の回路図、第2図は
本考案の実施例のトランジスタのエミッタを直流的に接
地した場合のトランジスタ回路の回路図、第3図は本考
案の応用例の入出力に直流を流せる整合回路を有する増
巾器の場合の各接続法の説明図、第4図は本考案の応用
例で第3図に示す増巾器を直列にn段接続する場合の直
流電圧供給方法を示す図、第5図は本考案の実施例でト
ランジスタのエミッタを交流的に接地した場合のトラン
ジスタ回路の回路図である。 図中1はトランジスタの入力端子、2はトランジスタの
出力端子、3は外部入力端子、4.5は整合回路、10
−1.10−2.10−3.ID−nは増巾器、Trは
トランジスタ、C,C1+ C2゜C′はコンデンサ、
L1〜L6. L3’〜L5′はチョーク、V□〜V4
. V3’は直流電源、R工e R2+ R3+R□/
 、 R2/は抵抗を示す。
Figure 1 is a circuit diagram of a conventional transistor circuit, Figure 2 is a circuit diagram of a transistor circuit according to an embodiment of the present invention in which the emitter of the transistor is grounded in a DC manner, and Figure 3 is an example of an application of the present invention. An explanatory diagram of each connection method in the case of an amplifier having a matching circuit that allows direct current to flow through the input and output. Figure 4 is an application example of the present invention, and shows the case where n stages of amplifiers shown in Figure 3 are connected in series. FIG. 5, which is a diagram showing a DC voltage supply method, is a circuit diagram of a transistor circuit in an embodiment of the present invention in which the emitter of the transistor is grounded in an AC manner. In the figure, 1 is the input terminal of the transistor, 2 is the output terminal of the transistor, 3 is the external input terminal, 4.5 is the matching circuit, and 10
-1.10-2.10-3. ID-n is an amplifier, Tr is a transistor, C, C1+C2°C' is a capacitor,
L1-L6. L3'~L5' are chokes, V□~V4
.. V3' is DC power supply, R engineering e R2+ R3+R□/
, R2/ indicates resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] □ 外部入力端子と、エミッタ端子を直流的或いは交流
的に接地しであるトランジスタの入力端子間をコンデン
サを介して接続し、該トランジスタの出力端子と該外部
入力端子とを第1のチョーク回路を介して接続し、該ト
ランジスタの出力端子に直流電圧を、直流電源より第2
のチョーク回路を介して供給し、該外部入力端子とアー
ス間に設けた分圧抵抗により分圧された直流電圧を第3
のチョーク回路を介して該トランジスタの入力端子に供
給するようにしたことを特徴とするトランジスタ回路。
□ Connect the external input terminal and the input terminal of a transistor whose emitter terminal is grounded DC or AC via a capacitor, and connect the output terminal of the transistor and the external input terminal with a first choke circuit. A DC voltage is applied to the output terminal of the transistor from a second DC power supply.
The third DC voltage is supplied through the choke circuit and divided by the voltage dividing resistor provided between the external input terminal and the ground.
1. A transistor circuit, wherein the transistor is supplied to an input terminal of the transistor via a choke circuit.
JP4503883U 1983-03-29 1983-03-29 transistor circuit Pending JPS59152812U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4503883U JPS59152812U (en) 1983-03-29 1983-03-29 transistor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4503883U JPS59152812U (en) 1983-03-29 1983-03-29 transistor circuit

Publications (1)

Publication Number Publication Date
JPS59152812U true JPS59152812U (en) 1984-10-13

Family

ID=30175560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4503883U Pending JPS59152812U (en) 1983-03-29 1983-03-29 transistor circuit

Country Status (1)

Country Link
JP (1) JPS59152812U (en)

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