JPS59151544A - Adaptive type echo cancellor - Google Patents

Adaptive type echo cancellor

Info

Publication number
JPS59151544A
JPS59151544A JP2470683A JP2470683A JPS59151544A JP S59151544 A JPS59151544 A JP S59151544A JP 2470683 A JP2470683 A JP 2470683A JP 2470683 A JP2470683 A JP 2470683A JP S59151544 A JPS59151544 A JP S59151544A
Authority
JP
Japan
Prior art keywords
circuit
signal
tap coefficient
echo
storage circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2470683A
Other languages
Japanese (ja)
Other versions
JPS6343013B2 (en
Inventor
Hidenori Ito
伊藤 栄紀
Yuzo Fukushi
福士 雄三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2470683A priority Critical patent/JPS59151544A/en
Publication of JPS59151544A publication Critical patent/JPS59151544A/en
Publication of JPS6343013B2 publication Critical patent/JPS6343013B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/238Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To obtain a prescribed canceling characteristic to any receiving signal by providing a tap coefficient control circuit controlling a tap coefficient stored in a storage circuit depending on a tap coefficient stored by the storage circuit and an output signal of a correcting arithmetic circuit. CONSTITUTION:A pseudo echo line comprising a receiving signal storage circuit 105, tap coefficient storage circuit 107, and an integration arithmetic circuit 110 forms a pseudo echo signal comprising a receiving signal. A subtraction circuit 109 subtracts an echo signal from the pseudo echo signal and outputs a residual echo signal. A correcting amount arithmetic circuit 108 operates a tap coefficient correcting the amount of a transversal filter constituting the pseudo echo line from the receiving signal and the residual echo signal. An addition correcting circuit 204 corrects the tap coefficient. A tap coefficient correcting circuit 401 controls the tap coefficient stored by the circuit 107 depending on the tap coefficient stored by the circuit 107 and the output signal of the circuit 108.

Description

【発明の詳細な説明】 本発明は通信回線における反響信号を除去する適応形反
響消去装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an adaptive echo canceler for eliminating echo signals in a communication line.

従来、長距離通信回線で発生する反響信号による通話妨
害を防止する手段として反響阻止装置が用いられている
。しかしこの装置は、回線のオン。
2. Description of the Related Art Conventionally, echo prevention devices have been used as means for preventing communication interference caused by echo signals generated in long-distance communication lines. However, this device is not connected to the line.

オフ動作を行なうため話頭切断やクリック雑音等が発生
するという欠点がある。
Since the off operation is performed, there are drawbacks such as cutting off at the beginning of speech and generation of click noise.

このような反響阻止装置の欠点を解決するために反響消
去装置が実用化されている。この装置は反響路特性を測
定し、測定された特性に基づいて反響信号に近似した擬
似反響信号を合成し、実際の反響信号を前記擬似反響信
号を用いて消去するものである。このような反響消去装
置は1回線をオン、オフすることがないため反響阻止装
置のような欠点がない。
Echo canceling devices have been put into practical use to solve the drawbacks of such echo blocking devices. This device measures the echo path characteristics, synthesizes a pseudo echo signal that approximates the echo signal based on the measured characteristics, and cancels the actual echo signal using the pseudo echo signal. Such an echo canceler does not have the drawbacks of an echo blocker because it does not turn on and off a single line.

周知のように適応形反響消去装置は一種のシステム同定
装置として捉えられる。すなわちシステム同定用の信号
として受話信号を用い、未知のシステムである反響路と
ほぼ同一のものを擬似反響路として形成(同定)する。
As is well known, the adaptive echo cancellation device can be regarded as a type of system identification device. That is, a received signal is used as a signal for system identification, and a pseudo echo path that is almost the same as the echo path of the unknown system is formed (identified).

ここで前記受話信号としては同定される反響路と同一ま
たはそれ以上の周波数帯域を有していることが必要であ
る。すなわち同定は、使用された受話信号の帯域以外の
帯域については行なえず、いわゆる不定となる。
Here, the received signal needs to have a frequency band that is the same as or greater than that of the echo path to be identified. That is, identification cannot be performed for bands other than the band of the received signal used, and the identification becomes so-called undefined.

実際の反響消去装置において、同定用信号として通常の
音声信号や白色雑音などが使用される場合は9反響路と
同一の帯域のスペクトラムを含んでいるので十社安定な
同定を行える。しかし通信回線に適用した場合9反響路
の帯域に比して非常に狭帯域の信号が同定用信号として
長時間印加される場合がある。すなわち、連続正弦波や
モデム信号などが伝送される場合がある。このような狭
帯域信号が受話信号として使用される場合は、その狭帯
域信号の帯域に対しては同定を行うが、それ以外の帯域
に対しては不定となる。すなわ塾、。
In an actual echo cancellation device, when a normal voice signal or white noise is used as an identification signal, stable identification can be performed because it contains the spectrum of the same band as the nine echo paths. However, when applied to a communication line, a signal with a very narrow band compared to the band of nine echo paths may be applied as an identification signal for a long time. That is, continuous sine waves, modem signals, etc. may be transmitted. When such a narrowband signal is used as a received signal, the band of the narrowband signal is identified, but the other bands are undefined. Sunawa Juku.

狭帯域信号の帯域に対しては修正ループが形成され同定
可能であるが、それ以外の帯域に対しては修正ループが
形成されず同定は出来ない。
A correction loop is formed for the band of the narrowband signal and identification is possible, but a correction loop is not formed for other bands and identification is not possible.

一方、実際の反響消去装置では、そのハードウェアの構
成上から制限を受けること、および反響路にお−で反響
信号に雑音(外乱)が混入、するなどの理由から、擬似
反響路の同定の過程で演算誤差が生じる。この演算誤差
は、同定用信号が反響路の全帯域のスペクトラムを含ん
だものであれば結果として大きな問題全列き起さない。
On the other hand, in actual echo cancellation devices, there are limitations due to the hardware configuration, and noise (disturbance) may be mixed into the echo signal in the echo path, so it is difficult to identify the pseudo echo path. A calculation error occurs in the process. This calculation error will not cause any major problems if the identification signal includes the spectrum of the entire echo path band.

しかし。but.

前記狭帯域信号が印加されたときは次のような問題を引
きおこす。
When the narrowband signal is applied, the following problems occur.

すなわち、信号のない前記狭帯域外の周波数帯では正し
い伝達関数の推定が出来ず、それは不定となる。このた
め長時間推定を続けると、結果として演算誤差は徐々に
蓄積され、擬似反響路を構成スるトランスバーサルフィ
ルタの夕y f係数w記憶する記憶回路のダイナミック
レンジを越えることがあり、このようにして生成された
インパルスモデルは、前記狭帯域においても実際の反響
路特性と異なるものとなり9反響の打ち消しが不可能と
なる。
That is, in a frequency band outside the narrow band where there is no signal, a correct transfer function cannot be estimated, and it becomes undefined. Therefore, if estimation is continued for a long time, calculation errors will gradually accumulate and may exceed the dynamic range of the storage circuit that stores the coefficients of the transversal filter that constitutes the pseudo echo path. The impulse model generated in this manner differs from the actual echo path characteristics even in the narrow band, making it impossible to cancel the nine echoes.

本発明の目的は、あらゆる受信入力信号に対して、所定
の消去特性を確保すると同時に安定な動作を与える適応
形反響消去装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an adaptive echo cancellation device that ensures predetermined cancellation characteristics for all received input signals and at the same time provides stable operation.

本発明は、受話信号から擬似反響信号を作成する擬似反
響路と1反響信号と、前記擬似反響信号との差をとり残
差反響信号を出力する減算回路と。
The present invention provides a pseudo echo path that creates a pseudo echo signal from a received signal, a subtraction circuit that takes the difference between one echo signal, and the pseudo echo signal and outputs a residual echo signal.

前記受話信号と前記残差反響信号とから前記擬似反響路
を構成するトランスバーサルフィルタのタップ係数修正
量を演算出力する修正量演算回路と。
a correction amount calculating circuit that calculates and outputs a tap coefficient correction amount of a transversal filter that constitutes the pseudo echo path from the received signal and the residual echo signal;

前記擬似反響路において前記トランスバーサルフィルタ
のタップ係数の記憶回路に記憶された夕。
2. A signal stored in a storage circuit for tap coefficients of the transversal filter in the pseudo-echo path.

プ係数と前記修正量演算回路の出力とを加算して前記記
憶回路の記憶するタップ係数を修正する加算修正回路と
を有する適応形反響消去装置において、前記記憶回路が
記憶するタック0係数と前記修正量演算回路の出力信号
とに依存して前記記憶回路の記憶するタップ係数を制御
するタップ係数側。
an adaptive echo canceller comprising: an addition correction circuit that adds a tap coefficient and an output of the correction amount calculation circuit to correct a tap coefficient stored in the storage circuit; a tap coefficient side that controls the tap coefficients stored in the storage circuit depending on the output signal of the correction amount calculation circuit;

両回路を備えたことを特徴とする。It is characterized by having both circuits.

次に図面を参照して説明する。Next, a description will be given with reference to the drawings.

第1図は従来の適応形反響消去装置をブロック図で示す
FIG. 1 shows a conventional adaptive echo canceler in block diagram form.

受話信号入力端子101よ逆入力したj時刻の受話信号
Xjは、受話信号記憶回路105に入力すると同時に受
話信号出力端子102を通って反響路に送られる。前記
反響路より送話信号入力端子103に入力するj時刻の
送話信号Y、は減算回路109に送られ、擬似反響路1
06でつくられた擬似反響信号Qj−との差を取られる
。減算回路109の出力信号ejは送話信号出力端子1
04に送られて伝送路に送出され、同時に後述する修正
量演算回路108に送られる。
The received signal Xj at time j, which is reversely input to the received signal input terminal 101, is input to the received signal storage circuit 105 and simultaneously sent to the echo path through the received signal output terminal 102. The transmission signal Y at time j input from the echo path to the transmission signal input terminal 103 is sent to the subtraction circuit 109, and is sent to the pseudo echo path 1.
The difference from the pseudo echo signal Qj- created in step 06 is taken. The output signal ej of the subtraction circuit 109 is sent to the transmitting signal output terminal 1.
04 and sent out to the transmission path, and simultaneously sent to a correction amount calculation circuit 108, which will be described later.

トランスバーサルフィルタからなる擬似反響路106は
、受話信号を記憶する受話信号記憶回路105と、トラ
ンスバーサルフィルタのタップ係数を記憶する記憶回路
107と、これらの記1回路105,107の内容を畳
込み演算する積分演算回路110とから構成される。そ
して積分演算△ 回路110の出力信号が擬似反響信号Yjになる。
A pseudo-reverberation path 106 consisting of a transversal filter convolves the contents of the received signal storage circuit 105 that stores the received signal, the storage circuit 107 that stores the tap coefficients of the transversal filter, and these first circuits 105 and 107. It is composed of an integral calculation circuit 110 that performs calculations. Then, the output signal of the integral operation Δ circuit 110 becomes the pseudo echo signal Yj.

減算回路109の出力信号ejと記憶回路105からの
受話信号とが修正量演算回路108に印加され、トラン
スバーサルフィルタのタップ係数の修正量が演算される
。更に修正量演算回路1073の出力は、タップ0係数
を修正するための加算修正回路204に印加される。
The output signal ej of the subtraction circuit 109 and the reception signal from the storage circuit 105 are applied to a correction amount calculation circuit 108, and the correction amount of the tap coefficient of the transversal filter is calculated. Furthermore, the output of the correction amount calculation circuit 1073 is applied to the addition correction circuit 204 for correcting the tap 0 coefficient.

第2図は第1図の適応形反響消去装置において修正アル
ゴリズムに学習的同定法を使用した適応形反響消去装置
の構成図である。
FIG. 2 is a block diagram of the adaptive echo canceler shown in FIG. 1, in which the learning identification method is used as a modification algorithm.

第2図において、修正量演算回路1o8は乗算器201
,203.割り算器202.自乗累算回路205により
構成され、下記の式(1)を演算する。
In FIG. 2, the correction amount calculation circuit 1o8 is a multiplier 201.
, 203. Divider 202. It is constituted by a square accumulation circuit 205 and calculates the following equation (1).

また式(2)にも、とづいて加算修正回路204にょシ
タツブ係数が修正される。
Also, based on equation (2), the addition correction circuit 204 corrects the coefficient.

ここでiは1番目のタップを表わし、αは修正量?、N
はトランスバーサルフィルタのタップ数ヲ示す。
Here, i represents the first tap, and α is the amount of correction? , N
indicates the number of taps of the transversal filter.

上記の学習的同定修正アルゴリズムに従えば。If we follow the learning identification correction algorithm above.

同定用信号として通常の音声信号や白色雑音などが使用
される場合は2反響路と同一の帯域のスペクトラムを含
んでいるので十分安定な同定を行なえる。しかし反響路
の帯域に比して非常に狭帯域の1例えば連続正弦波やモ
デム信号などが同定用信号として伝送される場合には演
算誤差により不安定な動作を引きおこす。
When a normal voice signal, white noise, or the like is used as the identification signal, sufficiently stable identification can be performed because it contains the spectrum of the same band as the two echo paths. However, when a signal having a very narrow band compared to the echo path band, such as a continuous sine wave or a modem signal, is transmitted as an identification signal, calculation errors may cause unstable operation.

これに対し2本発明の大きな特徴は、修正量演算回路1
08で発生した演算誤差が初期の段階では非常に小さい
ことに注目し、演算誤差が同一方向に蓄積されないよう
にし、あらゆる同定信号に対して安定な動作を与え得る
ようにしたことにあるO 第3図は本発明の基本実施例を示す。
In contrast, two major features of the present invention are that the correction amount calculation circuit 1
We focused on the fact that the calculation errors that occurred in 08 were very small in the initial stage, and we made sure that calculation errors did not accumulate in the same direction, so that we could provide stable operation for all identification signals. Figure 3 shows a basic embodiment of the invention.

この装置は、第2図の構成に対して、新たにタップ係数
を記憶する記憶回路107の記憶信号と修正量演算回路
108の出力信号の双方に依存してトランスバーサルフ
ィルタのタップ係数の内容が一方向に暴走しないように
制御するタップ係数制御回路401を記憶回路107の
出力に備えている。
This device differs from the configuration shown in FIG. 2 in that the contents of the tap coefficients of the transversal filter depend on both the storage signal of the storage circuit 107 that newly stores the tap coefficients and the output signal of the correction amount calculation circuit 108. A tap coefficient control circuit 401 is provided at the output of the memory circuit 107 for controlling the circuit so as not to run out of control in one direction.

第4図はタップ係数制御回路401を具体的に示す第1
の実施例である。
FIG. 4 is a first diagram specifically showing the tap coefficient control circuit 401.
This is an example.

記憶回路107が記憶するタップ係数h1(j−Dの極
性信号sgnJ(j−1)と修正量演算回路108の出
力信号Δh、(j−1)の極性信号sgn AJ (j
−1)とを排他的論理和グー)503に印加するように
している。そしてこれらの信号の極性が同一極性ならK
lを、異極性ならに2をそれぞれ選択する選択回路50
2を備えている。まだ、この選択回路502の出力を記
憶回路107が記憶するタップ係数hi(j−1)に乗
する乗算器501を備えている。
The polarity signal sgnJ (j-1) of the tap coefficient h1 (j-D stored in the storage circuit 107 and the polarity signal sgnAJ (j-1) of the output signal Δh, (j-1) of the correction amount calculation circuit 108
-1) and are applied to the exclusive OR (goo) 503. And if the polarities of these signals are the same, then K
A selection circuit 50 that selects l and 2 if the polarity is different.
2. It still includes a multiplier 501 that multiplies the output of this selection circuit 502 by the tap coefficient hi (j-1) stored in the storage circuit 107.

ここでKlおよびに2は定数でに2>Klである。Here, Kl and 2 are constants and 2>Kl.

このような構成によシ、記憶回路107の信号極性と修
正量演算回路108の信号極性とが同一であれば、記憶
回路107のタップ係数h1(j−1)に定数Klを乗
算した信号h1(j−+fを加算回路204に印加し、
逆に異極性であれば、加算回路204には記憶回路10
7の出力に定数に2を乗算した信号を印加する。すなわ
ち演算誤差を小さくするようにタッグ係数を制御する。
With such a configuration, if the signal polarity of the storage circuit 107 and the signal polarity of the correction amount calculation circuit 108 are the same, the signal h1 obtained by multiplying the tap coefficient h1 (j-1) of the storage circuit 107 by the constant Kl (Apply j−+f to the adder circuit 204,
Conversely, if the polarities are different, the addition circuit 204 includes the storage circuit 10.
A signal obtained by multiplying a constant by 2 is applied to the output of 7. That is, the tag coefficients are controlled to reduce calculation errors.

これによりトランスバーサルフィルタのタッグ係数が演
算誤差の累積から一方向に暴走しようとするのを防ぐこ
とが可能となる。
This makes it possible to prevent the tag coefficients of the transversal filter from going out of control in one direction due to the accumulation of calculation errors.

第5図は2本発明のタッグ係数制御回路401の第2の
実施例を示す。
FIG. 5 shows a second embodiment of the tag coefficient control circuit 401 of the present invention.

すなわち、記憶回路107の記憶するタッグ係数り、(
j−1)の極性信号sgn J (j−1)と前記修正
量価算回路108の出力信号Δh、(j−1)の極性信
号sgnΔhI(j−1)とを排他的論理和ゲート50
6に導びいている。また記憶回路107の出力を2分岐
j     L、一方に定数に!を乗する第1の乗算器
504を接続し、他方に定数に2を乗する第2の乗算器
505を接続している。更に乗算器504と505の出
力のいづれかをケ゛−)506の出力に応じて選択する
選択回路507を備えている。
That is, the tag coefficients stored in the storage circuit 107 are (
The polarity signal sgnJ (j-1) of j-1), the output signal Δh of the correction amount calculation circuit 108, and the polarity signal sgnΔhI(j-1) of (j-1) are connected to an exclusive OR gate 50.
It leads to 6. Also, the output of the memory circuit 107 is divided into two branches jL, and one is set as a constant! A first multiplier 504 that multiplies a constant by 2 is connected to the other, and a second multiplier 505 that multiplies a constant by 2 is connected to the other. Furthermore, a selection circuit 507 is provided which selects one of the outputs of the multipliers 504 and 505 according to the output of the multiplier 506.

選択回路507は、前記実施例同様9例えば記憶1回路
1079信号極性と修正量演算回路108の信号極性と
が同一であれば、加算回路204には記憶回路107の
出力信号に定数に1を乗算した乗算器504からの出力
を印加する。勿論。
Similar to the previous embodiment, the selection circuit 507 operates in a manner similar to the previous embodiment.9 For example, if the signal polarity of the memory 1 circuit 1079 and the signal polarity of the correction amount calculation circuit 108 are the same, the addition circuit 204 multiplies the output signal of the memory circuit 107 by a constant. The output from multiplier 504 is applied. Of course.

K1<K2であり、効果は前記実施例とま、うたく同じ
である。
K1<K2, and the effect is exactly the same as in the above embodiment.

以上の説明かられかるように、狭帯域の信号が長時間受
話信号として印加されても演算誤差が蓄積されることは
無く、十分安定な動作を与える適応形反響消去装置が実
現できる。
As can be seen from the above description, even if a narrowband signal is applied as a reception signal for a long period of time, calculation errors will not be accumulated, and an adaptive echo cancellation device that provides sufficiently stable operation can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の適応形反響消去装置のブロック図、第2
図は、第1図の修正量演算回路のブロック図、第3図は
本発明による適応形反響消去装置のブロック図、第4図
は第3図の要部の構成を示す本発明の第1の実施例を示
す図、第5図は本発明の第2の実施例を示す図である。 図において 105・・・受話信号記憶回路、107・・・タッグ係
数記憶回路、109・・・減算回路、110・・・積分
演算1回路、201.20”3・・・乗算器、202・
・・割シ算器、204・・・加算器、205・・・自乗
累算回路。 1106・・・擬似反響路、401・・・タップ係数制
御回路、501,504,505・・・乗算器、502
 。 507・・・選択回路。 −2:
Figure 1 is a block diagram of a conventional adaptive echo canceler;
1, FIG. 3 is a block diagram of an adaptive echo canceller according to the present invention, and FIG. 4 is a block diagram of the correction amount calculation circuit of FIG. FIG. 5 is a diagram showing a second embodiment of the present invention. In the figure, 105... Reception signal storage circuit, 107... Tag coefficient storage circuit, 109... Subtraction circuit, 110... Integral calculation circuit 1, 201.20"3... Multiplier, 202...
. . . Divider, 204 . . . Adder, 205 . . . Square accumulation circuit. 1106... Pseudo echo path, 401... Tap coefficient control circuit, 501, 504, 505... Multiplier, 502
. 507...Selection circuit. -2:

Claims (1)

【特許請求の範囲】 1、 受話信号から擬似反響信号を作成する擬似反響路
と、反響信号と前記擬似反響信号との差をとり残差反響
信号を出力する減算回路と、前記受話信号と前記残差反
響信号とから前記擬似反響路全構成するトランスバーサ
ルフィルタのタッグ係数修正量を演算出力する修正量演
算回路と、前記擬似反響路において前記トランス・ぐ−
サルレフ4)レタのタップ係数の記憶回路に記憶された
タッグ係数と前記修正量演算回路の出力とを加算して前
記記憶回路の記憶するタッグ係数全修正する加算修正回
路とを有する適応形反響消去装置において、前記記憶回
路が記憶するタッグ係数と前記修正量演算回路の出力信
号とに依存して前記記憶回路が記憶するタッグ係数を制
御するタップ係数制御回路を備えたことを特徴とする適
応形反響消去装置。 2、特許請求の範囲第1項記載の適応形反響消去装置に
おいて、前記タップ係数制御回路を、前記記憶回路が記
憶するタップ係数の極性と前記修正量演算回路の出力信
号の極性とに依存して2つの定数のうちの1つを選択す
る回路と、該選択回路で選択された定数を前記記憶回路
が記憶するタップ係数に乗する乗算器とで構成したこと
を特徴とする適応形反響消去装置。 3、特許請求の範囲第1項記載の適応形反響消去装置に
おいて、タップ係数制御回路を、前記記憶回路が記憶す
るタップ係数出力を2分岐した2つの信号の一方に第1
の定数を乗する第1の乗算器と、他方に第2の定数を乗
する第2の乗算器と、前記記憶回路が記憶するタップ係
数の極性と前記修正量演算回路の出力信号の極性とに依
存して、。 前記第1及び第2の乗算器のいずれかの出力を選択する
回路とで構成したことを特徴とする適応形反響消去装置
。 以下余目
[Scope of Claims] 1. A pseudo-echo path for creating a pseudo-echo signal from a received signal; a subtraction circuit for taking the difference between the echo signal and the pseudo-echo signal and outputting a residual echo signal; a correction amount calculating circuit that calculates and outputs a tag coefficient correction amount of the transversal filter that constitutes the entire pseudo echo path from the residual echo signal;
4) Adaptive echo cancellation having an addition correction circuit that adds the tag coefficients stored in the storage circuit for letter tap coefficients and the output of the correction amount calculation circuit to correct all the tag coefficients stored in the storage circuit. Adaptive type apparatus characterized in that the apparatus includes a tap coefficient control circuit that controls the tag coefficients stored in the storage circuit depending on the tag coefficients stored in the storage circuit and the output signal of the correction amount calculation circuit. Echo canceller. 2. In the adaptive echo canceling device according to claim 1, the tap coefficient control circuit is configured to depend on the polarity of the tap coefficient stored in the storage circuit and the polarity of the output signal of the correction amount calculation circuit. and a multiplier that multiplies the constant selected by the selection circuit by the tap coefficient stored in the storage circuit. Device. 3. In the adaptive echo canceling device according to claim 1, the tap coefficient control circuit is configured to output a first signal to one of two signals obtained by branching the tap coefficient output stored in the storage circuit.
a first multiplier that multiplies the other by a constant; a second multiplier that multiplies the other by a second constant; the polarity of the tap coefficient stored in the storage circuit; Depends on. An adaptive echo cancellation device comprising: a circuit for selecting the output of either the first or second multiplier. Extras below
JP2470683A 1983-02-18 1983-02-18 Adaptive type echo cancellor Granted JPS59151544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2470683A JPS59151544A (en) 1983-02-18 1983-02-18 Adaptive type echo cancellor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2470683A JPS59151544A (en) 1983-02-18 1983-02-18 Adaptive type echo cancellor

Publications (2)

Publication Number Publication Date
JPS59151544A true JPS59151544A (en) 1984-08-30
JPS6343013B2 JPS6343013B2 (en) 1988-08-26

Family

ID=12145615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2470683A Granted JPS59151544A (en) 1983-02-18 1983-02-18 Adaptive type echo cancellor

Country Status (1)

Country Link
JP (1) JPS59151544A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153850A (en) * 1980-04-28 1981-11-28 Kokusai Denshin Denwa Co Ltd <Kdd> Echo control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153850A (en) * 1980-04-28 1981-11-28 Kokusai Denshin Denwa Co Ltd <Kdd> Echo control system

Also Published As

Publication number Publication date
JPS6343013B2 (en) 1988-08-26

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