JPS59148357A - Package of integrated circuit - Google Patents
Package of integrated circuitInfo
- Publication number
- JPS59148357A JPS59148357A JP2243483A JP2243483A JPS59148357A JP S59148357 A JPS59148357 A JP S59148357A JP 2243483 A JP2243483 A JP 2243483A JP 2243483 A JP2243483 A JP 2243483A JP S59148357 A JPS59148357 A JP S59148357A
- Authority
- JP
- Japan
- Prior art keywords
- package
- memory
- socket
- opens
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は受光素子あるいはメモリ素子のように光照射に
よって動作する素子の収納のための凹部を有するICパ
ッケージに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an IC package having a recess for accommodating an element operated by light irradiation, such as a light receiving element or a memory element.
このようなICパッケージは、第1図に示すようにプリ
ント基板lにリード端子2により装着した場合、基板l
と反対側になるパッケージ3の上面4に素子収納部5が
開口されており、この内部に半導体素子、例えばメモリ
素子6が収納される。When such an IC package is attached to a printed circuit board l using lead terminals 2 as shown in FIG.
An element accommodating part 5 is opened in the upper surface 4 of the package 3 on the opposite side, and a semiconductor element, for example, a memory element 6 is housed inside the element accommodating part 5.
この状態でメモリ素子6のメモリを消去したいときは、
パッケージ3の上方から例えば紫外光7を照射する。し
かし−・つのプリント基板上にこのような半導体素子を
上面に開口した凹部に収納したICパッケージを複数個
装着した場合、そのメモリを消去したくない素子、ある
いは光照射によるもれ電流などの特性変動を避けたい素
子が収納したICパッケージは開口部を遮光しなければ
ならず、大面積プリント基板の場合はかなりの工数を要
し、所望の素子のみにビーム状の光を当てることは大き
な費用を要する。If you want to erase the memory of memory element 6 in this state,
For example, ultraviolet light 7 is irradiated from above the package 3. However, if multiple IC packages containing such semiconductor elements housed in recesses with openings on the top are mounted on a single printed circuit board, there may be problems with the memory of the elements whose memory you do not want to erase, or with characteristics such as leakage current caused by light irradiation. For IC packages containing elements whose fluctuations should be avoided, the opening must be shielded from light, which requires a considerable amount of man-hours in the case of large-area printed circuit boards, and it is expensive to apply a beam of light only to the desired elements. It takes.
本発明は上述の欠点を除去し、とくに必要な場合以外は
光照射が望ましくない素子の遮光を不要とするようなI
Cパッケージを提供することを目的とする。The present invention eliminates the above-mentioned drawbacks and provides an I
The purpose is to provide a C package.
この目的はICパッケージがそのリード端子の先端の伸
びる方向の側の面に開口する素子収納用凹部を有するこ
とによって達成される。This objective is achieved by the IC package having a recess for accommodating an element that opens on the side surface in the direction in which the tips of the lead terminals extend.
以下図を引用して本発明の実施例について説明する。第
2図ではICパッケージ3の素子6を収容するための凹
部5の開口面8から垂直にリード端子9が引き出されて
おり、第3図ではICパッケージ3の側面から直角に曲
って伸びたリード端子2の先端方向と垂直のパッケージ
面10に素子収納用凹部5が開口している。Embodiments of the present invention will be described below with reference to the drawings. In FIG. 2, a lead terminal 9 is drawn out perpendicularly from the opening surface 8 of the recess 5 for accommodating the element 6 of the IC package 3, and in FIG. An element housing recess 5 is opened in the package surface 10 perpendicular to the direction of the tip of the terminal 2.
これらのパッケージ3を第4図のように、リード端子先
端側がプリント基板に対向するようにプリント基板l上
のたとえばソケット11上に装着すると、素子収納用開
口部5と収納されている半導体素子6が隠れる結果遮光
が達成される。また、對ま
たとえば、パッケージ開口部に収納されている素子がメ
モリ素子ならば、メモリの消去が必要の場合はソケット
11からパッケージを取りはずし、素子面10を露出さ
せて紫外光を照射することにより容易に可能となる。素
子収納用凹部5の開口部はたとえば紫外線を透過する石
英ガラス板で気密に閉塞してもよい。また特定のICパ
ッケージに収納された素子にのるプリント基板に装着し
た状態で光を照射したいときは、そのパッケージ3の収
納部5に対向した基板部分あるいは必要によりソケット
にも穴を明けておけば他のパッケージへの遮光効果を損
ねることなく光照射が可能である。When these packages 3 are mounted on, for example, a socket 11 on a printed circuit board l so that the leading end of the lead terminal faces the printed circuit board as shown in FIG. As a result, shading is achieved. For example, if the element housed in the package opening is a memory element, if the memory needs to be erased, the package can be removed from the socket 11, the element surface 10 exposed and irradiated with ultraviolet light. easily possible. The opening of the element housing recess 5 may be hermetically closed, for example, with a quartz glass plate that transmits ultraviolet rays. Also, if you want to irradiate light while mounted on a printed circuit board mounted on an element housed in a specific IC package, make a hole in the part of the circuit board facing the housing part 5 of the package 3 or in the socket if necessary. In other words, it is possible to irradiate light without impairing the light shielding effect on other packages.
以上述べたように、本発明はICパッケージの素子収納
用凹部を装着後基板と対向する面に開口させるもので、
これにより基板装着時に容易に遮光が達成され、また基
板上のソケットに装着すれば必要に応じて基板より取り
外し、開口面を露出させて光を照射することも容易にで
きる。さらに基板に光入射孔を設けることにより同じパ
ッケージで光照射も可能であるので使用範囲も広く、本
発明により得られる効果は極めて大きい。As described above, the present invention opens the element storage recess of the IC package on the surface facing the substrate after mounting.
As a result, light shielding can be easily achieved when mounted on a board, and if it is mounted in a socket on a board, it can be easily removed from the board as necessary to expose the opening surface and irradiate light. Furthermore, by providing a light entrance hole in the substrate, it is possible to irradiate light with the same package, so the range of use is wide, and the effects obtained by the present invention are extremely large.
第1図は素子収納用凹部を有するICパッケージの従来
例の一部破砕正面図、第2図は本発明の一実施例の一部
破砕正面図、第3図は別の実施例の一部破砕正面図、第
4図は第3図に示すICパッケージの装着状態の一例を
示す正面図である。
2.9・・・リード端子、3・・・ICパッケージ、5
・・・素子収納用凹部。
才jの
γ
Pz閃
才3/¥1
″″AI−乙閃FIG. 1 is a partially exploded front view of a conventional example of an IC package having a recess for storing an element, FIG. 2 is a partially exploded front view of an embodiment of the present invention, and FIG. 3 is a partially exploded front view of another embodiment. FIG. 4 is a front view showing an example of the mounted state of the IC package shown in FIG. 3. 2.9... Lead terminal, 3... IC package, 5
...Recess for storing elements. Saij no γ Pz Sensai 3/¥1 ″″AI-Otsusen
Claims (1)
る素子収納用凹部を有することを特徴とするICパッケ
ージ。1) An IC package characterized by having a recess for storing an element that opens on the side in the direction in which the tip of the IJ-do terminal extends.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2243483A JPS59148357A (en) | 1983-02-14 | 1983-02-14 | Package of integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2243483A JPS59148357A (en) | 1983-02-14 | 1983-02-14 | Package of integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59148357A true JPS59148357A (en) | 1984-08-25 |
Family
ID=12082582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2243483A Pending JPS59148357A (en) | 1983-02-14 | 1983-02-14 | Package of integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59148357A (en) |
-
1983
- 1983-02-14 JP JP2243483A patent/JPS59148357A/en active Pending
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