JPS5914792B2 - Analog signal binary signal conversion circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an analog electrical signal obtained from a photoelectric conversion device in an analog signal binarization circuit, particularly in an optical character reading or code reading device. The present invention relates to a binary signal conversion circuit that quantizes a binary signal corresponding to 10 by 10.

In optical character reading devices or code reading devices, etc.
When a character or code is scanned and the intensity of reflected light is detected based on the presence of the pattern, an analog 15 electrical signal proportional to the intensity of the light is obtained from the photoelectric conversion device. When converting that analog electrical signal into a binary signal corresponding to a background area and a character or code area, one input terminal of the differential amplifier is connected to the analog electrical signal to be binarized to the other input terminal. is the reference voltage for binarization, which is 20
If the analog signal voltage is at a level corresponding to the reflected light from the character or code area, the preset first voltage is applied. is output, and this is set as a logical "1". Further, if the level corresponds to the reflected light from the background area, a preset second voltage is output, and this is set to logical "0". In this way, in the conventional method of receiving the reflected light with a photoelectric conversion device, comparing the output signal with a reference voltage, and converting it into a value based on the magnitude relationship of the absolute value of the analog signal No. 30 voltage, It has not been easy to obtain a binary signal pattern that can faithfully reproduce the pattern of characters, etc. due to fluctuations in the level of light received due to changes in the reflectance of the paper on which characters are printed or changes in the light intensity of the light source.

The present invention solves the conventional problems as described above.
Characters and code patterns can be faithfully converted into binary signal patterns even in response to fluctuations in the light reception level of the photoelectric conversion device caused by fluctuations in the light intensity of the light source or fluctuations in the distance between the scanning device and the paper. The purpose is to realize a circuit that can be reproduced.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram of a binary signal conversion circuit showing one embodiment of the present invention. In the figure, 1 is an AD conversion device, which receives an analog signal SI obtained from a photoelectric conversion device by scanning a character or code in an optical character or code reading device, converts it into a digital signal, and outputs the converted signal. Take out 1. 2 and 3 are buffer registers, both of which store the output signal 1 of the A/D converter 1. Of these, buffer register 2 stores the immediately preceding A/D converted signal T. i, and the buffer register 3 stores the A-D conversion signal 1t.i from the previous time. Store i-1.

4 is an adder, and the content 1t of buffer register 2
．． i and the contents of buffer register 3 It. i-1 is added to the output signal Jt. It is set as i.

5 is a maximum value detection register which detects the current Jt. Let i be the content of the maximum value detection register 5, and hold that content until the next signal A occurs.

6 is a comparison circuit, and Jt. i and the output D of register 5, and Jt. When the relationship i>D is satisfied, the output B
occurs.

7 is an AND circuit, which outputs the output signal B of the comparator circuit 6;
The timing signal CK is input, and the AND signal A of both is generated.

J by the operation of register 5, comparator circuit 6 and AND circuit 7
t. The maximum value of i can be determined and stored in the register 5. Therefore, by performing the above operation after clearing the maximum value detection register 5 at the timing described later, the contents of the maximum value detection register 5 at the end of one vertical scan become Jt. This indicates the maximum value of i. Reference numeral 8 denotes a shift register, which has a capacity sufficient to store the A-D conversion signal 1t for one row of scanning. Output signals 1t, . i is taken into the shift register 8. Therefore, the i-th A-D conversion signal 1t. i
The output signal of the shift register 8 immediately before it is taken into the shift register 8 becomes the i-th AD conversion signal 1t-1,i obtained by the previous vertical scan.

It. When i is taken into shift register 8, the output signals of shift register 8 are It-1, i+! becomes. Reference numeral 9 denotes an arithmetic circuit which calculates a threshold value THt from the output signal D of the maximum value detection register 5 and outputs it as an output signal.

The arithmetic circuit 9 performs the following calculations. Here, A and b are constants. Reference numeral 10 denotes a threshold value register for storing a threshold value, which takes in the output signal THt of the arithmetic circuit 9 at a timing described later and holds the value.

Reference numeral 11 denotes a comparison circuit which receives the output signal THt. of the threshold value register 10. ．． l and the output signal 1t-1 of shift register 8
, 1, THt-1〉It-1,i
When (Ii), the output signal E is set to logic "11".

THt-1kuIt-1,i ・・・・・・・・・
...... (1ii), the output signal F is set to logic "1"
”.

Therefore, when THt-1=It-1, i, both the output signals E and F become logic "01." 12 is a black and white flip-flop, and the output signal E-" of the comparator circuit 11 is
It is set when the output signal F="1", and is set when the output signal F="B" to output the binarization determination result Bwt-1,i.

Therefore, when the output signals E and F of the comparator circuit 11 are both logic "0", the previous binarization determination result Bwt-1, l
-, is maintained and set to Bwt-1, 1. Next, Figure 2,
The operation of each part in FIG. 1 will be explained using FIG. 3.

As shown in Figure 2, a character or code pattern is imaged on the photoelectric conversion device, each light receiving element in the photoelectric conversion device is designated as CO, Cl, C2...C29, and the output of each light receiving element is The analog output signals of each light-receiving element obtained when the signals are sequentially scanned are shown in S in Fig.
Shown in I.

Pt. The signal between 1 and 1 indicates the output signal of each light-receiving element Ci when the photoelectric conversion device is at the position Pt-1 of the character image in FIG. 2, and the signal between Pt in FIG. The photoelectric conversion device converts the character image P in Figure 2.
In the example in Figure 3, which shows the output signal of each light-receiving element Ci when it is at position t, the signal SI obtained by scanning at position Pt-1 and the signal SI obtained by scanning at position Pt are shown. This shows a case where the level of the obtained signal has changed significantly for some reason.

To explain the state of each part immediately before the start of vertical scanning Pt, the buffer register 2 stores a value obtained by digitizing the output signal of the last light receiving element C29 of the immediately preceding vertical scanning Pt-1, and the buffer register 3 has Pt-
A value obtained by digitizing the output signal of the light receiving element C28 during one vertical scan (hereinafter referred to as an output signal) is stored.

In addition, the shift register 8 stores the output signals of all the light receiving elements during Pt-1 vertical scanning, and the output signal of the shift register 8 is the output signal of the topmost light receiving element CO during Pt-1 vertical scanning. Shows the output signal. The threshold value register 10 is set according to the maximum value of the sum of the output signals of two consecutive elements between the top and bottom light-receiving elements CO and Mt-, excluding the output signal of C29, during vertical scanning of Pt-1. The threshold value THt-1 thus determined is stored. From this state, the following operation is performed during vertical scanning of Pt. 1) Reset black and white flip-flop 12 (
initialize).

2) The black and white flip-flop 12 is set, cleared or held by the output signals E and F of the comparison circuit 11 (binarization of It-1 and o).

3) After scanning the output signal of the light receiving element CO and converting it into a digital signal by the A/D converter 1, it is stored in the buffer register 2, and the contents of the buffer register 2 are transferred to the buffer register 3.

4) Load the contents of buffer register 2 (CO output signal) into shift register 8.

The output signal of the shift register 8 becomes 1, which is the output of the light receiving element C1 during Pt-1 vertical scanning. 5)
The sum Jt. of the contents D of the maximum value detection buffer register 5 and the contents of buffer registers 2 and 3. Compare O and J
t,. When O>D, Jt. Store O in register 5.

6) Set, clear or hold the black and white flip-flop 12 using the output signals E and F of the comparator circuit 11 (binarization of It-1, 1).

7) After scanning the output signal of the light receiving element C1 and converting it into a digital signal by the A/D converter 1, it is stored in the buffer register 2, and the contents of the buffer register 2 are transferred to the buffer register 3.

8) Contents of buffer register 2 (C1 output signal 1t
, 1) into the shift register 8.

The output signal of the shift register 8 becomes the output signal 1t-1, 1t-2 of the light receiving element C2 during Pt-1 vertical scanning. 9)
Clear maximum value detection register 5.

10) Set, clear, or hold the black and white flip-flop using the output signals E and F of the comparator circuit 11 (
Binarization of t-1, 2).

The output signal of the 10th order light receiving element Ci is scanned, and A-
After converting it into a digital signal (It.i) with the D converter 1,
At the same time as storing in buffer register 2,
Transfer the contents of register 2 (It, .i-1) to buffer register 3.

(branch) Contents of buffer register 2 1t. Take i into shift register 8.

The output signals of the shift register 8 are It-1 and i+1. 1 The contents D of the maximum value detection register 5 and the Jt. l
(=It.i-1+It,.i), Jt. i＞
When D, the maximum value detection register 5 is detected at the timing of CK.
and updated Jt. Remember i.

Jt. When i≦D, the contents are not changed.

14) Repeat steps 10) to 1 above until the C28 scan is completed.
Repeat 4).

When the scanning of C28 is completed, the process moves to the next step 15). 15)
The output signals E and F of the comparator circuit 11 cause a black and white flip.
Set, clear or hold flop 12 (It
-1,29 binarization).

16) Scan the output signal of the light receiving element C29, and
After converting it into a digital signal (It, 29) in the D converter 1, it is stored in the buffer register 2, and the contents 1t, 28 of the buffer register 2 are transferred to the buffer register 3.
Transfer to.

17) Take the contents Tl29 of buffer register 2 into shift register 8.

The output signals of shift register 8 are It, . It becomes O. 1
8) From the content D of the maximum value detection register 5, the threshold value HtD-
AD+b, THt-? and stores it in the threshold register 10.

This completes the binarization of analog signals for one vertical scan.

Therefore, by sequentially performing the operations 1) to 1) in the circuit shown in Figure 1, an analog signal can be quantized into a binary signal. As is clear from the above description, the binarization circuit of the present invention has the advantage that each light-receiving element C within one vertical scan
1 of the scanning output signal SIi of the uppermost end and the lowermost end of the light receiving element CO, C29 output signal 1t. 0. It, other than It, 2,! ~It, by adding the signals for two consecutive light receiving elements of 28, Jt. i, and this Jt. Find the maximum value MAXt (see Figure 3) of i within one vertical scan MAXt
-AMAXt+b, calculate the threshold value THt (=?) from this value, and combine this THt with the light receiving elements CO, Cl, C2.
. . . Output signal 1t of C29, . 0,. It, 1
, 1t, 2...It, comparing the sizes of 29,
It is converted into a binary signal.

In this way, the data obtained by scanning is stored for one vertical scan, the maximum value is determined, and the stored data is binarized using the obtained maximum value. Alternatively, it is possible to absorb the fluctuations in the received light level due to fluctuations in the light intensity of the light source, etc., and faithfully extract the original character or code pattern as a binary electric signal pattern.〇Jt. When finding the maximum value of i, adding the signals of two consecutive light-receiving elements is possible if a two-phase clock signal is used when scanning each light-receiving cell of the image sensor and extracting the video signal. Since the noise caused by the clock signal enters the video signal, the effect of the noise caused by the clock signal is reduced by combining the video signals for the number of clock phases to find the maximum value.
This is effective when using a semiconductor integrated circuit image sensor as a photoelectric conversion device. Also, excluding the output signal of the uppermost light receiving element and the lowermost light receiving element from the maximum value detection is, for example, This is because, as in the case of semiconductor integrated circuit image sensors, the conditions inside the photoelectric conversion device are slightly different only for the light-receiving elements at both ends, and the reliability of the output signals of the light-receiving elements at both ends is low. By detecting the maximum value from a portion other than the output signal of , it is possible to obtain a highly accurate maximum value (the portion of the background area with the largest amount of light).

When calculating the threshold value from the maximum value, in the above example, the following calculation is performed, where the denominator 2 is divided because the maximum value MAX is calculated by adding the outputs of two consecutive light receiving elements. It is something.

Therefore, when using a four-phase clock image sensor and calculating the maximum value MAX by adding up the outputs of four consecutive light receiving elements, the denominator in the above equation is 4. Note that processing can also be performed with the black and white levels reversed, and in this case, the minimum value MIN is found. As described above, according to the present invention, fluctuations in the light reception level of the photoelectric conversion device caused by dirt on the paper, fluctuations in the light intensity of the light source, fluctuations in the distance between the scanning device and the paper, etc. are efficiently absorbed. Code patterns can be faithfully reproduced into binary signal patterns.

Also, the output signal of each light receiving element of the photoelectric conversion device is N
When scanning with a phase clock signal, N consecutive light-receiving element output signals are added and the maximum or minimum value of the added value is determined within each vertical scan, so the influence of noise due to the clock signal is eliminated. It becomes possible to reduce the amount.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a binary signal conversion circuit showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of the light receiving element and character pattern of the photoelectric conversion device in FIG. 1, and FIG. This is an operation time chart. 1: A-D converter, 2, 3: buffer register, 4
: Adder, 5: Maximum value detection register, 6: Comparison circuit, 7
: AND circuit, 8: Shift register, 9: Arithmetic circuit,
10: Threshold register, 11: Comparison circuit, 12: Black and white flip-flop, CO to C29: Light receiving element, Pt
-1, Pt: Vertical scanning time.

Claims (1)

[Scope of Claims] 1. In a circuit that quantizes an output signal of a photoelectric conversion device such as an optical character reading or code reading device into a binary signal corresponding to a background area and a character or code area, means for storing output signals of a photoelectric conversion device for vertical scanning; when the output signals of each light receiving element of the photoelectric conversion device are scanned by N-phase clock signals, the output signals of consecutive N light receiving elements are added; means for calculating the maximum value or minimum value of the added value within each vertical scan, calculating a threshold value as a function of the maximum value or minimum value, and calculating the threshold value and the stored output of the photoelectric conversion device for one vertical scan. 1. A circuit for converting an analog signal into a binary signal, comprising means for comparing the signal data with the signal data. 2. The means for determining the maximum value or minimum value of the output signal for one vertical scan of the photoelectric conversion device is characterized by detecting the maximum value or minimum value of data near the center of the signal data for one vertical scan. A circuit for converting an analog signal into a binary signal according to claim 1. 5