JPS5914112U - Tape recorder mixing circuit - Google Patents
Tape recorder mixing circuitInfo
- Publication number
- JPS5914112U JPS5914112U JP10800182U JP10800182U JPS5914112U JP S5914112 U JPS5914112 U JP S5914112U JP 10800182 U JP10800182 U JP 10800182U JP 10800182 U JP10800182 U JP 10800182U JP S5914112 U JPS5914112 U JP S5914112U
- Authority
- JP
- Japan
- Prior art keywords
- microphone
- microphone signal
- tape recorder
- jack
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例を示すミキシング回路図、第２図は本考
案の一実施例を示すミキシング回路図である。
６・・・外部マイクジャック、７・・・ジャ、ツクスイ
ッチ、８・・・マイク信号増幅用トランジスター、１５
゜１７・・・バイアス用の抵抗。FIG. 1 is a mixing circuit diagram showing a conventional example, and FIG. 2 is a mixing circuit diagram showing an embodiment of the present invention. 6... External microphone jack, 7... Jack switch, 8... Microphone signal amplification transistor, 15
゜17...Resistance for bias.
Claims (1)
し込まれた外部マイク使用時、該外部マイクジャックか
らのマイク信号をマイク信号増幅用トランジスターのベ
ースに印加して増幅した後そのコレクタ側より左右チャ
ンネル系に供給して各チャンネル信号とのミキシングを
行なわせるようにしたテープレコーダーであって、前記
マイク信号増幅用トランジスターのベースに常時箱１の
バイアス電流を供給し該マイク信号増幅用トランジスタ
ーを増幅作用を有する能動状態とする第１のバイアス回
路と、前記外部マイクジャックに外部マイクロフォンの
プラグが差し込まれていない時閉成状態にあるジャック
スイッチを通じて前記マイク信号増幅用トランジスター
のベースに第２のバイアス電流を供給し該マイク信号増
幅用トラーンジスターを飽和状態にする第２のバイアス
回路とを備えてなる事を特徴とした一テープレコーダー
のミキシング回路。When using an external microphone with an external microphone plug inserted into the external microphone jack, the microphone signal from the external microphone jack is applied to the base of the microphone signal amplification transistor, amplified, and then supplied to the left and right channels from the collector side. The tape recorder is configured to perform mixing with each channel signal by using the microphone signal amplifying transistor, and the bias current of box 1 is always supplied to the base of the microphone signal amplifying transistor, so that the microphone signal amplifying transistor is in an active state having an amplifying effect. a first bias circuit that supplies a second bias current to the base of the microphone signal amplification transistor through a jack switch that is in a closed state when no external microphone is plugged into the external microphone jack; A mixing circuit for a tape recorder, comprising a second bias circuit for bringing a microphone signal amplifying transistor into a saturated state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10800182U JPS5914112U (en) | 1982-07-15 | 1982-07-15 | Tape recorder mixing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10800182U JPS5914112U (en) | 1982-07-15 | 1982-07-15 | Tape recorder mixing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5914112U true JPS5914112U (en) | 1984-01-28 |
Family
ID=30252137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10800182U Pending JPS5914112U (en) | 1982-07-15 | 1982-07-15 | Tape recorder mixing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5914112U (en) |
-
1982
- 1982-07-15 JP JP10800182U patent/JPS5914112U/en active Pending
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