JPS59139881A - Pulse synchronizer for controlling motor - Google Patents

Pulse synchronizer for controlling motor

Info

Publication number
JPS59139881A
JPS59139881A JP58012614A JP1261483A JPS59139881A JP S59139881 A JPS59139881 A JP S59139881A JP 58012614 A JP58012614 A JP 58012614A JP 1261483 A JP1261483 A JP 1261483A JP S59139881 A JPS59139881 A JP S59139881A
Authority
JP
Japan
Prior art keywords
signal
circuit
signals
pulse
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58012614A
Other languages
Japanese (ja)
Inventor
Hideki Kobayashi
秀樹 小林
Hiromitsu Kawabe
河辺 弘充
Norimitsu Hirano
平野 紀光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP58012614A priority Critical patent/JPS59139881A/en
Publication of JPS59139881A publication Critical patent/JPS59139881A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05DSYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
    • G05D13/00Control of linear speed; Control of angular speed; Control of acceleration or deceleration, e.g. of a prime mover
    • G05D13/62Control of linear speed; Control of angular speed; Control of acceleration or deceleration, e.g. of a prime mover characterised by the use of electric means, e.g. use of a tachometric dynamo, use of a transducer converting an electric value into a displacement

Abstract

PURPOSE:To prevent the erroneous counting by synchronizing the four signals of command pulse signals of A-phase signal, B-phase signal, normal rotation command pulse signal and reverse command pulse signal of a pulse generator with the four signals displaced in the phases. CONSTITUTION:An input pulse from a normal command input terminal 1 is synchronized by a rise detector 3 with phi1 synchronizing signal 5. An input pulse from the reverse command input terminal 2 is synchronized with phi3 synchronizing signal by a rise detector 4. A rise detector 17 outputs a signal synchronized with phi4 synchronizing signal 8 to an AND circuit 19, and a fall detector 18 outputs a signal synchronized with phi2 synchronizing signal 6 to an AND circuit 20. Since the phi1-phi4 synchronizing signals are displaced in the phases, the signals are not inputted to the counter 11 simultaneously or in superposed manner, and are not erroneously counted.

Description

【発明の詳細な説明】 本発明は、モータのアップ・ダウンカウンタを用いが留
り位置制御において、ノイズに強く胆力(1) ラントをなくしたモータ制御用・ξルス同期化回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ξ pulse synchronization circuit for motor control that is resistant to noise and eliminates runt when controlling a motor's stall position using an up/down counter.

従来は、エンコーダからのフィードバック・ぞルスと指
令・ぞルスの・ぞルス幅を共に非常に狭くしてやれば、
確率的に同時にアップ・ダウンカウンタに入力されるこ
とはないという前提のもとでモータの位置制御を行って
いたが、この方法は入力・ぞルスの同期が短くなると確
率的にも無視できなくなるという欠点を有していた。そ
のために、誤カウントを生じ、正しくモータの位置制御
を行なうことができなかった。
Conventionally, if you make both the feedback and command widths of the encoder very narrow,
The motor position was controlled based on the assumption that inputs to the up and down counters would not be input at the same time, but this method can no longer be ignored in terms of probability as the synchronization of inputs and counters becomes shorter. It had the following drawback. As a result, erroneous counting occurred and the motor position could not be controlled correctly.

本発明は上記欠点を解決するためになされたもので、以
下図面を参照しつつ本発明の一実施例を説明していくこ
ととする。
The present invention has been made to solve the above-mentioned drawbacks, and one embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例としてのモータ制御用・ぞル
ス同期化回路を用いた留り位置制御回路のブロック回路
図を示す。第2図は第1図の留り位置制御回路に用いた
4つの位相の異なった信号を作る回路で、基準発振器2
】をT−FF回路22とAND 回路Z(によってφ1
同期信号5、φ2同期(2) 信号6、φS同期償信号及びφ4同期信号8を得ている
。第3図は第2図に示す回路から得られる同期信号のタ
イミング図である。第4図は、第1図のゾロツク図にお
ける立上り検出回路図(第1図参照)17、第5図は立
上り検出回路のタイミング図、第6図は第1図のブロッ
ク図における立下り検出回路図(第1図参照)1B、第
7図は第6図の立下り検出回路18のタイミング図、第
8図は全回路図の動作タイミング図である。
FIG. 1 shows a block circuit diagram of a stop position control circuit using a motor control/drive synchronization circuit as an embodiment of the present invention. Figure 2 shows a circuit that generates four signals with different phases used in the stop position control circuit shown in Figure 1.
] with T-FF circuit 22 and AND circuit Z (by φ1
A synchronization signal 5, a φ2 synchronization (2) signal 6, a φS synchronization compensation signal, and a φ4 synchronization signal 8 are obtained. FIG. 3 is a timing diagram of the synchronization signal obtained from the circuit shown in FIG. FIG. 4 is a rising edge detection circuit diagram (see FIG. 1) in the Zorock diagram of FIG. 1, FIG. 5 is a timing diagram of the rising edge detection circuit, and FIG. 6 is a falling edge detection circuit in the block diagram of FIG. 1B (see FIG. 1), FIG. 7 is a timing diagram of the fall detection circuit 18 of FIG. 6, and FIG. 8 is an operation timing diagram of the entire circuit diagram.

例えばCW(正転)方向の指令入力端子1から・ぞルス
が入力されると、立上り検出回路3がφ1同期信号5と
同期をとって、OR回路9に入り、アップ・ダウン(U
P+−down )カウンタ11のUF4−fK。
For example, when a .
P+-down) UF4-fK of counter 11.

入る。この即・downカウンタ11により計数された
データはD/A  (デジタル−アナログ)変換回路1
2を経てアナログ電圧となり、これがモータ14の駆動
回路13の指令電圧となってモータ14がCW力方向回
り機械的に連結されたタコジェネレータ15Eパルスジ
エネレータ】6のウチタコ4 x ネV −p15の信
号は駆動回路13にフィードバックされ、速度制御がか
かり、・ぐルスジエネレータ16 ノA 相信号(16
−A)は立上り検出回路17と立下り検出回路1日に入
力される。立上り検出回路17はφ4同期信号8と同期
した信号をAND回路19に出力し、立下り検出回路1
8はφ2同期信号6と同期した信号をAND回路かに出
力する。この時2つのAND回路(19,20)  の
他方の端子KB相の信号を入力すると、Aルスジエネレ
ータ16の回転方向によって、CCW反転方向であれば
立上り検出回路17の信号がUP−downカウンタ1
1のUP端子に入り、CW力方向あれば立下り検出回路
の信号がUP−downカウンタ1】のむ■端子に入る
。すなわち、立上り検出回路17、立下り検出回路18
及びAND回路(19,20)によって方向弁別回路を
構成している。この例の場合は、CW力方向のでdow
n端子に信号が入り、先はどの指令・ぞルス数と同じ数
だけ減算することにより、指令された回転角だけモータ
14が回転し、UP−dawnカウンタ11の内容が0
(ゼロ)になった時点でモータ14は止まることになる
。以上の動作を第8図のタイミング図より説明すると、
例えばCW力方向あればCW力方向指令・ぞルス1′が
立上がった後の最初のφ1同期信号・にルス5′が立上
り検出回路の出力3′として出る。これは同期化された
CW力方向指令・ぐルスとなる。この指令より、モータ
14及びiRルスジエネレータ16が回転し、A相信号
’ルス(16’−A )及ヒB相信号ノeルス(16’
−B)が発生し、A相信号ノRルス(16’−A)ノ立
ち上がった後の最初のφ4同期信号・ぞルス8′が、4
LBa信号’ルス(16’ −B )カッ・イレペルで
あれば、同期化されたCW力方向フィードバック・ぐル
ス19′となる。また、同様にA@傷信号ぞルス(16
’−A)の立ち下がった後の最初のφ2同期信号ノ々ル
ス6’が、 もt、n相i号ノvルス(16’−B)が
ハイレベルであれば、同期化された後のCCW方向のフ
ィードバック・臂ルス加′となる。
enter. The data counted by this instant/down counter 11 is transferred to the D/A (digital-to-analog) converter circuit 1.
2 becomes an analog voltage, which becomes the command voltage for the drive circuit 13 of the motor 14, and the motor 14 rotates in the CW force direction mechanically connected to the tacho generator 15E pulse generator] The signal is fed back to the drive circuit 13, speed control is applied, and the pulse generator 16 A phase signal (16
-A) is input to the rising edge detection circuit 17 and the falling edge detection circuit 1st. The rising edge detection circuit 17 outputs a signal synchronized with the φ4 synchronizing signal 8 to the AND circuit 19, and the falling edge detection circuit 1
8 outputs a signal synchronized with the φ2 synchronization signal 6 to the AND circuit. At this time, when the KB phase signal from the other terminal of the two AND circuits (19, 20) is input, the signal from the rising edge detection circuit 17 will change to the UP-down counter 1 if it is in the CCW inversion direction depending on the rotation direction of the A pulse generator 16.
If it is in the CW force direction, the signal from the fall detection circuit is input to the UP-down counter 1 terminal. That is, the rising detection circuit 17 and the falling detection circuit 18
and an AND circuit (19, 20) constitute a direction discrimination circuit. In this example, the dow in the CW force direction is
When a signal is input to the n terminal, the motor 14 rotates by the commanded rotation angle by subtracting the same number as the command and rotation number, and the contents of the UP-down counter 11 become 0.
(0), the motor 14 will stop. The above operation will be explained using the timing diagram shown in Fig. 8.
For example, in the case of the CW force direction, the pulse 5' is output as the output 3' of the rise detection circuit at the first φ1 synchronization signal after the CW force direction command pulse 1' rises. This results in a synchronized CW force direction command. Based on this command, the motor 14 and the iR pulse generator 16 rotate, and the A-phase signal 'rus'(16'-A) and the B-phase signal 'e' pulse (16') are rotated.
-B) is generated, and the first φ4 synchronization signal ZOLS 8' after the rise of the A-phase signal RLS (16'-A) is 4
If the LBa signal 'rus (16' -B) is active, it becomes a synchronized CW force direction feedback signal 19'. Also, similarly A@wound signal zorus (16
If the first φ2 synchronizing signal No. 6' after the fall of '-A) is at a high level, if the t, n phase i No. v pulse (16'-B) is at high level, after synchronization This results in feedback and arm lasing in the CCW direction.

本発明は上記動作説明から明らかなように方向弁別及び
同期化を同時に行なっているので、回路が簡単に構成で
き、またCW力方向指令・ぞルス1′、CCW方向の指
令pRルス2′、人相信号/ぞルス(16’−A)及び
B相信号・ぞルス(16’−n)を各々位相(5) のずれた信号に同期させている為、各信号が同時に、ま
たは重なってカウンタに入力することがない為、誤カウ
ントしない。すなわち、回転角誤差を生じないという信
頼性の高いモータ制御を行うことができる。
As is clear from the above description of the operation, the present invention performs direction discrimination and synchronization at the same time, so the circuit can be easily configured. Since the human phase signal/Zorus (16'-A) and the B-phase signal/Zorus (16'-n) are each synchronized with a signal with a phase difference of (5), each signal may be sent at the same time or overlapping. Since there is no input to the counter, there is no miscounting. That is, highly reliable motor control that does not cause rotational angle errors can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例としてのモータ制御用・ぞル
ス同期化回路を用いた留り位置制御回路のブロック図、
第2図は第1図の留り位置制御回路に用いた4つの各々
位相の異なる信号を作る回路、第3図は第2図の回路よ
り作られるφ1同期信号5、φ2同期信号6、φ5同期
信号7、φ4同期信号8のタイミング図、第4図は第1
図のゾロツク図における立上り検出回路(17,3,4
)の回路図、第5図は第4図の立上り検出回路のタイミ
ング図、第6図は第1図のフロック図における立下り検
出回路18の回路図、第7図は第6図の立下り検出回路
のタイミング図、第8図は全回路の動作タイミング図で
ある。 (6) 1・・・CW力方向指令入力端子、2・・・CCW方向
の指令端子、3・・・立上り検出回路、4・・・立上り
検出回路、5・・・φ1同期信号、6・・・φ2同期信
号、7・・・φ3同期信号、8・・・φ4同期信号、9
・・・OR回路、1(1−OR回路、11・・・UP−
dowrIカウンタ、12−D/A変換回路、13・・
・駆動回路、14・・・モータ、15・・・タコ)xネ
レ−p、16・・りぞルスジエネレータ、16−A・・
・ノルスジエネレータからのA相信号、1fi−B・・
・ノルスジエネレータからのB相信号、17・・・立上
り検出回路、18・・・立下り検出回路、19・・・A
ND回路、頒・・・AND回路、21・・・基準発振回
路、ρ・・・T−FF回路、田・・・AND回路、瀕・
・・Dラッチ回路、5・・・反転回路、か・・・AND
回路、1′・・・CW力方向指令ノソルス、2′・・・
CCW方向の指令・e/I/ス、3′・・・同期化され
た後のCW力方向指令・にルス、4′・・・同期化され
た後のCCW方向の指令・ξルス、5′・・・φ1同期
信号・ぞルス、6′・・・φ2同期信号・ぞルス、7′
・・・φ3同期信号・9ルス、8′・・・φ4同期信号
・ぞルス、16’−A・・・A相信号ノソルス、16’
−B・・・B111−WjtJ!ルス、1g′・・・C
W力方向エンコーダ・ぞルス、額′・・・CCW方向の
エンコータノξルス。 ψ           ψ t^(m−11’lもW  ”CD
FIG. 1 is a block diagram of a stop position control circuit using a motor control/zoles synchronization circuit as an embodiment of the present invention.
Figure 2 shows a circuit that generates the four signals with different phases used in the stop position control circuit of Figure 1, and Figure 3 shows the φ1 synchronization signal 5, φ2 sync signal 6, and φ5 generated by the circuit in Figure 2. Timing diagram of synchronization signal 7 and φ4 synchronization signal 8, Fig. 4 is the first
The rising edge detection circuit (17, 3, 4
), Figure 5 is a timing diagram of the rising edge detection circuit in Figure 4, Figure 6 is a circuit diagram of the falling edge detection circuit 18 in the block diagram of Figure 1, and Figure 7 is a timing diagram of the falling edge detection circuit in Figure 6. FIG. 8 is a timing diagram of the detection circuit. FIG. 8 is an operation timing diagram of the entire circuit. (6) 1...CW force direction command input terminal, 2...CCW direction command terminal, 3...rise detection circuit, 4...rise detection circuit, 5...φ1 synchronization signal, 6... ...φ2 synchronization signal, 7...φ3 synchronization signal, 8...φ4 synchronization signal, 9
...OR circuit, 1 (1-OR circuit, 11...UP-
dowrI counter, 12-D/A conversion circuit, 13...
・Drive circuit, 14...Motor, 15...Tach)
・A phase signal from Norsgenerator, 1fi-B...
・B phase signal from the Norsgenerator, 17...Rise detection circuit, 18...Fall detection circuit, 19...A
ND circuit, distribution...AND circuit, 21...reference oscillation circuit, ρ...T-FF circuit, field...AND circuit,
...D latch circuit, 5...inverting circuit, or...AND
Circuit, 1'...CW force direction command nosolus, 2'...
CCW direction command/e/I/s, 3'... CW force direction command after synchronization/Ni Lus, 4'... CCW direction command/ξ Lus after synchronization, 5 ′...φ1 synchronization signal/zorus, 6′...φ2 synchronization signal/zorus, 7′
... φ3 synchronous signal, 9th, 8'...φ4 synchronous signal, 16'-A...A phase signal, 16'
-B...B111-WjtJ! Rus, 1g'...C
W force direction encoder ξ, forehead'... Encoder ξ in the CCW direction. ψ ψ t^ (m-11'l is also W ”CD

Claims (1)

【特許請求の範囲】[Claims] ノRルスジエネレータを用いたモータのアップ・ダウン
カウンタを用いta留り位置制御において、指令ノξル
スとエンコーダからのノξルスが重なって偏差カウンタ
に入力されないように、・9ルスジエネレータのA相信
号、B相信号、正転方向の指令・ぞルス信号、反転方向
の指令・モルス信号の4つの信号の各々を4つの位相の
ずれた信号に同期させることにより誤カウントを防ぐと
共に方向弁別も同時に行なうようにしたことを特徴とす
るモータ制御用tRルス同期化回路。
In the TA position control using the up/down counter of a motor using a Norusu generator, in order to prevent the command Nose ξ and the Nose ξ from the encoder from overlapping and being input to the deviation counter, By synchronizing each of the four signals: , B phase signal, forward rotation direction command/Zorus signal, and reverse direction command/Morse signal with four phase-shifted signals, erroneous counting is prevented and direction discrimination is also possible at the same time. A tR pulse synchronization circuit for motor control, characterized in that:
JP58012614A 1983-01-31 1983-01-31 Pulse synchronizer for controlling motor Pending JPS59139881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58012614A JPS59139881A (en) 1983-01-31 1983-01-31 Pulse synchronizer for controlling motor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58012614A JPS59139881A (en) 1983-01-31 1983-01-31 Pulse synchronizer for controlling motor

Publications (1)

Publication Number Publication Date
JPS59139881A true JPS59139881A (en) 1984-08-10

Family

ID=11810250

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58012614A Pending JPS59139881A (en) 1983-01-31 1983-01-31 Pulse synchronizer for controlling motor

Country Status (1)

Country Link
JP (1) JPS59139881A (en)

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