JPS59133766A - Control system of abbreviated dial - Google Patents

Abstract

PURPOSE:To decentralize the danger and to improve the system reliability by decentralize the storing means for abbreviated dial information to a line circuit of a multi-function telephone set. CONSTITUTION:Multi-function telephone line circuits 3A-3N are stored in a main channel network 60 of a telephone exchange 6. While multi-function telephone sets 1A-1N are connected to the circuits 3A-3N via digital transmission lines. A line circuit 3i extracts a control signal showing the state change of a telephone set 1i as well as the key operating state and stores the abbreviated dial information. Then the circuit 3i converts the read-out abbreviated dial information into a PB signal and transmits it to the network 60.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an abbreviated dialing control system, and more particularly to an abbreviated dialing control system in a storage program controlled telephone switching system that accommodates multi-function telephones.

[Prior art and problems]

In general, speed dial information is stored in memory according to the number of speed dial registered subscribers (hereinafter referred to simply as registered subscribers), the number of speed dial codes, and the number of digits of the other party's subscriber number (speed dial information) corresponding to each speed dial code. is necessary. Here, if there are 10 speed dial codes for registered subscribers, and the speed dial information corresponding to each speed dial code is composed of a maximum of 32 digits in consideration of international calls and special services, Since a minimum of 4 bits of memory is required to represent one digit, 160 bits of memory is required for each registered subscriber.
Bytes of memory are required.

In the conventional program-controlled telephone switching system, the main body of the switchboard is equipped with a storage device (file memory) that stores files created for each registered subscriber, and each time a registered subscriber makes a speed dial call, a file is stored from the file memory. An abbreviated dialing control method is used in which the required read information is code-converted into a partner subscriber number (selection signal) and sent to the opponent station.

However, in this system, as the number of registered subscribers increases, the capacity of the file memory increases, and the final number of registered subscribers, which varies from station to station, is predicted and an expensive file memory, such as a magnetic drum device, is installed with a capacity corresponding to this. This has the disadvantage that the exchange itself becomes expensive because it must be installed initially or expanded when the capacity of the installed file memory is exceeded. The drawback was that restricting speed dialing would lead to a decline in the quality of the speed dial service. Furthermore, since the file memory is concentrated, a failure thereof would affect all registered subscribers, creating problems in terms of reliability.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a speed dial control system that solves the above-mentioned drawbacks and problems by distributing speed dial information storage means in a multifunction telephone line circuit for registered subscribers.

[Summary of the invention]

The speed dial control system according to the present invention is an accumulation system comprising a multi-function telephone line circuit accommodated in the main communication path network of a telephone exchange, and a multi-function telephone set connected to the multi-function telephone line circuit via a digital transmission path. In the program-controlled telephone switching system, the multifunction telephone line circuit includes extraction means for extracting control signals indicating state changes and key operation states of the multifunction telephone, storage means for accumulating speed dial information, and the speed dial It is characterized in that it includes a control means for reading and writing information, and a sending means for converting the speed dial information read by the control means into a PB signal and sending it to the main communication channel network.

[Embodiments of the invention]

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the speed dial control system of the present invention. In the same figure, a plurality of (ni-specific) multifunction telephone groups IA to IN are each connected to a plurality of (ni-specific) multifunction telephone groups IA to IN.
m) multi-function telephones (hereinafter referred to as DFP) 1ao to 1a! a
1no to 1n1 are grouped, and are connected to multifunction telephone line circuits (hereinafter referred to as DLC) 3A to 3NK via digital transmission lines 2 to 2N, respectively.

Further, the exchange main body 6 connects the D via the digital transmission path 4.
Main channel network (hereinafter referred to as NW) that accommodates LC3A, ~3N
) 60, a central processing unit (hereinafter referred to as CPU) 62 that performs exchange control processing in the NW 60, and a signal control device (hereinafter referred to as 8GC) connected to the CPU 62 and the NW 60 and to the DLCs 3A, 3N by a control line 5. )6
1, and a main memory device (hereinafter referred to as MM) 63 that stores exchange processing programs and the like. Note that each of the multifunction telephone groups IA, ~IN has a maximum of m (for example, 4
DFPs are grouped together, and the number of DFPs actually installed in each group is not necessarily the same as long as it is an integer of four or less, if necessary. Also, the D
LC3A and LC3N are each integrated with four line circuits having the same function corresponding to each DFP. Further, the digital transmission lines 2, 2N, and 4 can transmit digital data as well as digital voice and control information.

Next, the main operations of this embodiment will be explained.

When registering speed dial information from the DFP, for example, DFPlao makes a call and presses a function key such as a registration instruction key or an address instruction key corresponding to a speed dial code, and a numeric key (hereinafter referred to as predetermined keys). The DFP l
When a calling signal indicating a change in the status of a o (off footer state) is sent to the exchange main body 6 via the digital transmission line 2A, DLC 3A and control line 5, the generally known calling connection is established in the exchange main body 6. 4. The transmitted tone is transmitted through the digital transmission line 4. The signal is sent to the DFP 1ao via the DLC 3A and the digital transmission line 2A. Then, the DFP
1a,) transmits control information indicating the operating state of the pressed predetermined electronic keys to the two digital transmission lines. When the DLC 3A extracts the control information indicating the registration instruction key operation and transfers it to the CPU 62 via the control line 5°5GC 61, the CPU 62 sends back a registration execution instruction in cooperation with the MM 63, so the DLC 3A Based on the execution instruction and the subsequently extracted control information indicating the address instruction telephone key operation and control information indicating the abbreviated dial information, the writing or rewriting of the abbreviated dial information to a predetermined address in the own abbreviated dial memory, that is, registration is completed. The determination of the completion of registration is made in the exchange main body 6 using a generally known appropriate method such as timing monitoring.

Further, the operation when displaying the registered speed dial information on the DFP is performed in accordance with the above-mentioned registration operation. That is, for example, when DFPlao makes a call and presses a predetermined function key such as a display instruction key and an address instruction key corresponding to a speed dial code.

The DLC 3A reads the abbreviated dial information of a predetermined address from the abbreviated dial memory based on the display execution instruction from the exchange main body 6 and the control information of the address instruction extracted thereafter, and reads out the abbreviated dial information of the predetermined address from the abbreviated dial memory,
1ao and displayed.

Furthermore, the operation when the DFP makes a speed dial call is similar to the display operation described above. That is, for example, when DFPlao makes a call and presses a predetermined function key such as a dialing instruction key and an address instruction key corresponding to a speed dial code, the DL
C3A reads out the speed dial information of a predetermined address from the speed dial memory based on the calling execution instruction from the exchange main body 6 and the control information of the address instruction extracted thereafter. 4 to the exchange main body 6.

Based on the PB signal received by the NW 60, the exchange main body 6 performs a generally known exchange connection operation to the other subscriber. At this time, the exchange main body 6 is connected to the DLC 3.
It is clear that the exchange main body 6 performs the same exchange connection processing as for a general outgoing call because it receives from A a destination subscriber selection signal (that is, a numeric signal of all digits of the destination subscriber number) rather than a speed dial code. .

It goes without saying that the above registration 9 display and call operation are the same no matter which DF'P other than the DFP 1ao is used.

In this embodiment, the name and operation order of the predetermined electronic keys can be determined in advance such as 9 for registration instruction, 1 for address instruction, 1 for dialing instruction, etc., depending on the type of functional key equipped with the DFP used. Bye. Further, these instructions may be provided by pressing a combination of numeric keys or special keys such as * and #.

Next, a detailed description will be given with reference to FIG. 2 showing an example of the configuration of the multi-function telephone line circuit in FIG. 1. In the same figure,
The DLC 3 includes a control information extraction circuit (hereinafter referred to as EXT) 300 that extracts a control signal (serial signal) from the digital transmission line 2 at a first period To and converts it into a parallel signal, and the EX
A control information reception latch circuit (hereinafter referred to as RCL) 301 that latches a parallel signal from T300 and transmits it to an interface control circuit (hereinafter referred to as IFC) 312, and the above-mentioned IFC 312.
Control information transmission latch circuit that latches control information from
5NL) 302, a P-8 converter (hereinafter referred to as P/5) 303, which converts this latched control information (parallel signal) into a serial signal and sends it to the control line 5, and a serial signal from the control line 5. An S-P converter (hereinafter referred to as S/P) 304 that converts into control information (parallel signal), and the S/P 3
RCL 305 latches the control information from 04 and sends it to the IFC 312, 8NL 306 latches the control information from IF'C 312, and converts the latched control information into a serial signal and sends it to the IFC 312. a control information addition circuit (hereinafter referred to as ADD) 307 that additionally transmits data to the digital transmission path 2; a timing control circuit (hereinafter referred to as TMC) 308 that controls the timing information of the cycles To and T1 according to instructions from the IFC 312;
A selection signal latch circuit (hereinafter referred to as 5QL) 30 that latches the partner selection signal (parallel signal) received via 2
9, and a PB signal generation circuit (hereinafter referred to as PBG) 3 that receives this latched selection signal and generates a digital PB signal.
10, a selector (hereinafter referred to as 5EL) that selects the digital audio from the EXT 300 and the digital PB signal from the PBG 310 and transmits it to the digital transmission path 4.
) 311 and the above R, CL301, 305, 5NL30
2,306° The IFC 312 performs interface control with the TMC 308 and 8GL 309, and the speed dial memory (hereinafter referred to as ADM) 3 that stores speed dial information.
13, and a memory (hereinafter referred to as ME) that stores processing programs, etc.
M) 314, reads the contents of the MEM 314, executes predetermined program processing such as writing/reading speed dial information to/from the ADM 313, and
12, and a microprocessor (hereinafter referred to as MPR) 315 that exchanges predetermined control information with each of the circuits described above via 12.

In the operation of registering speed dial information, first, the EXT 300 sends a serial signal indicating the operation of the registration instruction telephone key from the digital transmission path 2 at a first cycle To under the control of the TMo 308.
, and converts it into a parallel signal, which is latched into the RCL 301. The parallel signal latched in the R and CL 301 is transferred to the MPR 315 via the IFC 312,
The MPR 315 reads the program in the MEM 314 and performs necessary processing, and then causes the SNL 302 to latch a parallel signal indicating a registration request via the IFC 312. The parallel signal latched by the 8NL 302 is converted into a serial signal by the P/S 303 and sent to the control line 5.
sent to. On the other hand, a serial signal indicating a registration execution instruction from the control line 5 is converted into a parallel signal by the S/P 304, latched by the R'CL 305, and then sent to the IFC 312.
The data is transferred to the MPR 315 via the MPR 315. The MPR31
After the EXT 300 performs the necessary processing in cooperation with the MEM 314, the control information indicating the operation of the address instruction telephone key and the control information indicating the destination subscriber selection number (speed dial information) sequentially extracted by the EXT 300 are RCL301
The M
Transferred to PR315. iMPR315 is the MEM
ADM313 by the program read from 314.
Since the address is specified at the address, the speed dial information is registered at the predetermined address.

Further, in the display operation, the operation from the digital transmission path 2 to extracting the serial signals indicating the operation of the display instruction telephone key and then the operation of the address instruction telephone key and transferring them to the MPR 315 is the same as the above-mentioned registration operation. The MPB, 3
15 is the ADM313 according to the display execution instruction from the control line 5.
After reading out the speed dial information (parallel signal) of a predetermined address and latching it to the SNL 306 via the IF'C' 312, the ADD 307 converts the latched parallel signal into a serial signal and outputs the serial signal under the control of the TMC 308. The digital transmission line 2 is added at a period T1 of 2.
Send to.

Furthermore, the transmission operation is similar to the display operation described above, and in the end MPR31
After 5 receives the call execution instruction, it reads out the abbreviated dial information (parallel signal) of a predetermined address from ADM 313 and latches it into 5GL 309 via IFC 312 . P
B0310 converts this latched parallel signal into a digital PB signal and transmits it to digital transmission line 4 via %8EL311. Note that when the exchange main body 6 (shown in FIG. 1) completes the predetermined exchange connection, the digital audio from the digital transmission line 2 is transferred to the EXT300°8BL3.
11 to the digital transmission line 4, and digital audio in the opposite direction is transmitted via the ADD 307.

As is clear from the above description, the extracting means, storage means, control means, and sending means recited in the claims are each EXT300. ADM313. MEM314 and MP
Corresponds to R, 315, PBG310 and 5EL311.

Next, FIG. 3 is a diagram showing an example of the configuration of the speed dial memory in FIG. 2. In the same figure, ADM313 has 4
The memory consists of lio, ~≠3, and each memory is m
(for example, 10) RAMs. Assuming that each RAM has a capacity of 16 bytes as mentioned above, the ADM313
The storage capacity of is 16xlOX4=640 bytes. Note that the suffix number of the RAM represents each address.

The above examples do not limit the invention.

In other words, speed dial registration and display are performed based on the respective execution instructions received from the exchange main body, but these execution instructions may be omitted and processing only within the DLC, or the ADM and MEM within the DLC may be Since the storage capacity is at most IK bytes and 2 bytes, these memories may be included in the MPR to form a microprocessor with memory.

〔Effect of the invention〕

As is clear from the above explanation, according to the speed dial control system of the present invention, since the speed dial information storage means is individually installed in the multi-function telephone line circuit, the reliability of the system is improved by dispersing risks, and As the number of users increases, it is only necessary to add the multi-function telephone line circuit and there is no effect on the main body of the exchange, resulting in the effect that the economical efficiency of the speed dial service is significantly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the speed dial control system of the present invention, FIG. 2 is a block diagram showing an example of the configuration of the multi-function telephone line circuit in FIG. 1, and FIG. FIG. 3 is a diagram showing an example of a configuration of a speed dial memory. In the figure, T, IA, ~IN... Concave line function phone group, lao~1a Yu Ino, ~1 nm... Concave line function phone DFP, 2, 2A, ~2N, 4... Musical digital transmission line, 3, 3A , ~3N...Multi-function telephone line circuit DLC, 5. Song/control line, 6. Song/exchange body. 60... Main channel network NW, 61... Signal control device 8GC, 62... Music central processing unit CPU, 6
3. Voluntary storage device MM, 300. Music control information extraction circuit EXT, 301, 305.. Surface control information reception latch circuit RCL, 302, 306.. Control information transmission latch circuit 8NL, 303..・-・ps converter p/s
, 304...S-P converter S/P, 3
07... Song control information addition circuit ADD, 308... Timing control circuit TMC, 309... Selection signal latch circuit SGL, 310... PB signal generation circuit PBG, 311... Song selector SEL% 312
... Song interface control circuit IFC, 313 ...
...Speed dial memo IJADM, 314...
Memory MEM, 315...4 microprocessor MPR
0 371

Claims (1)

[Claims] In the storage program controlled telephone switching system comprising a multi-function telephone line circuit accommodated in a main communication path network of a telephone exchange, and a multi-function telephone connected to the multi-function telephone line circuit via a digital transmission path, The multifunction telephone line circuit includes an extraction means for extracting a control signal indicating a change in the state of the multifunction telephone and a state of key operation, a storage means for accumulating speed dial information, and a control means for reading and writing the speed dial information. . A speed dial control system, characterized in that it includes a transmission means for converting the speed dial information read by the control means into a PB double signal and transmitting the converted signal to the main communication channel network.