JPS5913343A - Redundancy circuit device - Google Patents

Redundancy circuit device

Info

Publication number
JPS5913343A
JPS5913343A JP57121736A JP12173682A JPS5913343A JP S5913343 A JPS5913343 A JP S5913343A JP 57121736 A JP57121736 A JP 57121736A JP 12173682 A JP12173682 A JP 12173682A JP S5913343 A JPS5913343 A JP S5913343A
Authority
JP
Japan
Prior art keywords
junction
substrate
diffusion region
protective film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57121736A
Other languages
Japanese (ja)
Inventor
Masakazu Shiozaki
塩崎 雅一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57121736A priority Critical patent/JPS5913343A/en
Publication of JPS5913343A publication Critical patent/JPS5913343A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To enable a writing to a conductive state from a non-conductive state at a high rate of success by forming a p-n junction under a reverse bias state diffused and formed from the surface of a semiconductor substrate and a protective film of specific film thickness formed to the surface of the substrate on the junction section. CONSTITUTION:An n type impurity is diffused to the substrate 11 from the opening section of a field silicon oxide film 12, and an n type diffusion region 15 of approximately 0.5mum diffusion depth is formed. The substrate 11 and the diffusion region 15 are each wired properly so that the p-n junction section formed by the diffusion region 15 and the semiconductor substrate 11 is brought to a reverse bias state. The protective film 14 of a silicon oxide film is formed to the whole surface on the substrate 11 in film thickness of 0.5mum or more. When YAG pulse laser beams are irradiated selectively to said p-n junction section, they do not scatter when the thickness of the protective film 14 is made 0.5mum or more, a crystal is damaged, and stable junction leakage currents Il are obtained positively. when the diffusion depth of said n type diffusion region 15 reaches 1.0mum or more, the p-n junction is made difficult to be damaged through laser irradiation.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、冗長回路装置に関するもので、特にバイポ
ーラLSI 、、 MOS−LSI等に使用される。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a redundant circuit device, and is particularly used for bipolar LSIs, MOS-LSIs, and the like.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

今日、半導体装置の篩集積化が目覚しく、メモリ等では
、−個の製品の中に非常に多数のメモリビットが収納さ
れるようになった。この高集積化に伴い、主回路のメモ
リ内に少量の不良ピットが発生した場合には、予め予備
回路として冗長回路を形成しておき、不良ビットを冗長
回路内の冗長ビットと電気的に置き換える冗長技術が採
用されている。
Today, the integration of semiconductor devices is remarkable, and in the case of memories, an extremely large number of memory bits are now housed in a single product. With this increase in integration, if a small amount of defective pits occur in the memory of the main circuit, a redundant circuit is formed as a backup circuit in advance, and the defective bits are electrically replaced with redundant bits in the redundant circuit. Redundancy technology is employed.

このような冗長技術としては次のようなものが用いられ
ている。第1図(at (blに示すのは溶断型の一例
で、シリコン基板J1上形成されたフィールドシリコン
酸化膜(5i02膜)12上に冗長回路のヒユーズとな
るポリシリコン13の配線を形成し、この基板1ノ上面
に保護膜ノ4として例えばCVD法によるシリコン酸化
膜(CVD5I02膜)を被着する。
The following redundancy techniques are used. The one shown in FIG. 1 (at (bl) is an example of a blowout type, in which a polysilicon wiring 13 that will serve as a fuse for a redundant circuit is formed on a field silicon oxide film (5i02 film) 12 formed on a silicon substrate J1. For example, a silicon oxide film (CVD5I02 film) is deposited on the upper surface of the substrate 1 as a protective film 4 by the CVD method.

このようなヒユーズによシ王回路のメモリビットの不良
情報を書き込む場合は、レーデ光をこのポリシリコン1
3に照射し、ポリシリコン13を第2図(a) (b)
に示すように溶断する。しかし、このようにすると、溶
断時には上記の保護1114も同時に飛散し、この半導
体装置の信頼性に悪影響を及ばず。
When writing defect information of the memory bit of the circuit to such a fuse, the radar light is connected to this polysilicon 1.
2 (a) (b)
Fuse as shown. However, if this is done, the protection 1114 will also be scattered at the same time when the fuse blows out, and the reliability of this semiconductor device will not be adversely affected.

また、そのような欠点を除く九め、予め保護膜14のレ
ーザ光照射部位をフォトエ、チングによシ開孔しておく
ことも考えられるが、この場合には、長時間の使用中に
Na十等の汚染イオンが開孔部より浸入する恐れがある
In addition, to eliminate such drawbacks, it may be possible to make a hole in the laser beam irradiation area of the protective film 14 in advance by photo-etching or etching, but in this case, Na There is a risk that contaminant ions of grade 10 may enter through the openings.

また、この他にアンドープのIリシリコンの配線の一部
に不純物を集中的に注入し不純物非拡散部を形成してお
き、不良ビットに対応する冗長ビットの書き込みのとき
には、上記非拡散部に一部エネルギーのレーザ光を照射
し、不純物を拡散させ、ぼりシリコン配線を非導通状態
から導通状態にする導通型のものもある。しかし、この
場合で社、レーザビームの照射位置の合わせずれや、パ
ワーのゆらぎなどの微妙な変化に大きく依存し、不純物
拡散の成功する確率が約50俤と低く、大量生産には不
都合である欠点があった。
In addition, impurities are intensively implanted into a part of the undoped I silicon wiring to form an impurity non-diffused part, and when writing redundant bits corresponding to defective bits, the non-diffused part is filled with impurities. There is also a conductive type that irradiates a laser beam with a certain energy to diffuse impurities and change the silicon wiring from a non-conductive state to a conductive state. However, in this case, it is highly dependent on subtle changes such as misalignment of the laser beam irradiation position and power fluctuation, and the probability of successful impurity diffusion is as low as about 50, which is inconvenient for mass production. There were drawbacks.

〔発明の目的〕[Purpose of the invention]

この発明は上記のような点に鑑みなされたもので、半導
体基板上面に形成された保護膜に開口部を設けたり損傷
を与えたシすることなく、高い成功率で非導通状態から
導通状態に設定可能彦導通型の冗長回路装置を提供しよ
うとするものである。
This invention was made in view of the above points, and it is possible to change a non-conductive state to a conductive state with a high success rate without creating an opening or damaging the protective film formed on the top surface of a semiconductor substrate. It is an object of the present invention to provide a configurable conduction type redundant circuit device.

〔発明の概要〕[Summary of the invention]

すなわち、この発明に係る冗長回路装置は、半導体基板
表面から拡散形成した逆バイアス状態のpH接合部と、
このpH接合部上の基板表面に形成した膜厚0.5μm
以上の保護膜とを備え、レーザ光照射により上記pH接
合部の結晶に損傷が与えられた場合には非導通状態から
導通状態に設定されるようにしたものである。
That is, the redundant circuit device according to the present invention includes a pH junction in a reverse bias state formed by diffusion from the surface of a semiconductor substrate;
The thickness of the film formed on the substrate surface above this pH junction is 0.5 μm.
The protective film described above is provided, and when the crystal at the pH junction is damaged by laser beam irradiation, the non-conductive state is set to the conductive state.

〔発明の実施例〕[Embodiments of the invention]

以下図面を射照してこの発明の一実施例につき説明する
。第3図において、p型半導体基板11に開口部を有す
るフィールドシリコン酸化膜12を形成し、上記開口部
よりn型不純物を基板1ノに拡散させて、約0.5μm
の拡散深さのn1li拡散領域15を形成する。そして
、この拡散領域15と半導体基板11とが形成するpH
接合部を逆バイアス状態となるように適宜基板11と拡
散領域15とをそれぞれ配線する。さらにこの基板11
上全面にCVD法によって形成したシリコン酸化膜の保
護膜14を0.5μm以上の膜厚で形成する。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 3, a field silicon oxide film 12 having an opening is formed on a p-type semiconductor substrate 11, and an n-type impurity is diffused into the substrate 1 through the opening to a depth of approximately 0.5 μm.
An n1li diffusion region 15 is formed with a diffusion depth of . The pH value formed by this diffusion region 15 and the semiconductor substrate 11 is
The substrate 11 and the diffusion region 15 are appropriately wired so that the junction portion is in a reverse bias state. Furthermore, this board 11
A protective film 14 of a silicon oxide film is formed on the entire upper surface by a CVD method to a thickness of 0.5 μm or more.

このような装置において、上記拡散領域15および半導
体基板11は、通常は逆バイアス状態に設定され非導通
状態となっている。ここで、拡散領域15と基板11の
pH接合部に選択的にYAG /臂ルスレーデ光を照射
すると、保護膜14が飛散することなく pH接合部付
近の結晶が損傷を受け、ジャンクシ、ンリーク電流Il
!が流れる。このようにして上記実施例では、数nA〜
数酷の逆方向リーク電流を流すことができた。第4図に
、レーデ光を拡散領域15の中央部に照射した場合のし
〜ザエネルギとレーザビームのスポット径(絞り)およ
びpH接合部に流れるリーク電流11の関係を示す。
In such a device, the diffusion region 15 and the semiconductor substrate 11 are normally set in a reverse bias state and are in a non-conductive state. Here, when the pH junction between the diffusion region 15 and the substrate 11 is selectively irradiated with YAG/Ruslede light, the crystal near the pH junction is damaged without scattering the protective film 14, causing leakage and leakage current Il.
! flows. In this way, in the above embodiment, several nA~
It was possible to pass a severe reverse leakage current. FIG. 4 shows the relationship between the laser energy, the spot diameter (diaphragm) of the laser beam, and the leakage current 11 flowing through the pH junction when the central part of the diffusion region 15 is irradiated with Radical light.

また、レーザ光を拡散領域15に照射する場合、第3図
で示す拡−散領域15の周縁部に向けてレーザ光を照射
した方が、n型拡散領域15の中央部に向けて照射した
場合よシ、小さいエネルギでリークを起こさせることが
でき、また、保護膜14を飛散させることなく確実で安
定したリーク電流14を得るためには、保護膜14は0
.5μm以上の膜厚が必要であることが判明した。
Furthermore, when irradiating the diffusion region 15 with laser light, it is better to irradiate the laser light toward the periphery of the diffusion region 15 as shown in FIG. In some cases, in order to cause leakage with a small amount of energy and to obtain a reliable and stable leakage current 14 without scattering the protective film 14, the protective film 14 must be
.. It has been found that a film thickness of 5 μm or more is required.

さらに、n型拡散領域15の拡散深さすなわちpH接合
部の深さを0.5μmとしたが、拡散深さが1.0μm
以上となると、レーデ照射によりpn接合の損傷を与え
ることが難しくなる。
Furthermore, although the diffusion depth of the n-type diffusion region 15, that is, the depth of the pH junction part, was set to 0.5 μm, the diffusion depth was 1.0 μm.
In this case, it becomes difficult to damage the pn junction by radar irradiation.

上記のようにして、pH接合部を形成し、例えば第5図
に示すように、第3図の基板Iノを接地し、n型拡散領
域16に抵抗16を介して正の電源ラインに接続すれば
抵抗16とpnジャンクション(ダイオード17)との
接続点18の電位をレーザ光未照射状態でVDDl レ
ーザ光照射後では約OVに変化させることができる。
As described above, a pH junction is formed, and for example, as shown in FIG. 5, the substrate I in FIG. By doing so, the potential at the connection point 18 between the resistor 16 and the pn junction (diode 17) can be changed from VDDl in the non-laser beam irradiation state to approximately OV after the laser beam irradiation.

従って、第5図に示すような素子を主回路のメモリの冗
長ビットとしていくつか用意しておき、メモリの不良箇
所をこの冗長ビットに書き込んで、主回路の誤動作を防
ぐようにすれば良い。
Therefore, it is sufficient to prepare several elements as shown in FIG. 5 as redundant bits of the memory of the main circuit, and to write the defective part of the memory into the redundant bits to prevent malfunction of the main circuit.

なお、上記実施例では、n型拡散領域15上に形成する
保護膜14をシリコン酸化膜としたが、酸化膜と同様に
レーザ光を吸収しにくいシ  4゜リコン窒化膜或は窒
化膜と上記酸化膜との積層膜を保護膜として被着しても
良く、基板1ノおよび拡散領域を上記実施例の場合と逆
導電型で構成しても良い。さらに、pn接合部は、基板
内に形成された例えば−導電型の拡散領域に、逆導電型
不純物を拡散して形成するなどしても良いことは明らか
で、また、冗長ビットとしての回路構成も第5図で示す
ものに限らず、pn接合部の配線もアルミニウム系金属
或はポリシリコン等を用いても良い。
In the above embodiment, the protective film 14 formed on the n-type diffusion region 15 was a silicon oxide film. A laminated film with an oxide film may be deposited as a protective film, and the substrate 1 and the diffusion region may be constructed of a conductivity type opposite to that of the above embodiment. Furthermore, it is clear that the pn junction may be formed by diffusing an impurity of the opposite conductivity type into a -conductivity type diffusion region formed in the substrate, for example. The wiring of the pn junction is not limited to that shown in FIG. 5, and the wiring of the pn junction may be made of aluminum metal, polysilicon, or the like.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、半導体装置の上部膜や
保護膜に開口部を設けたジ、或は損傷を与えたりするこ
−とがなく・高い成功率で非導通状態から導通状態に書
き込み可能な冗長回路装置を提供でき、レーザ光照射状
態を適当に設定すれば安定して書き込みの成効率を10
0チとすることが可能で、メモリ等の半導体製品の生産
性に大いに寄与するものである。
As described above, according to the present invention, it is possible to change a semiconductor device from a non-conductive state to a conductive state with a high success rate without causing any damage or damage to the upper film or protective film of the semiconductor device. It is possible to provide a writable redundant circuit device, and if the laser beam irradiation state is appropriately set, the writing efficiency can be stably increased to 10.
0 chips, which greatly contributes to the productivity of semiconductor products such as memories.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(at (blはそれぞれ溶断前の従来の冗長回
路装置を示す断面図および平面図、第2図fa)(bl
はそれぞれ溶断後の従来の冗長回路装置を示す断面図お
よび平面図、第3図はこの発明の一実施例に係る冗長回
路装置を説明する断面図、第4図はレーザエネルギ、レ
ーザビームのスイット径およびリーク電流I、7の関係
を示す図、第5図はこの発明の一実施例に係る冗長回路
装置を説明する回路図である。 1)・・・半導体基板、12・・・フィールドシリコン
酸化膜、14・・・保護膜、15・・・n型拡散領域、
15・・・抵抗、17・・・ダイオード。 出願人代理人  弁理士 鈴 江 武 彦第1図 (a) 3 (a) 第3図 第4図 第5図
Figure 1 (at (bl) is a cross-sectional view and plan view showing a conventional redundant circuit device before blowout, Figure 2 (fa) (bl)
3 is a sectional view and a plan view respectively showing a conventional redundant circuit device after fusing, FIG. 3 is a sectional view illustrating a redundant circuit device according to an embodiment of the present invention, and FIG. 4 is a switch of laser energy and laser beam. FIG. 5 is a diagram showing the relationship between diameter and leakage current I, 7, and is a circuit diagram illustrating a redundant circuit device according to an embodiment of the present invention. 1)... Semiconductor substrate, 12... Field silicon oxide film, 14... Protective film, 15... N-type diffusion region,
15...Resistor, 17...Diode. Applicant's representative Patent attorney Takehiko Suzue Figure 1 (a) 3 (a) Figure 3 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】[Claims] 一導電型の半導体基板と、逆導電型の拡散層と、この拡
散層上に形成された膜厚0.5μm以上の保護膜とを具
備し、逆バイアスされた上記半導体基板と上記拡散層と
のpn接合部はレーデ光照射により非導通状態から導通
状態となることを特徴とする冗長回路装置。
A semiconductor substrate of one conductivity type, a diffusion layer of an opposite conductivity type, and a protective film having a thickness of 0.5 μm or more formed on the diffusion layer, wherein the semiconductor substrate and the diffusion layer are reverse biased. A redundant circuit device characterized in that the pn junction of is changed from a non-conductive state to a conductive state by irradiation with Raded light.
JP57121736A 1982-07-13 1982-07-13 Redundancy circuit device Pending JPS5913343A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57121736A JPS5913343A (en) 1982-07-13 1982-07-13 Redundancy circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57121736A JPS5913343A (en) 1982-07-13 1982-07-13 Redundancy circuit device

Publications (1)

Publication Number Publication Date
JPS5913343A true JPS5913343A (en) 1984-01-24

Family

ID=14818603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57121736A Pending JPS5913343A (en) 1982-07-13 1982-07-13 Redundancy circuit device

Country Status (1)

Country Link
JP (1) JPS5913343A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158293A (en) * 1994-12-06 1996-06-18 Saikiyoushiya:Kk Oil-removing paper and production thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158293A (en) * 1994-12-06 1996-06-18 Saikiyoushiya:Kk Oil-removing paper and production thereof

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