JPS59129236U - Receiver saving circuit - Google Patents

Receiver saving circuit

Info

Publication number
JPS59129236U
JPS59129236U JP2315683U JP2315683U JPS59129236U JP S59129236 U JPS59129236 U JP S59129236U JP 2315683 U JP2315683 U JP 2315683U JP 2315683 U JP2315683 U JP 2315683U JP S59129236 U JPS59129236 U JP S59129236U
Authority
JP
Japan
Prior art keywords
squelch
receiver
saving
switching element
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2315683U
Other languages
Japanese (ja)
Other versions
JPH0241962Y2 (en
Inventor
泰裕 仙波
Original Assignee
株式会社富士通ゼネラル
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社富士通ゼネラル filed Critical 株式会社富士通ゼネラル
Priority to JP2315683U priority Critical patent/JPS59129236U/en
Publication of JPS59129236U publication Critical patent/JPS59129236U/en
Application granted granted Critical
Publication of JPH0241962Y2 publication Critical patent/JPH0241962Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による受信機のセービング回路の一実施
例を示す電気回路図、第2図は第1図の回路の特性図で
ある。 1・・・アンテナ、2・・・高周波増幅部、3・・・混
合部、4・・・局部発振部、5・・・中間周波増幅部、
6・・・検波部、7・・・音声増幅部、8・・・スピー
カ、9・・・スケルチ部、10・・・制御部、11・・
・電源供給線路、12・・・トランジスタ(スイッチン
グ素子)、13・・・セービング用の抵抗、14・・・
抵抗、pl、 p2・・・局部発振出力レベル。
FIG. 1 is an electrical circuit diagram showing an embodiment of a receiver saving circuit according to the present invention, and FIG. 2 is a characteristic diagram of the circuit shown in FIG. DESCRIPTION OF SYMBOLS 1... Antenna, 2... High frequency amplification part, 3... Mixing part, 4... Local oscillation part, 5... Intermediate frequency amplification part,
6... Detection section, 7... Audio amplification section, 8... Speaker, 9... Squelch section, 10... Control section, 11...
・Power supply line, 12... Transistor (switching element), 13... Resistor for saving, 14...
Resistor, pl, p2...Local oscillation output level.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)受信信号に局部発振部の発振周波信号を混合して
中間周波信号に変換し、検波部を介して音′声増幅部に
入力し、この音声増幅部をスケルチ部のスケルチ信号で
制御するようにした受信機において、 該局部発振部の電源供給線路に挿入され、該スケルチ部
のスケルチ信号の有無でオフ、オンするスイッチング素
子と、 該スイッチング素子に並列に接続されたセービング用の
抵抗と を具備したことを特徴とする受信機のセービング回路。  ・
(1) Mix the oscillation frequency signal of the local oscillator with the received signal, convert it to an intermediate frequency signal, input it to the audio amplification section via the detection section, and control this audio amplification section with the squelch signal of the squelch section. In a receiver configured to do so, a switching element is inserted into the power supply line of the local oscillation unit and turns off and on depending on the presence or absence of a squelch signal from the squelch unit, and a saving resistor connected in parallel to the switching element. A receiver saving circuit characterized by comprising:・
(2)実用新案登録請求の範囲第1項記載において、ス
イッチング素子はトランジスタからなり、このトランジ
スタのエミッタを電源側に接続し、コレクタを局部発振
部側に接続し、ベースをスケルチ部の出力側に接続し、
さらに、エミッタ・コレクタ間にセービング用の抵抗を
並列に接続してなる受信機のセービング回路。
(2) Utility Model Registration Scope of Claims As described in paragraph 1, the switching element consists of a transistor, the emitter of this transistor is connected to the power supply side, the collector is connected to the local oscillation part side, and the base is connected to the output side of the squelch part. connect to
Furthermore, the receiver's saving circuit consists of a saving resistor connected in parallel between the emitter and collector.
JP2315683U 1983-02-19 1983-02-19 Receiver saving circuit Granted JPS59129236U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2315683U JPS59129236U (en) 1983-02-19 1983-02-19 Receiver saving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2315683U JPS59129236U (en) 1983-02-19 1983-02-19 Receiver saving circuit

Publications (2)

Publication Number Publication Date
JPS59129236U true JPS59129236U (en) 1984-08-30
JPH0241962Y2 JPH0241962Y2 (en) 1990-11-08

Family

ID=30154244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2315683U Granted JPS59129236U (en) 1983-02-19 1983-02-19 Receiver saving circuit

Country Status (1)

Country Link
JP (1) JPS59129236U (en)

Also Published As

Publication number Publication date
JPH0241962Y2 (en) 1990-11-08

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