JPS59122064A - Trunk test system - Google Patents
Trunk test systemInfo
- Publication number
- JPS59122064A JPS59122064A JP22931182A JP22931182A JPS59122064A JP S59122064 A JPS59122064 A JP S59122064A JP 22931182 A JP22931182 A JP 22931182A JP 22931182 A JP22931182 A JP 22931182A JP S59122064 A JPS59122064 A JP S59122064A
- Authority
- JP
- Japan
- Prior art keywords
- test
- trunk
- tested
- under test
- equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/26—Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
- H04M3/28—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor
Abstract
Description
【発明の詳細な説明】
本発明は、電子交換機に接続され、自動電話端末装置と
対向するトランクの試験方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for testing trunks connected to electronic exchanges and facing automatic telephone terminals.
従来、この種のトランクの試験方式は、アドレス番号な
どを持たせた複数の被試験装置と、被試験装置を試験す
る試験装置が独立した複数の試験制御線によシ接続され
、被試験装置を試験する場合には、制御回路からアドレ
ス番号を指定することにより被試験装置を決定し、試験
要求信号を被試験装置へ送出して被試験トランクを試験
装置に引き込むことによシ試験を実行していた。そのた
め、被試験装置の数が増加すると試験制御線の数も増加
し、さらにアドレス線数も多くなシ、被試験装置と試験
装置との接続が複雑になるという欠点があった。Conventionally, in this type of trunk test method, multiple devices under test each having an address number, etc., and the test equipment that tests the devices under test are connected via multiple independent test control lines. When testing, the device under test is determined by specifying the address number from the control circuit, and the test is executed by sending a test request signal to the device under test and pulling the trunk under test into the test device. Was. Therefore, as the number of devices under test increases, the number of test control lines also increases, and the number of address lines also increases, making the connection between the devices under test and the test equipment complicated.
木兄E!Aは上記の欠点に鑑みてなされたもので、入ト
ランクと出トランク両方の機能を有する1ランクと記憶
回路と、これらを制御する回路から成シ、2本の試験制
御線が並列に接続された複数の被試験装置の被試験トラ
ンク、および初試験装置を試験する試験装置K i−い
て、被試験トランクの試駆開始イ3号によ多制御回路が
被試験)・ランクおよび試験装置の空の状態を検出し、
試験装置に試験要求信号を送出すると、試験装置は試験
要求信号を検出し椋試1験装置へ切シ替え信号を送出し
て被試験トランクを試験装置に引き込み、試験を実行し
、試験終了を検出すると通話tj側に切り替える手段を
有することにより、すなわち、試験制御線を並列に接続
すると共に、被試験装置自身に試験要求線を設けること
によシ、試験要求信号を被試験装置から試験装置へ送出
できるようにし、被試験装置と試験装置間の接続を簡潔
にして確実な試験を行なえるようにしたトランク試験方
式の提供を目的とする。Wood brother E! A was created in view of the above drawbacks, and consists of one rank that has both incoming trunk and outgoing trunk functions, a storage circuit, and a circuit that controls these, and two test control lines are connected in parallel. The trunks under test of multiple devices under test are tested, and the first test device is tested on the test equipment K. Detect empty condition,
When a test request signal is sent to the test equipment, the test equipment detects the test request signal, sends a switching signal to the test equipment, pulls the trunk under test into the test equipment, executes the test, and indicates the end of the test. By having means for switching to the call TJ side when detected, that is, by connecting the test control lines in parallel and providing a test request line in the device under test itself, the test request signal can be transferred from the device under test to the test device. The purpose of the present invention is to provide a trunk test method that enables reliable testing by simplifying the connection between the device under test and the test device.
以下、図面に示す実姉例にもとづいて本発明を説明する
。Hereinafter, the present invention will be explained based on actual examples shown in the drawings.
第1図は本発明装置の一実施例の結線図を示し、第2図
は試験装置および被試験装置のブロック図を示している
。第1図において、lOは試験装置、11〜1nは被試
験装置であり、これらは試験制御線’rl、 T2およ
び通話線A、Bによシリレー接点を介して並列に接続さ
れている。また、本実施例の試験装置10と被試験装置
11〜1nは第2図に示す如く同一の構成となってかり
、入トランク機能を持つ回路21と出トランク機能を持
つ回路22、卦よび検出回路23を有するトランクと、
変復調回路24と、MFC送受信器25と、制御回路2
6と、記憶回路27とによって構成されている。FIG. 1 shows a wiring diagram of an embodiment of the device of the present invention, and FIG. 2 shows a block diagram of a test device and a device under test. In FIG. 1, IO is a test device, and 11 to 1n are devices under test, which are connected in parallel through test control lines 'rl, T2 and communication lines A and B through relay contacts. Furthermore, the test apparatus 10 and the devices under test 11 to 1n of this embodiment have the same configuration as shown in FIG. a trunk having a circuit 23;
Modulation/demodulation circuit 24, MFC transceiver 25, and control circuit 2
6 and a memory circuit 27.
第1図および第2図において、例えば被試験装置11の
被試験トランクの図示せざる試験開始スイッチが入れら
れると、被試験装置11はリレー接点5W21を閉じ、
試験装置10の状態と被試験トランクの状態を検出する
。ここで、両方が空の状態であることを検出すると、制
御回路26は試験装置10に試験要求信号を試験制御線
T1を介して送出する。一方、試験装置10は、検出回
路23によ如被試験装置11からの試験要求信号を検出
すると、制御回路26が被試験トランクに対して通話線
の切シ替え信号を試験制御線T2を介して送出する。切
り替え信号を検出した被試験装置11は被試験トランク
のリレー接点SWI、1゜SWI 2 、SW31.5
W32を駆動し、通話線AOI 、 BOI 、 Al
l 、 Bll 、を試験装置10の通話IvilAO
O、BOO、AIO、BIOK接続スル。試験装置10
と被試験装置11が接続されると、試験装置10によっ
て入トランク側のレジスタ信号は変復調回路24によシ
試験を実行し、出トランク側のレジスタ信号はMFC送
受信器25によシ試験を実行する。試験が終了すると、
被試験トランクの良否を表示し試験装置と切シ離されも
との状態に復旧する。このようにして、n個の被試験装
置11〜1nの良否を17n の試験制御線によって試
験を実行することができる。このとき、試験開始スイッ
チの入れられた被試験トランク11以外の被試験トラン
ク12〜Inは、試験装置10と試験要求していない他
の被試験装置の試験制御線および通話線の両方ともリレ
ー接点によル切断されている。In FIGS. 1 and 2, for example, when a test start switch (not shown) of the trunk under test of the device under test 11 is turned on, the device under test 11 closes the relay contact 5W21,
The state of the test device 10 and the state of the trunk under test are detected. Here, if it is detected that both are empty, the control circuit 26 sends a test request signal to the test apparatus 10 via the test control line T1. On the other hand, when the test device 10 detects a test request signal from the device under test 11 through the detection circuit 23, the control circuit 26 sends a communication line switching signal to the trunk under test via the test control line T2. and send it. The device under test 11 that detected the switching signal connects the relay contacts SWI, 1°SWI 2 , SW31.5 of the trunk under test.
Drives W32 and connects communication lines AOI, BOI, Al
l, Bll, the call IvilAO of the test device 10
O, BOO, AIO, BIOK connection. Test device 10
When the device under test 11 is connected to the test equipment 10, the register signal on the incoming trunk side is used for the modulation/demodulation circuit 24 to perform a test, and the register signal on the outgoing trunk side is used for the MFC transceiver 25 to perform the test. do. When the exam is finished,
It displays the pass/fail status of the trunk under test, disconnects from the test equipment, and restores the original state. In this way, it is possible to test the acceptability of the n devices under test 11 to 1n using the 17n test control lines. At this time, in the trunks under test 12 to In other than the trunk under test 11 whose test start switch is turned on, both the test control line and communication line of the test equipment 10 and other equipment under test that have not requested the test are relay contacts. It has been cut off.
以上の如く本発明によれば、複数の被試験装置と被試験
装置を試験する試験装置の試験制御線を並列に接続する
と共に、試験要求信号を被試験装置に設けることによシ
、試験制御線訃よび試験線制御回路を大幅な減少するこ
とができ、試験装置と被試験装置の接続を容易にすると
共に、接続ミス等を無くし確実な試験を行なえるといっ
た効果がある。As described above, according to the present invention, test control lines are connected in parallel to a plurality of devices under test and a test device that tests the devices under test, and a test request signal is provided to the device under test. It is possible to significantly reduce the number of wires and test line control circuits, facilitate the connection between the test equipment and the device under test, and eliminate connection errors and ensure reliable testing.
第1図は本発明装置の一実施例の結線図、第2図は試験
装置及び被試験装置のブロック図を示す。
Aoo=Aon −通話線 Boo−Bon −通
話線A1o〜Ain・・・通話線 Blo−Bin
・・・通話線TI、T2・・・試験制御線 10・
・・試験装置11〜1n・・・被試験装置 2]・・
・入トランク(回路)22・・・出トランク(回路)2
3・・・検出回路24・・・変複調回路 25
・・・MFC送受信器26・・・制御回路 2
7・・・記憶回路SWI 1〜SWI 2n・・・リレ
ー接点5W20〜SW2 n −・・リレー接点SW
31〜SW32n・・・リレー接点出願人 日本電気
株式会社FIG. 1 shows a wiring diagram of an embodiment of the device of the present invention, and FIG. 2 shows a block diagram of a test device and a device under test. Aoo=Aon - Call line Boo-Bon - Call line A1o~Ain... Call line Blo-Bin
...Telephone line TI, T2...Test control line 10.
...Test devices 11 to 1n...Device under test 2]...
・Incoming trunk (circuit) 22...Outgoing trunk (circuit) 2
3...Detection circuit 24...Modulation and demodulation circuit 25
...MFC transceiver 26...control circuit 2
7...Memory circuit SWI 1~SWI 2n...Relay contact 5W20~SW2 n -...Relay contact SW
31~SW32n...Relay contact applicant NEC Corporation
Claims (1)
、記憶回路と、これらを制御する回路から成り、2本の
試験制御線が並列に接続された複数の被試験装置、およ
び被試験装置を試験する試験装置において、被試験トラ
ンクの試験開始信号によ多制御回路で被試験装置のトラ
ンク卦よび試験装置の空の状態を検出し、試験装置に試
験要求信号を送出すると共に、該試験要求信号を検出し
た試験装置によ)被試験装置へ切シ替え信号を送出して
被試験装置の被試験トランクを試験装置に引き込み、試
験を実行させ、且つ試験終了を検出した後に通話線側に
切り替える手段を有することを特徴とするトランク試験
方式。It consists of a trunk that has both incoming trunk and outgoing trunk functions, a storage circuit, and a circuit that controls these, and tests multiple devices under test with two test control lines connected in parallel, and the device under test. In the test equipment, in response to the test start signal of the trunk under test, a control circuit detects the trunk of the equipment under test and the empty state of the test equipment, sends a test request signal to the test equipment, and sends the test request signal to the test equipment. Means for sending a switching signal to the device under test (by the detected test device), pulling the trunk under test of the device under test into the test device, causing the test to be executed, and switching to the communication line side after detecting the end of the test. A trunk test method characterized by having the following.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22931182A JPS59122064A (en) | 1982-12-27 | 1982-12-27 | Trunk test system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22931182A JPS59122064A (en) | 1982-12-27 | 1982-12-27 | Trunk test system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59122064A true JPS59122064A (en) | 1984-07-14 |
Family
ID=16890146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22931182A Pending JPS59122064A (en) | 1982-12-27 | 1982-12-27 | Trunk test system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59122064A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4645477A (en) * | 1983-12-21 | 1987-02-24 | Toyota Jidosha Kabushiki Kaisha | V-belt assembly for transmitting power |
-
1982
- 1982-12-27 JP JP22931182A patent/JPS59122064A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4645477A (en) * | 1983-12-21 | 1987-02-24 | Toyota Jidosha Kabushiki Kaisha | V-belt assembly for transmitting power |
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