JPS59119796U - DC motor speed control circuit - Google Patents
DC motor speed control circuitInfo
- Publication number
- JPS59119796U JPS59119796U JP1983012567U JP1256783U JPS59119796U JP S59119796 U JPS59119796 U JP S59119796U JP 1983012567 U JP1983012567 U JP 1983012567U JP 1256783 U JP1256783 U JP 1256783U JP S59119796 U JPS59119796 U JP S59119796U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- speed control
- control circuit
- resistors
- motor speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Direct Current Motors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の速度制御回路、第２図は本考案の実施例
になる速度制御回路を夫々示す。
Ｍ・・・モータ、Ｑｌ・・・分流トランジスタ、Ｑ２・
・・駆動トランジスタ、Ｑ３． Ｑ４・・・トランジス
タ（カレントミラー回路）、ｖＣＣ・・・電源端子、Ｒ
，、ＲＢ・・・抵抗、Ｂｔ、 Ｒア・・・帰還抵抗、７
・・・誤差検出器、８・・・基準電圧源。FIG. 1 shows a conventional speed control circuit, and FIG. 2 shows a speed control circuit according to an embodiment of the present invention. M...Motor, Ql...Shunt transistor, Q2...
...Drive transistor, Q3. Q4...Transistor (current mirror circuit), vCC...Power supply terminal, R
,,RB...resistance, Bt, Ra...feedback resistance, 7
...Error detector, 8...Reference voltage source.
Claims (1)
該モータに接続された第１、第２及び第３の抵抗と、第
１及び第２のトランジスタからなるカレントミラー回路
と、該駆動トランジスタに対し所定比の電流が流れる分
流トランジスタと、該カレントミラー回路の第１及び第
２のトランジスタは該分流トランジスタ及び該第２、第
３の抵抗の接続点に夫々接続され、−入力端と他入力端
を有しその出力が該分流及び駆動トランジスタの夫々の
制御入力へ接続された誤差検出器とよりなり、この誤差
検出器の該−入力端と基準電圧源を介した該他入力端が
該第２の抵抗の両端に接続された事を特徴とする直流モ
ータの速度制御回路。a motor and a drive transistor connected to a DC power source;
a current mirror circuit including first, second and third resistors connected to the motor and first and second transistors; a shunt transistor through which a current of a predetermined ratio flows with respect to the drive transistor; and the current mirror. The first and second transistors of the circuit are respectively connected to the connection point of the shunt transistor and the second and third resistors, and have a -input terminal and another input terminal, and outputs thereof are respectively connected to the shunt transistor and the second and third resistors. an error detector connected to a control input of the second resistor, and the - input terminal of the error detector and the other input terminal via the reference voltage source are connected to both ends of the second resistor. DC motor speed control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983012567U JPS59119796U (en) | 1983-01-31 | 1983-01-31 | DC motor speed control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983012567U JPS59119796U (en) | 1983-01-31 | 1983-01-31 | DC motor speed control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59119796U true JPS59119796U (en) | 1984-08-13 |
Family
ID=30143967
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983012567U Pending JPS59119796U (en) | 1983-01-31 | 1983-01-31 | DC motor speed control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59119796U (en) |
-
1983
- 1983-01-31 JP JP1983012567U patent/JPS59119796U/en active Pending
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