JPS59114638U - circuit device - Google Patents

circuit device

Info

Publication number
JPS59114638U
JPS59114638U JP819383U JP819383U JPS59114638U JP S59114638 U JPS59114638 U JP S59114638U JP 819383 U JP819383 U JP 819383U JP 819383 U JP819383 U JP 819383U JP S59114638 U JPS59114638 U JP S59114638U
Authority
JP
Japan
Prior art keywords
circuit
circuit device
tuning
comprised
adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP819383U
Other languages
Japanese (ja)
Inventor
中島 新八
孝 渡辺
Original Assignee
ミツミ電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ミツミ電機株式会社 filed Critical ミツミ電機株式会社
Priority to JP819383U priority Critical patent/JPS59114638U/en
Publication of JPS59114638U publication Critical patent/JPS59114638U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示す平面図、第2図は本考案の実施例
を示す平面図、第3図及び第4図は本考案のA−A’線
並びにB−B’線断面図、第5図は本考案の一部拡大断
面図、第6図及び第7図は本考案を示す一部斜視図であ
る。 21・・・・・・チューナ装置、26・・・・・・アン
テナ段、27・・・・・・RF段、28・・・・・・混
合段、29・・・・・・発振段、30・・・・・・回路
基板、46・・・・・・回路素子、47・・・・・・絶
縁ワックス。 第4図 、)j、  qD    ・−′−7σ−\、井ヨ(λ
″)−e/
FIG. 1 is a plan view showing a conventional example, FIG. 2 is a plan view showing an embodiment of the present invention, FIGS. 3 and 4 are cross-sectional views along the line AA' and B-B' of the present invention, FIG. 5 is a partially enlarged sectional view of the present invention, and FIGS. 6 and 7 are partially perspective views showing the present invention. 21...Tuner device, 26...Antenna stage, 27...RF stage, 28...Mixing stage, 29...Oscillation stage, 30...Circuit board, 46...Circuit element, 47...Insulating wax. Figure 4, )j, qD ・−′−7σ−\, Iyo(λ
″)-e/

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路基板上に、同調若しくは発振回路を構成する回路装
置において、該回路は、調整後絶縁性ワックスによって
所定位置に竪型固着した回路素子からなることを特徴と
する回路装置。
1. A circuit device configuring a tuning or oscillation circuit on a circuit board, wherein the circuit is comprised of circuit elements vertically fixed in a predetermined position with insulating wax after adjustment.
JP819383U 1983-01-24 1983-01-24 circuit device Pending JPS59114638U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP819383U JPS59114638U (en) 1983-01-24 1983-01-24 circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP819383U JPS59114638U (en) 1983-01-24 1983-01-24 circuit device

Publications (1)

Publication Number Publication Date
JPS59114638U true JPS59114638U (en) 1984-08-02

Family

ID=30139683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP819383U Pending JPS59114638U (en) 1983-01-24 1983-01-24 circuit device

Country Status (1)

Country Link
JP (1) JPS59114638U (en)

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