JPS59112355A - Distributing device of load - Google Patents

Abstract

PURPOSE:To improve the speed and efficiency of data processing by providing the titled device with a control unit or the like to allot exclusive control to a subinformation processor and limiting the processing to be executed by a main information processor only to ordinary data processing. CONSTITUTION:When exclusive control is to be alloted to the subinformation processor, a control unit 10 detects a command from the main information processor through an upper interface signal line 71 or the like and decodes the command to execute necessary control. Namely, the control unit 10 stores a unit distribution code in a memory through a register 20, etc. at first and then compares the code with a file code. Subsequently, the control unit 10 selects the subinformation processor to which the exclusive control is alloted through a port selecting signal line 53, etc. and sends exclusive control information to the selected processor. Therefore, the selected device generates an interruption signal and reports said information to the main processor. Thus, the speed and efficiency of data processing can be improved by alloting the exclusive control to the subinformation processor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a load distribution device in an information processing system, and in particular, the present invention relates to a load distribution device in an information processing system. The present invention relates to a device that distributes exclusive control for exclusive use to a plurality of separate sub-information processing devices.

[Prior art]

Conventionally, when multiple tasks in an information processing system use a large number of files exclusively, this is done by the software that makes up the so-called operating system. An example of a case where a data processing request from a terminal is broken down into multiple tasks and the tasks share or occupy a file or a block within the file with each other and the file is finally updated is a banking online system. There are also transportation-related seat reservation systems, production management systems in the manufacturing industry, and sales management systems in the service industry. These systems are usually dual systems or duplex systems consisting of two information processing devices, so that if a system failure occurs, it will not have a fatal impact on business operations, but one of the information processing devices is in a standby state. This can be said to be bad in terms of system usage efficiency. Therefore, it is conceivable that the information processing apparatus in the standby state may also be responsible for the above-mentioned duties. When one information processing device fails, the other information processing device takes over the processing of the former, but for this purpose a journal file recorded in an external storage device is required. This is because the main storage of each information processing device contains its own processing data and processing information, which cannot be simply transferred to the other information processing device.

Naturally, competition for access to the same file 4)b increases between image information processing devices that share tasks, compared to a system in which one of the image information processing devices is in a standby state. In order to adjust this, exclusive control must be exercised between image information processing devices to handle file sharing and ownership.

When both information processing apparatuses have means for direct communication, it becomes necessary to edit and store an exclusive control table on the main memory of each information processing apparatus. Then, as the frequency of file access increases, the frequency of communication between image information processing devices also increases, and the high frequency of file access means that the information processing device itself has a large amount of data to process. In addition, the occurrence of contention in the communication itself, the occurrence of a delay in inquiring about whether or not exclusive control is available to the other information processing device, and the delay in the response to this will result in further slowing down data processing in the information processing device. delay. Since the journal file is shared between the image information processing apparatuses, the work is further divided between the information processing apparatuses, thereby reducing the efficiency improvement that would otherwise be achieved by sharing the work among the information processing apparatuses.

[Purpose of the invention]

In the information processing system constructed in connection with the present invention, the exclusive control described above is shared with the secondary information processing device, thereby allowing the information processing device (main information processing device) to concentrate on the original data processing. This makes it possible to improve the efficiency as mentioned above. When the amount of exclusive control information allocated to the sub-information processing device becomes extremely large, the information processing system promptly performs the exclusive control to speed up the response to the main information processing device. In a system having a plurality of processing devices, a distribution device is required in the next system to determine which of the sub-information processing devices the exclusive control information transmitted from the main information processing device is to be distributed to.

It is extremely important that the distribution device distributes the exclusive control information to the sub-information processing devices in a well-balanced and prompt manner. This is because the original reason for providing a plurality of sub-information processing devices is to perform distributed processing for the purpose of processing a large amount of exclusive control information at a higher speed.

Generally, a hashing technique is used to divide a data group into multiple groups. However, this was developed for the purpose of shortening the time required to inspect large-scale file data, and even if the part of the data to be badged is largely uneven when viewed in chronological order, Once the conversion algorithm is decided, it cannot be changed.

In the above-mentioned information processing system constructed in connection with the present invention, the entire file code consisting of 8 bytes is subject to distribution processing, and is required to be distributed to up to eight sub-information processing devices. There is.

The first problem is that the content of the file code is arbitrary and cannot be predicted by the distribution device, and furthermore, since there are 264 combinations of file codes, it is natural that only one file code can be used. It is normal for there to be some deviation, and if the file code is distributed using a hashish method assuming randomness of the file code, it would be difficult to distribute it to the sub-information processing devices in a balanced manner. If we look at the file codes used in chronological order, at least they differ greatly between regular daytime work and nighttime work, and they also change depending on whether new files are constructed or the work content changes.

The second problem is to ensure that distribution is not hindered even when an arbitrary number of sub-information processing devices is configured within the limit.

The third problem is to speed up the distribution process.

The purpose of the present invention is to solve the first problem mentioned above, since the file codes used in routine work are known in advance, the actual frequency of their use is recorded so that this can be reflected in the distribution algorithm. In order to do so, it is equipped with a means for receiving and storing these distribution codes as parameters of the distribution algorithm supplied from the main information processing device as necessary, and is provided with means for receiving and storing these distribution codes as parameters of the distribution algorithm supplied from the main information processing device as necessary, In the third problem described above, there is provided a distribution algorithm means that avoids distribution to processing devices by selecting parameters supplied from the main information processing device;
It is an object of the present invention to provide a distribution device equipped with processing means that uses hardware rather than software processing to make the distribution algorithm as simple as possible.

[Structure of the invention]

The apparatus of the present invention is used in a system in which exclusive control of access conflicts of files that a plurality of tasks in a plurality of main information processing apparatuses desire to access is distributed to a plurality of sub-information processing apparatuses. A device that relays and distributes data exchange between the plurality of main information processing devices and the plurality of sub information processing devices, the device transmitting and receiving data in advance by any of the main information processing devices and ordered by size. distribution code storage means for sequentially storing distribution codes of the secondary information processing device, and a file code transmitted in the process of granting exclusive use or shared use permission of a desired file to the secondary information processing device by the task within the main information processing device; code register means for storing the code; and the distribution code storage is determined by comparing the code contents of the code register means and the distribution code contents sequentially read out from a specific memory address of the distribution code storage means and the magnitude of the comparison result. and sequential comparison and selection means for selecting the corresponding sub-information processing device from the memory address of the means.

[Principle of the invention]

In the above configuration, all unit distribution codes are in one-to-one correspondence with the sub-information processing devices in the maximum configuration, and the file code received from the main information processing device is compared with each unit distribution code. Ru.

For example, if the distribution code storage means takes a file code, which is the content of the code register means, as the address side data, and performs the A operand side data 9-, for example, by a binary operation of A + B + 1. Only when A2B is the case, the operation of A+B+1 outputs a carrier signal. Comparative Liao Class Current IJ] Among those whose unit distribution code is larger than the file code, the first one detected by the carrier and corresponding to the nine unit distribution code KH1-1-? −ψ Select the secondary information processing device to wait.

For ease of explanation, it is assumed that the file code consists of 5 bits and the distribution code is given as shown in the table below.

Table 10 - If the content of the received file code is 00010, the carrier rattra is first detected at the address 1/s O of the table, so the file code selects the sub information processing device numbered 0. If the file code content is 10110,
Since the carrier number 1-1 is first detected at address 5 of the table without outputting carrier data from addresses θ to 4 on the table, the sub information processing device No. 5 is selected. Furthermore, if the address 40 unit distribution code in the table has the same content as the unit distribution code at address 3, the sub information processing device corresponding to address 4 will never be selected. This is because even if there is a carrier gold mine at address 4, it is detected first at address 3. The contents of the file code used in the present invention are all “0”.
” is excluded, so when selecting a sub information processing device, if o'4i is excluded from all 4i, all unit distribution codes of address 0 in the table should be set to II□m, and if number K is excluded, The unit distribution code of the address may be made to match the unit distribution code of -1 to the gold address. However, in the case of excluding number 7, it is necessary to set all the unit distribution codes of address 6 to "al". In the present invention, the condition for selecting the secondary information processing device in general is that the file code is greater than the unit distribution code of -1 at the address and less than or equal to the unit distribution code at the address. By appropriately setting , it is possible to distribute an arbitrary number of file codes to each sub-information processing device.

[Explanation of Examples]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1(4) and FIG. 103) are block diagrams showing one embodiment of the present invention.

In this embodiment, the control unit (CU)10. Shift register (SR) 20. Memory (MEM) ao, address register (AR) 40. Port register (PR)50. Arithmetic unit) (ALU)60. Upper interface switching unit 70. Nine driver receiver circuits 110 correspond one-to-one to a multiplexer circuit (MPX) s o , a selector circuit (SEL) 90 and a sub-information processing device (not shown).
including. It also includes a carrier latch circuit (hereinafter referred to as carry latch circuits 104 and 105) composed of an OR circuit 104 and an AND circuit 105.

Now, the operation of this embodiment is as follows.

The control unit 10 connects at least two main information processing devices (not shown) via an upper-level interface signal line 71.
It also controls the transmission and reception of exclusive control information between the sub-information processing apparatus and up to eight sub-information processing apparatuses (not shown) via the lower-order interface signal line 111.

When one of the main information processing devices puts command information on one of the upper interface signal lines 71, the upper interface switching section 70 notifies the control unit 10 of the existence of the command information. When the control unit 10 detects the notification, it switches the interface control line 7 to switch to the upper interface switching unit 70't-corresponding upper interface 71.
2t-operate and receive the command information. control unit 1
0 decodes the command 13-information and takes all necessary controls.

The command information includes at least two types: a first command for transmitting a distribution code and a second command for transmitting exclusive control information.

In the operation mode in which the first command is decoded by the control unit 10, the control unit 10 sends a reset pulse to the reset signal line 16, and then sends the distribution code transmitted following the command information one byte at a time to the interface switching unit. 70 to the shift register 20. The shift register 20 consists of 8 bytes, and the control unit 10 receives 8 bytes from the shift pulse gold shift control line 14.
By issuing the signal once, the loading of one unit of distribution code consisting of 8 bytes into the shift register 20 is completed.

Since the previously sent reset pulse resets the address register 40 and the carrier latch circuits 104 and 105, the contents of the address register 40 give address O. In this mode of operation, the states of the carrier latch circuits 104 and 105 are in a null-14- relationship.

Following the above-mentioned completion of loading one unit of distribution code, the control unit 10 stores the unit distribution code on the shift register 20 at the address pointed to by the address register 40 of the memory 30 by sending a write pulse to the gold write signal line 15. At the same time, a counting pulse t-i is sent to the counting signal line 17. The skeleton count pulse increments the contents of address register 40 by one. Regarding the remaining distribution codes, the control unit 10 repeats the same operations as described above, including loading them one unit at a time into the shift register 20, storing them in the memory 30, and incrementing the contents of the address register 40, thereby obtaining eight pieces. All unit distribution codes are stored in the memory 30. When all the unit distribution codes are stored in the memory 30, the control unit 10 reports the completion of the first command operation to the main information processing device and finishes all processing of the first command. The memory 30 corresponds to the distribution code storage means described above.

In the operation mode in which the second command is decoded by the control unit 10, the control unit 10 takes in the first 8 bytes of exclusive control information that is transmitted following the command information into the shift register 20, and also sends a reset pulse i to the IJ upper set line 16. Send to. The first 8 bytes are a file code, and the shift register 20 corresponds to the code register described above. The contents of shift register 20 are provided to the B operand of arithmetic unit 60. The unit distribution code read from the follow-up memory 3o with the address value of the address register 40 reset by the reset pulse is supplied to the operand of the arithmetic unit 600A, and the arithmetic unit 60 performs the arithmetic operation of A+B+1.

As a result of this calculation, the key unit 60 produces a carried output when A≧B as described above.

After a necessary delay time on the circuit has elapsed, the arithmetic unit 60 determines the carrier state on the carrier line 61. When the control unit 10 sends a counting pulse to the counting signal line 17, the timing of the carrier signal is measured by the gate 102 which performs an AND operation with the carrier signal line 61. gate 10
The output of gate 105 is ORed with the output of gate 105 at gate 104, so if the carrier signal is at logic O, the output from gate 105 also remains at logic O. If the carrier signal takes on the logic value 1t-, the output of gate 105 changes to logic 1 and remains at this value until the next reset pulse is sent. 104 and 105 constitute a carrier latch circuit. The outputs of the carrier latch circuits 104, 105 can be detected in the control unit 10, and the outputs of the carrier latch circuits 104, 105 can be detected in the control unit 10.
The control unit 10 repeats the sending of the counting pulses on the signal line 17 until the output of the signal line 17 becomes a logical value 1. Since this counting pulse increments the contents of the address register 40, the comparison between each unit distribution code and the file code is executed sequentially. The count pulse causes the boat register 5o to set the contents of the address register 40. When the outputs of the carrier cloud latch circuits 104 and 105 become logical 1, the gate 101 operates to send the output of the carrier cloud latch circuits 104 and 105 to the port register 50 after the counting pulse is turned off, and the gates 17-101 The output of is a hold signal that continues to hold the contents of the port register 50, and the port register 50 holds the contents of the address register 40 at the time when the outputs of the carrier out latch circuits 104 and 105 become logical 1. Ru. In other words, the contents of the address register 40 at that time are latched into the port register 50 by the carryout of the arithmetic unit 60.

When the control unit 10 turns the switching signal line 18'1 OFF, the switching circuit 52 supplies the contents of the port register 50 to the boat select signal Iw53. The boat select signal line 53 has a one-to-one correspondence with the sub-information processing device, and includes a multiplexer circuit 80 that selects the receiver output of the driver receiver circuit section 110, and a selector circuit that selectively enables the driver output of the driver receiver circuit section 110. By being supplied to the circuit 90, the sub information processing device can be selected.

In this embodiment, the number of sub information processing devices is up to eight, so the address registers 40 and 18- and the port register 50 can be configured with 3 bits.

When the control unit 10 detects that the outputs of the carrier latch circuits 104 and 105 have a logical value of 1, it operates the lower interface control line 12 and the lower interface input signal line 13 to select the signal to the ninth sub information processing device. The exclusive control information is sent to all the users.

The control unit 10 subsequently shifts the file code on the shift register 20, takes it into the control unit 10, and sends it to the sub information processing device, and also takes the remaining exclusive control information into the control unit via the shift register 20. The pre-stage of the operation of the second command is completed by sending the command to the sub-information processing device.

In the sub information processing device, when exclusive control is completed, the sub information processing device connects the lower interface signal line 111.
An interrupt signal is sent via the lower interface control line 12 and the lower interface control line 12. When the control unit 10 detects the interrupt signal, it turns on the switching signal @1seON in the switching circuit 52 and supplies the switching line 19 to the port select signal line 53 to select the sub-information processing device that sent the interrupt and output the interrupt information. By receiving and reporting to the main information processing device, all steps of the operation of the second command are finally completed.

This distribution device is capable of servicing other main information processing devices or other tasks in the main information processing device from the end of the pre-stage of the operation of the second command until the above-mentioned interrupt signal is detected. The aim is to improve processing efficiency.

In the above-described embodiment, the unit distribution code and the file code are made up of 8 bytes, and the maximum number of sub-information processing devices, so the address of the memory 30 is also made 8,
Although the address register 40, port register 50, etc. are constructed in accordance with this, this is merely an example, and the present invention is not limited thereto.

Further, a logic circuit having a specific configuration is used as a means for latching the contents of the sea address register 40 into the port register 50 using the carry output of the arithmetic unit 60, but this is also an example, and the present invention is not limited to this. It is not limited to this.

〔Effect of the invention〕

As described above, according to the present invention, the distribution algorithm can be easily changed using the distribution code received from the main information processing device as a parameter, and the configuration of any number of sub information processing devices below the maximum number is allowed. Moreover, it has the advantage that distribution processing can be performed at high speed using extremely simplified hardware means.

[Brief explanation of the drawing]

1 and 2) are block diagrams showing one embodiment of the present invention. In the figure, 10...12111 II unit (CU), 20...shift register (SR)
, 30...Memory (MEM), 40...
・Address register (AR), 50... Port register (PR), 60... Arithmetic unit) (
ALU), 70... Upper interface switching unit, 80... V multiplexer circuit (MPX), 9
0... Selector circuit 21- path, 110... Driver receiver circuit, 104
, 105...Carrier latch circuit. 22- Volume 10 (A) Volume 1 (e))

Claims (1)

[Scope of Claims] A system in which exclusive control of access conflicts for files that a plurality of tasks in a plurality of main information processing devices desire to access is distributed to a plurality of sub-information processing devices. A device for relaying and distributing data exchange between the plurality of main information processing devices and the plurality of sub information processing devices, the device being a device for relaying and distributing data exchange between the plurality of main information processing devices and the plurality of sub information processing devices, the data being transmitted in advance by any of the main information processing devices and ordered by size. a distribution code storage means for sequentially storing distribution codes of the secondary information processing device; and a file code transmitted in the process of granting the secondary information processing device permission to occupy or share a file desired by the task within the main information processing device; a code register means for storing a code, and a code register means for comparing the code contents of the code register means and the distribution code contents sequentially read out from a specific memory address of the distribution code storage means, and the distribution code storage determined by the magnitude of the comparison result. and sequential comparison and selection means for selecting the corresponding sub-information processing device from a memory address of the means.