JPS59111345A - Low-permittivity circuit substrate - Google Patents
Low-permittivity circuit substrateInfo
- Publication number
- JPS59111345A JPS59111345A JP57220331A JP22033182A JPS59111345A JP S59111345 A JPS59111345 A JP S59111345A JP 57220331 A JP57220331 A JP 57220331A JP 22033182 A JP22033182 A JP 22033182A JP S59111345 A JPS59111345 A JP S59111345A
- Authority
- JP
- Japan
- Prior art keywords
- powder
- ceramic
- permittivity
- circuit substrate
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
Abstract
Description
【発明の詳細な説明】
(1)発明の技術分野
本発明はLSIなどの電子部品を実装配線するための回
路基板に関し、より詳しくは回路基板の誘電率を下げ、
電気信号の高速伝搬をも可能にする基板の材料、形状に
関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention The present invention relates to a circuit board for mounting and wiring electronic components such as LSI, and more specifically, it relates to a circuit board for mounting and wiring electronic components such as LSIs, and more specifically, to reduce the dielectric constant of the circuit board,
It relates to the material and shape of the substrate that also enables high-speed propagation of electrical signals.
(2)技術の背景
近年LSIの高性能及び高集積化の傾向は次第に加速的
になってきている。そのLSIの実装法としては■個々
の素子にパッケージを施す方法と■多数の素子を基板上
に実装する方法であるセラミック多層基板がある。この
ようなセラミック多層基板に対しては多層構造、放熱、
低誘電率などの技術的事項が要求さ扛ている。(2) Technical Background In recent years, the trend toward higher performance and higher integration of LSIs has been gradually accelerating. The LSI mounting methods include (1) a method of packaging individual elements, and (2) a method of mounting a large number of elements on a substrate, which is a ceramic multilayer board. Multilayer structure, heat dissipation,
Technical issues such as low dielectric constant are required.
(3)従来技術と問題点
従来前記のように回路基板の材料は放熱、多層化などの
点から樹脂に代ってセラミックが使用されるようになっ
ている。ところがセラミック材料は一般に樹脂に比べて
誘電率が下記のように高く、信号の高速伝搬を妨げる欠
点があった。(3) Prior Art and Problems Conventionally, as mentioned above, ceramics have been used as materials for circuit boards instead of resins from the viewpoint of heat dissipation, multilayering, etc. However, ceramic materials generally have a higher dielectric constant than resins, as shown below, and have the disadvantage of hindering high-speed signal propagation.
(4)発明の目的
本発明はセラミック回路基板において誘電体であるセラ
ミック材料の誘電率を低下することを目的とする。(4) Purpose of the Invention The purpose of the present invention is to reduce the dielectric constant of a ceramic material that is a dielectric in a ceramic circuit board.
(5)発明の構成
一般に回路基板の誘電率は導体間の材料の誘電率の平均
値として影響するので、セラミックに微細な空孔を作る
ことにより見かけの誘電率を低下させることができる。(5) Structure of the Invention Generally, the dielectric constant of a circuit board is affected by the average value of the dielectric constant of the material between the conductors, so the apparent dielectric constant can be lowered by creating fine pores in the ceramic.
本発明はこのようにセラミック基板に空孔を作る手段と
して中空形状のセラミック粉末を使用することを構成す
るものである。すなわち本発明はセラミック粉末の焼結
によって形成される回路基板において、誘電体であるセ
ラミックの原料マドIJックス中に、中空球状の粉末を
分散させたことを特徴とした回路基板を提供する。The present invention thus constitutes the use of hollow ceramic powder as a means for creating holes in a ceramic substrate. That is, the present invention provides a circuit board formed by sintering ceramic powder, characterized in that hollow spherical powder is dispersed in a ceramic raw material mud IJx that is a dielectric.
本発明において中空球状の粉末は無機質の粉末であれば
よく、特にAfi203が好ましい。In the present invention, the hollow spherical powder may be any inorganic powder, and Afi203 is particularly preferred.
さらに本発明において中空球状の粉末のかさ比重及び粒
径は適当に所望の用途目的に合わせて選択することがで
きる。Further, in the present invention, the bulk specific gravity and particle size of the hollow spherical powder can be appropriately selected depending on the desired purpose of use.
(6)発明の実施例
第1図に示されているように、数ミクロン程度に粉砕し
たガラス粉末1と中空アルミナ2を樹脂及び溶剤と混練
してスラリー状とし、基板形状に成形してガラス軟化点
で焼結する。ガラス粉末1は中空アルミナ2の隙間を満
して結合し、基板を形成することができた。その結果訪
電率4〜5の低誘電率のセラミック回路基板を得ること
ができた。(6) Embodiment of the Invention As shown in FIG. 1, glass powder 1 crushed to several microns and hollow alumina 2 are kneaded with a resin and a solvent to form a slurry, and the slurry is formed into a substrate shape. Sinter at softening point. The glass powder 1 filled the gap between the hollow alumina 2 and was bonded to form a substrate. As a result, a low dielectric constant ceramic circuit board with a contact factor of 4 to 5 could be obtained.
(7)発明の効果
本発明によればセラミック回路基板の見かけの誘電率を
低下させることができるので伝送特性を向上式せること
ができる。(7) Effects of the Invention According to the present invention, the apparent dielectric constant of the ceramic circuit board can be lowered, so that the transmission characteristics can be improved.
第1図はセラミック回路基板断面の略図である。
1・・・ガラス、 2・・・中空ア゛ルミナ、3・
・・導体パターン。
特許出願人
富士通株裕会社
特許出願代理人
弁理士 青 木 朗
弁理士 西 舘 和 之
弁理士 内 1) 幸 男
弁理士 山 口 昭 之FIG. 1 is a schematic diagram of a cross section of a ceramic circuit board. 1...Glass, 2...Hollow alumina, 3...
...Conductor pattern. Patent applicant Fujitsu Ltd. Patent application representative Patent attorney Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney 1) Yukio Patent attorney Akiyuki Yamaguchi
Claims (1)
いて、誘電体であるセラミックの原料マトリックス中に
、中空球状の粉末を分散させたことを特徴とした回路基
板。A circuit board formed by sintering ceramic powder, characterized in that hollow spherical powder is dispersed in a ceramic raw material matrix that is a dielectric.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57220331A JPS59111345A (en) | 1982-12-17 | 1982-12-17 | Low-permittivity circuit substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57220331A JPS59111345A (en) | 1982-12-17 | 1982-12-17 | Low-permittivity circuit substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59111345A true JPS59111345A (en) | 1984-06-27 |
Family
ID=16749467
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57220331A Pending JPS59111345A (en) | 1982-12-17 | 1982-12-17 | Low-permittivity circuit substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59111345A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0234896A2 (en) * | 1986-02-28 | 1987-09-02 | Digital Equipment Corporation | Improved micro-electronics devices and methods of manufacturing same |
EP0405947A2 (en) * | 1989-06-27 | 1991-01-02 | Digital Equipment Corporation | Method of manufacturing thick-film devices |
EP0450773A2 (en) * | 1990-03-23 | 1991-10-09 | Minnesota Mining And Manufacturing Company | Ceramic composite for electronic applications |
EP0477004A2 (en) * | 1990-09-20 | 1992-03-25 | Fujitsu Limited | Multi-layer wiring board |
US5204289A (en) * | 1991-10-18 | 1993-04-20 | Minnesota Mining And Manufacturing Company | Glass-based and glass-ceramic-based composites |
US5213878A (en) * | 1990-03-23 | 1993-05-25 | Minnesota Mining And Manufacturing Company | Ceramic composite for electronic applications |
US5324370A (en) * | 1992-02-27 | 1994-06-28 | Fujitsu Limited | Method of manufacturing a multi-layered ceramic circuit board containing layers of reduced dielectric constant |
WO2018083830A1 (en) * | 2016-11-02 | 2018-05-11 | 株式会社村田製作所 | Ceramic electronic component and method for manufacturing ceramic electronic component |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5426873A (en) * | 1977-07-30 | 1979-02-28 | Matsushita Electric Works Ltd | Method of strengthing base material of paper for resin impregnation |
JPS5728345A (en) * | 1980-06-26 | 1982-02-16 | Ibm | Method of forming ceramic substrate |
JPS5789212A (en) * | 1980-11-25 | 1982-06-03 | Tdk Electronics Co Ltd | Composite ceramic electronic material |
-
1982
- 1982-12-17 JP JP57220331A patent/JPS59111345A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5426873A (en) * | 1977-07-30 | 1979-02-28 | Matsushita Electric Works Ltd | Method of strengthing base material of paper for resin impregnation |
JPS5728345A (en) * | 1980-06-26 | 1982-02-16 | Ibm | Method of forming ceramic substrate |
JPS5789212A (en) * | 1980-11-25 | 1982-06-03 | Tdk Electronics Co Ltd | Composite ceramic electronic material |
Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63358A (en) * | 1986-02-28 | 1988-01-05 | ディジタル イクイップメント コーポレーション | Low permittivity material for manufacture of subminiature electronic device |
EP0234896A2 (en) * | 1986-02-28 | 1987-09-02 | Digital Equipment Corporation | Improved micro-electronics devices and methods of manufacturing same |
EP0405947A2 (en) * | 1989-06-27 | 1991-01-02 | Digital Equipment Corporation | Method of manufacturing thick-film devices |
US5213878A (en) * | 1990-03-23 | 1993-05-25 | Minnesota Mining And Manufacturing Company | Ceramic composite for electronic applications |
EP0450773A2 (en) * | 1990-03-23 | 1991-10-09 | Minnesota Mining And Manufacturing Company | Ceramic composite for electronic applications |
US5108958A (en) * | 1990-03-23 | 1992-04-28 | Minnesota Mining And Manufacturing Company | Ceramic composite for electronic applications |
EP0477004A2 (en) * | 1990-09-20 | 1992-03-25 | Fujitsu Limited | Multi-layer wiring board |
US5275889A (en) * | 1990-09-20 | 1994-01-04 | Fujitsu Limited | Multi-layer wiring board |
GB2260541A (en) * | 1991-10-18 | 1993-04-21 | Minnesota Mining & Mfg | Glass - and - glass - ceramic- based composites |
US5204289A (en) * | 1991-10-18 | 1993-04-20 | Minnesota Mining And Manufacturing Company | Glass-based and glass-ceramic-based composites |
GB2260541B (en) * | 1991-10-18 | 1995-09-13 | Minnesota Mining & Mfg | Glass-based and glass-ceramic-based composites |
DE4234349C2 (en) * | 1991-10-18 | 2002-02-07 | Minnesota Mining & Mfg | Glass-based and glass-ceramic-based composites and process for their manufacture |
US5324370A (en) * | 1992-02-27 | 1994-06-28 | Fujitsu Limited | Method of manufacturing a multi-layered ceramic circuit board containing layers of reduced dielectric constant |
US5534331A (en) * | 1992-02-27 | 1996-07-09 | Fujitsu Limited | Method of manufacturing a multi-layered ceramic circuit board containing layers of reduced dielectric constant |
WO2018083830A1 (en) * | 2016-11-02 | 2018-05-11 | 株式会社村田製作所 | Ceramic electronic component and method for manufacturing ceramic electronic component |
CN109644556A (en) * | 2016-11-02 | 2019-04-16 | 株式会社村田制作所 | The manufacturing method of ceramic electronic components and ceramic electronic components |
JPWO2018083830A1 (en) * | 2016-11-02 | 2019-06-24 | 株式会社村田製作所 | Ceramic electronic component and method of manufacturing ceramic electronic component |
US11037729B2 (en) | 2016-11-02 | 2021-06-15 | Murata Manufacturing Co., Ltd. | Ceramic electronic component and method for manufacturing ceramic electronic component |
CN109644556B (en) * | 2016-11-02 | 2021-09-03 | 株式会社村田制作所 | Ceramic electronic component and method for manufacturing ceramic electronic component |
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