JPS59107662A - Line supervisory system of time division directional control transmission system - Google Patents

Line supervisory system of time division directional control transmission system

Info

Publication number
JPS59107662A
JPS59107662A JP21725282A JP21725282A JPS59107662A JP S59107662 A JPS59107662 A JP S59107662A JP 21725282 A JP21725282 A JP 21725282A JP 21725282 A JP21725282 A JP 21725282A JP S59107662 A JPS59107662 A JP S59107662A
Authority
JP
Japan
Prior art keywords
circuit
bit
signal
burst signal
polarity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21725282A
Other languages
Japanese (ja)
Other versions
JPS645495B2 (en
Inventor
Masaaki Sasagawa
笹川 正明
Hishiichi Komiya
小宮 菱一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP21725282A priority Critical patent/JPS59107662A/en
Publication of JPS59107662A publication Critical patent/JPS59107662A/en
Publication of JPS645495B2 publication Critical patent/JPS645495B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607Details of the supervisory signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • H04L1/0063Single parity check

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

PURPOSE:To supervise an error characteristic with high accuracy without adding a new bit by utilizing that a DC balance of a burst signal is kept to detect a code error, and using the polarity of the 1st bit of a burst signal in opposite direction to use the result of error detection as a toward station alarm signal. CONSTITUTION:A code error detecting circuit 34 of a subscriber's equipment 17 is connected to an equivalent amplifier circuit 19 and a control circuit 32, and an output of the circuit 34 controls a line driver 25. Further, a code error detecting circuit 35 and a counter station alarm detecting circuit 36 are connected to an equivalent amplifier circuit 26 and a control circuit 33. The sum of 1s in a burst signal is discriminated by using a receiving pulse from the circuit 19 and a frame synchronizing signal from the circuit 32 at the circuit 34 of the subscriber side and the result is added to the circuit 25. When the result of discrimination, by this circuit 25 is an odd number, the polarity of the 1st bit of the next burst signal is inverted and the result is transmitted to a telephone station 11. Further, the circuit 36 discriminates the presence of inversion of the polarity of the 1st bit at each burst signal, allowing to detect an erroneous bit with high accuracy.

Description

【発明の詳細な説明】 この発明は送信信号と受信信号とをそれぞれ時間圧縮し
てバースト周期ごとに双方向伝送を行う時分割方向制御
伝送方式における回線監視方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a line monitoring system in a time-division direction control transmission system in which a transmission signal and a reception signal are time-compressed and bidirectional transmission is performed every burst period.

〈従来技術〉 ディジタル加入者線伝送方式として時分割方向制御伝送
方式が研究されている3、一方、加入者線のディジクル
化とあい寸ってディジタル加入者回線の保守試験のより
一層の充実が重要と力ってきた。すなわち、通信中のデ
ィジタル加入者回線に対して常時回線監視を行い、もし
間約異常を4ケ・出すれば、速やかに保守試験を実施し
、障害箇所の切分けを行う必要がある。これにより利用
者に対するサービス性の利便向上が図られる。す、下、
時分割方向制御伝送方式の動作原理について述ベプこ後
、この伝送方式における従来の回想監視方式の問題点を
示す。
<Prior art> A time-division direction control transmission system is being researched as a digital subscriber line transmission system.3 On the other hand, with the shift to digital subscriber lines, maintenance tests for digital subscriber lines must be further enhanced. I have emphasized that it is important. In other words, it is necessary to constantly monitor the digital subscriber line during communication, and if four abnormalities are detected, a maintenance test must be carried out immediately to isolate the location of the failure. This improves the convenience of service for users. So, bottom,
After describing the operating principle of the time-division direction control transmission system, problems with the conventional retrospective monitoring system in this transmission system will be explained.

時分割方向制御伝送方式の原理は例えばIEEETra
nsactions on Communicatio
ns VOL、 C0M−29、NO,11,1981
,P1565〜PI372[Time−5hared 
TWO−Wired I)igital 5ubscr
iber’l’ransmission 5yster
n and Its Application t。
The principle of time-division direction control transmission method is, for example, IEEE Tra.
actions on communication
ns VOL, C0M-29, NO, 11, 1981
, P1565~PI372 [Time-5hared
TWO-Wired I) digital 5ubscr
iber'l'transmission 5yster
n and Its Application t.

the Digital ’l’elephone S
et Jにも述べられティるように、伝送すべきディジ
タル信号を時間圧縮して送信信号と受信信号が重ならな
いように時間的に配置することにより、2線式線路を用
いて双方向伝送するものでを)る。
the Digital 'l'elephone S
et J, bidirectional transmission is achieved using a two-wire line by time-compressing the digital signals to be transmitted and arranging them temporally so that the transmitted and received signals do not overlap. make something)

以下、第1図及び第2図を用いて具体的に説明する13
第1図において、電話局11におけるディジタル情月入
力端子12からのティジタル信号(は速度変倹: lr
’、!l i$ 13により第2図に示すバースト信’
j B+に変換される。スイッチ14を介してライント
ライバ回路15と平衡ケーブル16とを接続することに
よってこのバースト信号B1は加入者宅17の方向に伝
送される。このときスイッチ18(こより平衡ケーブル
16と等化増幅回路19とを接続することによって電話
局11からのバースト信号B1は等化増幅回路19にお
いて等化増幅された後、速度変4寿回路21においてj
ヰ続・1角号に変換されてラインタル信号出力端子22
に出力される。逆に)J1]人者宅17から電話局1]
へ伝送する際も、上記と同様の綜理で、ディジタル信号
入力端子23からのラインタル信号は、速度変換回路2
4、ライントライバ回路25、スイッチ18、平衡ケー
ブル16、スイッチ14、等化増幅回路26、速度変換
回路27をノ出し、バースト信号B2に変換されて伝送
され、更に連続信号に戻されてティジタル信号出力卯1
子28へ出力される9、なお、こ\で制御回路31及び
32は竹化増幅回路26あるいは19で再生された受信
バースト信号内のフレームビットを用いて、同期をとる
ことにより、スイッチ]、 4 、1.8及び速度変換
則ij!1t 1.3 + 27及0・21.24をそ
れぞれ制御する回h’J6である。
Hereinafter, 13 will be explained in detail using FIGS. 1 and 2.
In FIG. 1, a digital signal (speed variation: lr
',! The burst signal shown in FIG. 2 is generated by l i$ 13.
j Converted to B+. By connecting the line driver circuit 15 and the balanced cable 16 via the switch 14, this burst signal B1 is transmitted in the direction of the subscriber's home 17. At this time, the burst signal B1 from the telephone office 11 is equalized and amplified in the equalization amplifier circuit 19 by connecting the balanced cable 16 and the equalization amplifier circuit 19 through the switch 18 (through the switch 18). j
Converted to continuous/1 angle signal output terminal 22
is output to. Conversely) J1] From person's house 17 to telephone office 1]
When transmitting to the speed conversion circuit 2, the linear signal from the digital signal input terminal 23 is transmitted to the speed conversion circuit 2 using the same principle as above.
4. Line driver circuit 25, switch 18, balanced cable 16, switch 14, equalization amplifier circuit 26, and speed conversion circuit 27 are output, converted to burst signal B2 and transmitted, and then converted back to a continuous signal and digitalized. Signal output rabbit 1
9, in which the control circuits 31 and 32 are synchronized using the frame bits in the received burst signal reproduced by the bamboo amplifier circuit 26 or 19, and the switch], 4, 1.8 and speed conversion law ij! 1t 1.3 + 27 and 0.21.24, respectively, are controlled by h'J6.

この伝送方式において、他回絹)からの漏話や屑1音等
の原因により、再生され/こティジタルイh号が誤るこ
とがある。この符号誤りが発生しているか否かを受信側
で判定するだめには、従来においては伝送すべきディジ
タル信号lソ、外に誤り5険出符弓を伺加しておく必要
があった。この誤り検出′$J号の導入(はラインビッ
トレート 上の伝送速度)の増加を招くだめ、他四線からの漏話や
雑音等による符号誤pが発生しやすくなる。
In this transmission system, the reproduced/current signal may be erroneous due to causes such as crosstalk from other sources or garbled sounds. In order to determine on the receiving side whether or not this code error has occurred, it has conventionally been necessary to add an error code to the digital signal to be transmitted. Since the introduction of this error detection '$J number (transmission rate on the line bit rate) increases, code errors p are more likely to occur due to crosstalk, noise, etc. from the other four lines.

また複雑な誤り検出回路の追加により装置価格か増加す
るという欠点があった。
Another disadvantage is that the addition of a complicated error detection circuit increases the cost of the device.

〈発明の概要〉 この発明は新たなビットを付加することなく萌信中の」
二下回線の符号誤り特性を簡学な回路で高精度に監視で
きる時分割方向制御伝送方式の回線監視ノブ式を提供す
るものである,3 この発明によれ(ハ、時分割方向制御伝送方式において
バースト信号の直流平衡が常(で保たれていることを利
用して?!1・号誤りの有無を検出すると共に、逆方向
のバースト化号における最初のビットの極性を用いて、
符号誤り検出結果を対局警報信号として伝送する。
<Summary of the invention> This invention is in the process of development without adding any new bits.
This invention provides a line monitoring knob type time-division direction control transmission system that can monitor the code error characteristics of a second line with high precision using a simple circuit. By using the fact that the DC balance of the burst signal is always maintained at (!?1), the presence or absence of a signal error is detected, and by using the polarity of the first bit in the burst signal in the opposite direction,
The code error detection result is transmitted as a game warning signal.

実施例 この発明の詳細な説明に先立ち、バースト信号のフレー
ム構成を説明する。第3図はこの伝送方式のバースト信
号のフレーム構成例を示したものである。つせリバース
ト信号1はフレームビット、情報ビット、シグナリング
ビット及び直流平衡ビット」:りなる。この中で直流平
衡ビットはこの伝送方式特有のビットであって、バース
ト信号の直流成分をなくするために用いるビットである
。すなわち、バースト信号の直流平衡が確保されていな
いと、パターンによって直流レベルが変動して符号量干
渉が生じ、伝送特性が劣化j−る、、第4藺は直流平衡
ビットの具体的な使用例を示す図であって、伝送勾号と
j〜でA. M I符号を用いた場合を示す。AMI杓
号に2値付号の「1」を伝送する場合に送出パルスの極
性を交互に変えるものである。第4図Aに示すようにバ
ースト信号内のフレームビット、情報ビット、7グナリ
ングビツトについてこれらビットの「J」の合計が奇数
であれば、直流平衡ビットを「1」とし、第4図Bに示
すように偶数であれば「0」とする、、このようにして
バースト信号内の「1」の合剤を常に偶数とし、バース
ト信号内の直流平衡を確保する。
Embodiment Prior to a detailed explanation of the present invention, the frame structure of a burst signal will be explained. FIG. 3 shows an example of the frame structure of a burst signal of this transmission method. The reverse burst signal 1 consists of frame bits, information bits, signaling bits, and DC balance bits. Among these, the DC balance bit is a bit unique to this transmission method, and is a bit used to eliminate the DC component of the burst signal. In other words, if the DC balance of the burst signal is not ensured, the DC level will vary depending on the pattern, causing code amount interference and deteriorating the transmission characteristics.The fourth point is a specific example of the use of DC balanced bits. It is a diagram showing A. with the transmission gradient and j~. The case where MI code is used is shown. When transmitting a binary number "1" to the AMI signal, the polarity of the sending pulse is alternately changed. As shown in Fig. 4A, if the sum of "J" of these bits is an odd number for the frame bit, information bit, and 7 signaling bits in the burst signal, the DC balance bit is set to "1", and as shown in Fig. 4B As shown in the figure, if the number is even, it is set to "0". In this way, the mixture of "1"s in the burst signal is always an even number, and DC balance in the burst signal is ensured.

第5図はこの発明の実施例を示し、第1図と同じ回路に
は同一符号を付けである。符号誤り検出回路34が等化
増幅回路19、制御回路32に構成され、まだ符号誤り
検出回路35及び対局警報挽出回路36が等化増幅回路
26、制御回路33に接続される。符号誤り検出回路3
4の出力に」ニジライントライバ回路25が?ff制御
される。
FIG. 5 shows an embodiment of the invention, in which the same circuits as in FIG. 1 are given the same reference numerals. A code error detection circuit 34 is included in the equalization amplifier circuit 19 and the control circuit 32, and a code error detection circuit 35 and a game alarm recovery circuit 36 are connected to the equalization amplifier circuit 26 and the control circuit 33. Code error detection circuit 3
"Niji line driver circuit 25 is on the output of 4?" ff controlled.

市7話局11から加入者宅17への下り回線の慌田(C
ついて動作を説明する。符号誤り1央出回路34では砺
化4tj″)幅回1lV(’+ 19からの受信パルス
信号と匍]仰回il′1VT32からのフし/−ム同1
t11信号を用いてバースト1.−i号内の「1」の合
i−1か偶数か奇数かを判定し、この判定結果を送信側
のライントライバ回路25にべ力する。もし、判定結果
が奇数であればライントライバ回11’l’s 25に
おいて、次に伝送するハースl−=1M号(・′Cおけ
る最初のビットの極性を反転する1、た\゛L A M
 I ’4”J’ M則、つまり2値付号の11」を伝
送する場合、送出パルスの極性を交互に変える法則(づ
バースト信号内において確保1−でおく3,111.品
温11側の7J局爵■ぐ・演出回路36では、上り回線
のバースト信号毎に最初のビットの極性が反転1〜だか
盃かを判定し1.もし極性の反転が検出されれば下り回
線の回線異常情報を下り回線監視信号出力端子37に出
力する。
The down line from the city's 7th station station 11 to the subscriber's home 17 (C
The operation will be explained below. Code error 1 In the central output circuit 34, the width is 1lV (the received pulse signal from '+19 and the frame) the width is 1lV (the received pulse signal from '+19), the frame from VT32 is 1lV, and the width is 1lV.
Burst 1. using the t11 signal. It is determined whether the sum i-1 of "1" in number -i is an even number or an odd number, and the result of this determination is sent to the line driver circuit 25 on the transmitting side. If the determination result is an odd number, in the line driver circuit 11'l's 25, the polarity of the first bit in the next transmitted Haas l-=1M code (・'C is inverted 1, then \゛L A.M.
I '4" The 7J station output circuit 36 determines whether the polarity of the first bit is reversed for each burst signal on the uplink, whether it is 1 or 1. If a polarity reversal is detected, a downlink line abnormality is detected. The information is output to the downlink monitoring signal output terminal 37.

一方、加入者宅17から霜:語間11への上り回線の監
視については、符号誤り1ψ出回路35において下り回
線の回iY”j)監視と同様にバースト信号内の「1」
の合計が偶数か奇数かを判定することにより行う。すな
わち奇数であれば上り回線の回線異常情報を上り回紳監
視伯号出力AhI千38に出力する。
On the other hand, regarding the monitoring of the uplink from the subscriber's home 17 to the frost: word gap 11, the code error 1ψ output circuit 35 detects "1" in the burst signal in the same way as monitoring the downlink.
This is done by determining whether the sum of is even or odd. That is, if the number is odd, uplink line abnormality information is output to the uplink line supervisory output AhI1138.

以上述べたように1.」エリ回線1荒祝信号出力端f3
8及び下シ回線監視信号出力端子37に出力する上下回
線の回線監視信号を用い、電話局側において一元的に通
信中の回線監視を行うことかできる。第1表に上り回線
のバースト信号を用いて上下回線の回線状態を判定する
法則を示す。/こソし第1表はバースト信号における最
初のビットの極性が正の場合、下9回線は正常であると
約束1〜だ場合を示す。
As mentioned above, 1. ” Eri line 1 rough congratulation signal output terminal f3
By using the line monitoring signals of the upper and lower lines outputted to the upper and lower line monitoring signal output terminals 8 and 37, it is possible to centrally monitor the lines during communication at the central office side. Table 1 shows the rules for determining the line status of uplink and downlink lines using uplink burst signals. Table 1 shows that if the polarity of the first bit in the burst signal is positive, the lower 9 lines are guaranteed to be normal.

第   1    表 第1表の判定法則を用いた監視例を以下に示ず5、第1
衣に示す回線状態の監視は1ビット誤りであるから、実
際の回H幣”rM /ステムでr、J:測定時間及び符
は誤りビット数をどの程度に選ぶかが問題とガる1、い
1、符号誤りの発生過程かランダムとすると、障害検出
確率1tは、電子通信学会論文誌63−B巻7号「ディ
ジタル伝送系監視装置の一構成法」の式(5)より次式
で力えられる。
Table 1 Examples of monitoring using the judgment rules in Table 1 are shown below.
Since the line status monitoring shown in Figure 1 is a 1-bit error, the problem is how much the number of error bits is selected for the actual cycle time and sign. 1. Assuming that the code error generation process is random, the fault detection probability 1t can be calculated from equation (5) in IEICE Transactions 63-B, Vol. It gives me strength.

とXで、εは実際の符号誤り率、εtは符号誤り率のし
きい鉋、rは伝送速度、tMは測定時間である。
and X, ε is the actual bit error rate, εt is the threshold of the bit error rate, r is the transmission rate, and tM is the measurement time.

上式の計算15114を第6図に示す。第6図は符号誤
りビット数ntか多い作、すなわち測定時間tMが長い
程、信頼度の商い障害構出ができることを示している。
The calculation 15114 of the above equation is shown in FIG. FIG. 6 shows that the larger the number of code error bits nt is, that is, the longer the measurement time tM is, the more likely it is that failures will occur due to the reliability.

こXで、例えばr=64Kb/ Sz nt−10、g
t=1.0−5とすると、oal *時間tMid15
.6秒となる。第6図より99%の信頼度で、この時の
実際の符号誤り率は2゜04X10’以下であるといえ
る。すなわち、第1表の判定法則により、約16秒に上
下回線の符号誤りを計数し、10個以」−の符号誤りが
計数したとき、警報を発生ずる」:うにしておけば、信
頼度99%で約2X]O”””のt1号誤り率の監視シ
ステムが実現できる。、この’A2i視シスデシステム
い値、信頼度などの数値は一例であって、要求される監
視7ステムの信頼性に応じて決めればよい。
In this case, for example, r=64Kb/Sz nt-10, g
If t=1.0-5, oal * time tMid15
.. It will be 6 seconds. From FIG. 6, it can be said that with a reliability of 99%, the actual bit error rate at this time is 2.04.times.10' or less. In other words, according to the decision rule in Table 1, code errors in the upper and lower lines are counted every 16 seconds, and when 10 or more code errors are counted, an alarm is generated. It is possible to realize a monitoring system with a t1 error rate of approximately 2X]O""" at 99%.The numerical values of this 'A2i vision system, reliability, etc. are just examples, and the required monitoring system 7 system It can be decided according to the reliability of

〈効 果〉 以上述べたように、この発明を用いることに」:り新だ
なビットを伺加することなく、通信中の上下回線の符号
誤り特性を簡単々回路で高精度に監視できる。このため
、装置価格を増加させることなく、回線の保守試験の迅
速化が図られ、利用者に灼するサービス性の向上が促進
される9゜
<Effects> As described above, by using the present invention, the code error characteristics of the up and down lines during communication can be easily monitored with high precision using a circuit without adding any new bits. Therefore, without increasing the equipment price, line maintenance tests can be speeded up, and serviceability improvements that will be of great benefit to users will be promoted.

【図面の簡単な説明】[Brief explanation of the drawing]

禰→)+1ll1i1J淀4」琺j民第1図は時分割方
向制御伝送方式の機能ブロック図、第2図は第1図の動
作を説明するタイムチャート図、第3図は第2図のバー
スト信号のフレーム構成図、第4図は第3図の直流平衡
ビットの役割を説明するタイムチャート図、第5図は本
発明の実施1夕1」を示す装置構成ブロック図、第6図
は障害検出特性図である。 1、2 、23 :ライジタル信号入力端子、13゜2
1、 、24.27 :速度変換回路、14 、18:
スイッチ、15,25ニライントライバ、16:平衡ケ
ーブル、19.26:等化増幅回路、22,28:ディ
ジタル信号出力端子、31.32:制御回路、34,3
5:符号誤り検出回路、36:対局警報検出回路、37
:下り回線監視信号出力端子、38:上り回線監視信号
出力端子。 特許出願人  日本型<@電1話公社 代(]1!人 草野 卓 (11) A′71 図 12             u か 2 図 汁 3 図 片 4 文 井 5 図 1
Figure 1 is a functional block diagram of the time division direction control transmission system, Figure 2 is a time chart explaining the operation of Figure 1, and Figure 3 is the burst diagram of Figure 2. Figure 4 is a time chart diagram explaining the role of the DC balance bit in Figure 3. Figure 5 is a block diagram of the equipment configuration showing the implementation of the present invention. It is a detection characteristic diagram. 1, 2, 23: Digital signal input terminal, 13°2
1, , 24.27: Speed conversion circuit, 14, 18:
Switch, 15, 25 line driver, 16: Balanced cable, 19.26: Equalization amplifier circuit, 22, 28: Digital signal output terminal, 31.32: Control circuit, 34, 3
5: Code error detection circuit, 36: Game alarm detection circuit, 37
: Downlink monitoring signal output terminal, 38: Uplink monitoring signal output terminal. Patent applicant Japanese type <@Telephone 1 phone public corporation representative (] 1! person Taku Kusano (11) A'71 Figure 12 Uka 2 Zuju 3 Figure piece 4 Fumi 5 Figure 1

Claims (1)

【特許請求の範囲】[Claims] (1)送信信号と受信信号をそれぞれ時間圧縮してバー
スト周期毎に双方向伝送を行う時分割方向制御伝送方式
において、バースト周期内の受信信号における正及び負
の極性のパルス数が等しいか否かを・ど出し、そのパル
ス数が等しくないことが検出されると、送信信号におけ
る最初のビットの極性全反転することによって対局警報
を伝送することを特徴とする時分割方向制御伝送方式の
回線監視方式つ
(1) In a time-division direction control transmission method in which the transmitted signal and the received signal are time-compressed and bidirectional transmission is performed in each burst period, whether the number of positive and negative polarity pulses in the received signal within the burst period is equal. A time-division direction control transmission line characterized in that when it is detected that the number of pulses is unequal, the polarity of the first bit in the transmitted signal is completely inverted to transmit a game warning. Monitoring method
JP21725282A 1982-12-10 1982-12-10 Line supervisory system of time division directional control transmission system Granted JPS59107662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21725282A JPS59107662A (en) 1982-12-10 1982-12-10 Line supervisory system of time division directional control transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21725282A JPS59107662A (en) 1982-12-10 1982-12-10 Line supervisory system of time division directional control transmission system

Publications (2)

Publication Number Publication Date
JPS59107662A true JPS59107662A (en) 1984-06-21
JPS645495B2 JPS645495B2 (en) 1989-01-31

Family

ID=16701228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21725282A Granted JPS59107662A (en) 1982-12-10 1982-12-10 Line supervisory system of time division directional control transmission system

Country Status (1)

Country Link
JP (1) JPS59107662A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6247246A (en) * 1985-08-27 1987-02-28 Nec Corp Remote loop back system
EP0264879A2 (en) * 1986-10-20 1988-04-27 Nec Corporation A fault detection signal transmission system
JPS63136737A (en) * 1986-11-27 1988-06-08 Nec Corp Transmission error supervisory equipment

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6247246A (en) * 1985-08-27 1987-02-28 Nec Corp Remote loop back system
EP0264879A2 (en) * 1986-10-20 1988-04-27 Nec Corporation A fault detection signal transmission system
JPS63136737A (en) * 1986-11-27 1988-06-08 Nec Corp Transmission error supervisory equipment
JPH0547141B2 (en) * 1986-11-27 1993-07-15 Nippon Electric Co

Also Published As

Publication number Publication date
JPS645495B2 (en) 1989-01-31

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