JPS59107287A - Electronic apparatus with clock - Google Patents

Electronic apparatus with clock

Info

Publication number
JPS59107287A
JPS59107287A JP57218006A JP21800682A JPS59107287A JP S59107287 A JPS59107287 A JP S59107287A JP 57218006 A JP57218006 A JP 57218006A JP 21800682 A JP21800682 A JP 21800682A JP S59107287 A JPS59107287 A JP S59107287A
Authority
JP
Japan
Prior art keywords
clock
capacitor
electronic device
battery
external terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57218006A
Other languages
Japanese (ja)
Inventor
Hirotoshi Nakajima
中島 博敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP57218006A priority Critical patent/JPS59107287A/en
Publication of JPS59107287A publication Critical patent/JPS59107287A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G99/00Subject matter not provided for in other groups of this subclass

Abstract

PURPOSE:To prevent the malfunction and the destruction of an IC, by connecting a capacitor, Zener diode, etc. between an external terminal and a grounding line. CONSTITUTION:The grounding line of an electronic apparatus provided with a clock circuit 16 including a battery 6 internally, and a slave circuit 1, not including the clock, which receives signals and power from external terminals 1, 2, and 3 is operated, is connected to a case 7. A capacitor 18 and Zener diodes 31 and 32 are connected between external terminals 2 and 3 and the grounding line. Since the static electricity applied to external terminals 2 and 3 is flowed to the ground through the capacitor 18 and Zener diodes 31 and 32, the malfunction and the destruction of the IC of the salve circuit 17.

Description

【発明の詳細な説明】 本発明は・、外部憎子を有する時計付電子機器に関し、
特に、外部端子を有する時計付電子機器の静電気に対す
る工aの誤動作や破壊を防止する構造に関する。
[Detailed Description of the Invention] The present invention relates to an electronic device with a clock having an external holder,
In particular, the present invention relates to a structure for preventing malfunction or destruction of electronic devices with external terminals due to static electricity.

近年、半導体の高集積化がますます推進されてきたが、
このことは、一般的にはICの耐静電気レベルが弱くな
ってきたことを意味する。また、半導体を応用した製品
も多様化され、外部回路から信号や電源の洪給金受ける
ための外部端子を備えた電子機器も出回ってきている。
In recent years, higher integration of semiconductors has been promoted more and more.
This generally means that the electrostatic resistance level of ICs has become weaker. In addition, products using semiconductors have become more diverse, and electronic devices equipped with external terminals for receiving signals and power from external circuits are now on the market.

しかし、外部端子を有していることは、従来金属ケース
でシールドされていたり、プラスチックケースで絶縁さ
れていたICの端子部に直接静電圧が加わることになり
、ICの誤動作や破壊の原因となってしまう。
However, having external terminals means that static voltage is applied directly to the terminals of the IC, which were conventionally shielded with a metal case or insulated with a plastic case, which can cause malfunction or destruction of the IC. turn into.

本発明は、このような不具合をなくそうというもので、
以下、図面により説明する。
The present invention aims to eliminate such problems,
This will be explained below with reference to the drawings.

第1図は、内部に電池を含む時計回路と、外部端子を有
し外部から電源や信号の供給を受けて作動する時計以外
の従属回路を備え7’(電子機器で、静社気対策を行な
っていない場合の結線例を示したもので、1はグランド
Gの外部端子、2Fi信号Sの外部端子、3は外部電源
Vの外部端子であり、4は回路基板、5は電池押え、6
は電池、7はケースを示す。まfc8〜15は、各部材
間の接触抵抗であり、16は時計用工C517は従属回
路のICである。コンデンサ18は、工017の電源採
掘コンまたはパスコンで、コンデンサ19は、コンデン
サ20のスイ、ツチングにより、電池の2倍電圧を作っ
た昇圧電源で、工016の回路の大半はこの昇圧電源に
よって作動している。21は容量Cファラッドで、電圧
Vsボルト、電荷aVクーロンの静電圧印加モデルを表
わしたものである。
Figure 1 shows a clock circuit containing an internal battery and a subordinate circuit other than a clock that has an external terminal and operates by receiving power and signals from the outside. This shows an example of wiring when this is not done. 1 is the external terminal for ground G, 2 is the external terminal for Fi signal S, 3 is the external terminal for external power supply V, 4 is the circuit board, 5 is the battery holder, and 6 is the external terminal for external power supply V.
indicates the battery, and 7 indicates the case. fc8 to fc15 are contact resistances between each member, and 16 is a watchmaker C517 is an IC of a dependent circuit. The capacitor 18 is a power mining capacitor or bypass capacitor of the engineering 017, and the capacitor 19 is a boosted power supply that creates twice the voltage of the battery by switching and switching the capacitor 20. Most of the circuits of the engineering 016 are operated by this boosted power supply. are doing. 21 is a capacitance C farad, which represents an electrostatic voltage application model of voltage Vs volts and charge aV coulombs.

いま、ケース7と外部端子2の間に静電圧が加わると、
静電気は従属回路の工017に流れ込み、工017を破
壊してしまう。ケース7と外部端子3の間に静璽、圧が
加わった場合は、静゛M1気の一部t・ユコンデンサ1
8を通ってグランドに流れるが、コンデンサの容量次第
では、工017にも流れ込んで工0破壊を引きおこして
しまう。また、コンデンサを通って大電流が流れるため
、AB間のパターン抵抗によ#)AB間に電圧を生ずる
ため、昇圧コンデンサのV a81レベルが変動してし
まい、IC誤動作の原因となる。同様に、AC間、BC
間のパターン抵抗のため、Vaslの電位とVu日雪。
Now, when static voltage is applied between case 7 and external terminal 2,
Static electricity flows into the slave circuit 017 and destroys it. If static or pressure is applied between the case 7 and the external terminal 3, some of the static
It flows to the ground through 8, but depending on the capacitance of the capacitor, it may also flow into 017, causing damage to 0. In addition, since a large current flows through the capacitor, a voltage is generated between A and B due to the pattern resistance between A and B, which causes the Va81 level of the boost capacitor to fluctuate, causing IC malfunction. Similarly, between AC, BC
Because of the pattern resistance between the potential of Vasl and Vu.

VDD  の電位のレベル変動が起こり、IC誤動作の
原因となる。ケース7と端子1に静電圧が加わった場合
は、主として回路基板4と電池押え5の接触抵抗11に
よりOA間、CB間に電圧が生ずるため、Vsslの電
位に対してV ep@やVDDの電位が変動してしまう
Fluctuations in the level of the VDD potential occur, causing IC malfunction. When static voltage is applied to the case 7 and the terminal 1, a voltage is generated between OA and CB mainly due to the contact resistance 11 between the circuit board 4 and the battery holder 5. The potential fluctuates.

第2図は、本発明の一実施例でちり、端子2゜端子3と
グランド間にそれぞれ、ツェナーダイオード31,32
を励綜しである。ツェナー電圧は端子2まfCは5の電
圧レベルにより、常時は流れないような電圧レベルのも
のを採用する。このように結線することにより、端子2
に加えられた静電気は、主としてツェナーダイオード3
1を経てグランドに流入する。また端子3に加えられた
静電気は、ツェナーダイオード52とコンデンサ1Bを
経てグランドに流入し、IC破it防ぐことができる。
FIG. 2 shows an embodiment of the present invention in which Zener diodes 31 and 32 are connected between terminal 2 and terminal 3 and ground, respectively.
I encourage you. The Zener voltage is set to a voltage level at terminals 2 and 5, which does not normally flow. By connecting in this way, terminal 2
The static electricity added to the zener diode 3
1 and flows into the ground. Furthermore, the static electricity applied to the terminal 3 flows into the ground via the Zener diode 52 and the capacitor 1B, thereby preventing damage to the IC.

しかし第2−では、l016の誤動作に対してIr14
だ完全でなく、ICの誤動作を極力少なくするために1
dBD間のパターン抵抗を少なくし、回路基板4と電池
押えの接触抵Kを小さくしなければならない。すなわち
、B’D間のパターン幅を広くする。電池押えを金メッ
キする。電池と電池押えを溶接する等の工夫が必要とな
る。
However, in the second case, Ir14 due to malfunction of l016
However, it is not perfect, but in order to minimize IC malfunction, 1.
It is necessary to reduce the pattern resistance between dBD and the contact resistance K between the circuit board 4 and the battery holder. That is, the pattern width between B'D is widened. Gold plate the battery holder. It is necessary to take measures such as welding the battery and battery holder together.

第3図は、本発明の他の実施例であシ、端子2端子3と
グランド間にそれぞれツェナーダイオード31.32金
結線することにより、工017の破壊を防止し、また静
電気が流れるループと時計用ICの電源のループt″重
ならないように配線することによシ、V’nD、 V8
F31 、 Vssz間の電位レベル変動をなくシ、工
C16の誤動作を防止したものである。
FIG. 3 shows another embodiment of the present invention, in which Zener diodes are connected with 31 and 32 gold wires between terminal 2 and terminal 3, respectively, to prevent damage to the wire 017 and to prevent static electricity from flowing through the loop. By wiring the clock IC power supply loop t'' so that it does not overlap, V'nD, V8
This eliminates potential level fluctuations between F31 and Vssz, and prevents malfunction of C16.

第4園は、本実施例の構造をテレビ表示腕時計を例にと
り説明したもので、ウォッチ表示用の液晶表示体41.
ウォッチ用工C42,ウォッチ用電池43により、ウォ
ッチ部は常に表示されている。テレビをみる場合は、別
体のチューナーから電源とイざ号を外部端子44により
供給し、同期制御工○45や他の回路素子を経てテレビ
表示用のアクティブマトリックスパネル46に供給する
In the fourth part, the structure of this embodiment is explained using a television display wristwatch as an example.
The watch part is always displayed by the watch operator C42 and the watch battery 43. When watching television, power and signals are supplied from a separate tuner through an external terminal 44, and are supplied to an active matrix panel 46 for television display via a synchronization controller 45 and other circuit elements.

a7Fiツェナーダイオードで、ケース48と外部端子
44間に加えられた静電気を電池押え49t−通してア
ースしてやる。50i!圧電スピーカで、裏ブタに貼付
けられている。時計用ICの誤動作を防止するため、時
計用電源のグランドは、コイルはね52fc介して電池
押えに接続されている。
Using the a7Fi Zener diode, static electricity applied between the case 48 and the external terminal 44 is grounded through the battery holder 49t. 50i! A piezoelectric speaker attached to the back cover. In order to prevent malfunction of the watch IC, the ground of the watch power source is connected to the battery holder via the coil spring 52fc.

以上、本発明の詳細な説明したが、第2因と第srAは
、製品により使いわけが必要である。
Although the present invention has been described in detail above, the second factor and the srA must be used depending on the product.

尚、本実施例では、静電気バイパス用の素子としてツェ
ナーダイオードで説明したが、その他のダイオード類や
コンデンサ等の単独または並用使用も、本発明に含まれ
る。また、電池押えと回路基数間にスイッチばね等他の
導通部品を介在させた場合も、他の導通部品を含めて広
い意味で電池押えとみなし、本発明に含まれる。。
In this embodiment, a Zener diode is used as an element for electrostatic bypass, but the present invention also includes the use of other diodes, capacitors, etc. alone or in combination. Further, even if other conductive parts such as a switch spring are interposed between the battery holder and the circuit board, this is considered to be a battery holder in a broad sense including other conductive parts, and is included in the present invention. .

本発明によれば、簡単な部品追加で、外部端子に加わる
静電気のための工C植廐を防止できる。
According to the present invention, by simply adding parts, it is possible to prevent damage caused by static electricity applied to external terminals.

また、パターン抵抗や接触抵抗にあまり気を使うことな
く、簡単な配線の工夫でIC誤動作を防止できる。
Furthermore, IC malfunctions can be prevented by simple wiring techniques without having to worry too much about pattern resistance or contact resistance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、静電気による破壊、誤動作を起こすブロック
図、第2図、第3図は、本発明の実施例を示すブロック
図、第4図は本発明の構造例を示す図。 1〜3・旧・・外部端子 4 ・・・・・・・・・回路基板 5 ・・・・・・・・・電池押え 6・・・・・・・・・電池 7 ・・・・・・・・・ケース 51.52・・・・・・ツェナーダイオード以   上 出願人 株式会社 睡訪精工舎
FIG. 1 is a block diagram showing damage caused by static electricity and malfunctions, FIGS. 2 and 3 are block diagrams showing embodiments of the present invention, and FIG. 4 is a diagram showing a structural example of the present invention. 1-3 Old...External terminal 4...Circuit board 5...Battery holder 6...Battery 7... ...Case 51.52 ...Zener diode and above Applicant Suiwa Seikosha Co., Ltd.

Claims (4)

【特許請求の範囲】[Claims] (1)  ′FjL池を含む時計回路と、外部端子を有
し外部からfff号またtま電源の供給を受けて作動す
る時計以外の回路と1r、備えた時計付電子機器におい
て、グランドラインをケースに接続し、外部端子とグラ
ンドライン間に静電気を逃がすためのコンデンサ、ツェ
ナーダイオード等のデバイスを接続したことを特徴とす
る時計付電子機器。
(1) In an electronic device with a clock that includes a clock circuit including a FjL battery, and a circuit other than a clock that has an external terminal and operates by receiving an external power supply, the ground line must be connected to the ground line. An electronic device with a clock, which is connected to a case and has devices such as a capacitor and Zener diode connected between an external terminal and a ground line to release static electricity.
(2)時計回路電源のグラス側がグランドに接続され、
外部端子に別見られた静電気が流れる主なループと時計
回路電源の電流ループが重ならないように配線されたこ
とを特徴とする特許請求の範囲第1項記載の時計付電子
機器。
(2) The glass side of the clock circuit power supply is connected to ground,
2. The electronic device with a timepiece according to claim 1, wherein the wiring is such that the main loop through which static electricity flows separately from the external terminal and the current loop of the timepiece circuit power supply do not overlap.
(3)時計回路電源のプラス側ラインとコンデンサによ
る昇圧電源のプラス側ラインをパターン上の同一箇所に
配線したことを特徴とする特許請求の範囲第1項記載の
時計付電子機器。
(3) The electronic device with a clock according to claim 1, wherein the positive line of the clock circuit power source and the positive line of the boosted power source using a capacitor are wired at the same location on the pattern.
(4)  時計用電池のプラス側ラインを他の信号ルー
プを介さず電池押えに接続したことを特徴とする特許請
求の範囲第1項記載の時計付電子機器。
(4) The electronic device with a clock according to claim 1, wherein the positive line of the clock battery is connected to the battery holder without going through another signal loop.
JP57218006A 1982-12-13 1982-12-13 Electronic apparatus with clock Pending JPS59107287A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57218006A JPS59107287A (en) 1982-12-13 1982-12-13 Electronic apparatus with clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57218006A JPS59107287A (en) 1982-12-13 1982-12-13 Electronic apparatus with clock

Publications (1)

Publication Number Publication Date
JPS59107287A true JPS59107287A (en) 1984-06-21

Family

ID=16713145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57218006A Pending JPS59107287A (en) 1982-12-13 1982-12-13 Electronic apparatus with clock

Country Status (1)

Country Link
JP (1) JPS59107287A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158199A (en) * 1984-08-29 1986-03-25 オムロン株式会社 Electronic device
JP2016075681A (en) * 2014-10-06 2016-05-12 イーエム・ミクロエレクトロニク−マリン・エス アー Motor driver device having timepiece motor driver and related component circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5226871A (en) * 1975-08-25 1977-02-28 Seiko Instr & Electronics Ltd Protection circuit for portable electronic watches
JPS534578A (en) * 1976-07-02 1978-01-17 Seiko Epson Corp High-frequency crystal wrist watch

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5226871A (en) * 1975-08-25 1977-02-28 Seiko Instr & Electronics Ltd Protection circuit for portable electronic watches
JPS534578A (en) * 1976-07-02 1978-01-17 Seiko Epson Corp High-frequency crystal wrist watch

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158199A (en) * 1984-08-29 1986-03-25 オムロン株式会社 Electronic device
JP2016075681A (en) * 2014-10-06 2016-05-12 イーエム・ミクロエレクトロニク−マリン・エス アー Motor driver device having timepiece motor driver and related component circuit

Similar Documents

Publication Publication Date Title
US5155648A (en) Device for protecting a direct current electrical power supply from disturbances caused by connecting to it or disconnecting from it an electronic system
JPS62250827A (en) Overcurrent breaking circuit
JPS6142235A (en) Battery backup circuit
JPS59107287A (en) Electronic apparatus with clock
US4771184A (en) Electronic switch apparatus
JPH07261191A (en) Liquid crystal display device
US5179492A (en) Protection circuit for detachable operating unit used in audio device
JP2746894B2 (en) Power supply line for electronic equipment
US20200294440A1 (en) Display panel and boost circuit thereof
EP0448864B1 (en) Protection circuit for detachable operating unit used in audio device
US5900680A (en) Circuit arrangement for supplying an operating voltage from an operating voltage source to a plurality of connectable and detachable circuit units
JPH088475Y2 (en) Electronic clock with alarm
US5333094A (en) Transient reduction circuit
JPH0830742B2 (en) Analog electronic clock
JPH05157793A (en) Power source circuit with check of shortcircuiting
JPH0619314Y2 (en) Step-down circuit
KR890003484B1 (en) Efficiency test circuits for oneself of computer monitor
JPH0479762A (en) Stabilizing circuit for dc power
JPH04271085A (en) Portable storage device
CN114019265A (en) PM module screen line grafting detection circuitry
JPH09177597A (en) Ground fluctuation preventing device for engine electronic control device
JPH10201223A (en) Switching power supply unit
JPS6046537U (en) Camera battery warning device
KR200153714Y1 (en) A reset apparatus
JP2814493B2 (en) Output circuit