JPS59105183A - Coordinate reading device - Google Patents
Coordinate reading deviceInfo
- Publication number
- JPS59105183A JPS59105183A JP57215267A JP21526782A JPS59105183A JP S59105183 A JPS59105183 A JP S59105183A JP 57215267 A JP57215267 A JP 57215267A JP 21526782 A JP21526782 A JP 21526782A JP S59105183 A JPS59105183 A JP S59105183A
- Authority
- JP
- Japan
- Prior art keywords
- coordinate
- signal
- reading device
- control section
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/046—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by electromagnetic means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Electromagnetism (AREA)
- Human Computer Interaction (AREA)
- General Physics & Mathematics (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は座標読取装置に関し、減算機部を演算制御部に
追加することVこより座標He取りの誤動作をなくした
座標読取装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a coordinate reading device, and more particularly, to a coordinate reading device that eliminates malfunctions in obtaining coordinates He from V by adding a subtracter section to an arithmetic control section.
従来、座標読取装置を実装に使用する際、第1図のよう
にセンスラインXIL(Ym)i有する基板2上の絶縁
材からなるカバー2αの上に座標指示器4を持った手H
i載せなけnばならない。この時励磁コイル5と手Hと
の間、および手Hとセンス線Xn (Ym)との間にそ
nぞ扛浮遊容量C81、C8□を形成してしまう。する
と、コイル5からの交流磁界φにより生ずる電磁波によ
って浮遊容量cB、の電位が振動し、この電位振動が手
Hff:通v、、更に浮遊容量082f!:介してセン
スmXncYm)と静電結合する。従って、センスgX
n(Ym)は座標指示器4がタブレット近傍に無いのに
もかかわらず手Hからの静電誘導の起電力を発生するこ
とになる。Conventionally, when using a coordinate reading device for mounting, a hand H holding a coordinate indicator 4 is placed on a cover 2α made of an insulating material on a substrate 2 having a sense line
I have to put it on. At this time, stray capacitances C81 and C8□ are formed between the excitation coil 5 and the hand H, and between the hand H and the sense line Xn (Ym). Then, the potential of the stray capacitance cB oscillates due to the electromagnetic waves generated by the alternating magnetic field φ from the coil 5, and this potential oscillation causes the stray capacitance 082f! : is electrostatically coupled to the sense mXncYm). Therefore, sense gX
n(Ym) generates an electromotive force due to electrostatic induction from the hand H even though the coordinate indicator 4 is not near the tablet.
この状態を増幅F波さnfc走査波形で見ると第2図の
ようになり、静電誘導による起電力70分だけ走査波形
がレベルアップしてしまう。通常の波形を第3図に示す
がピーク電圧Vpは6V程度でv thは約1゜5■に
設定しである。こnに対し第2図の静電誘導電圧■。は
2vにまで達することがある。第4図にピーク電圧Vp
判足の演算制御部の動作をフローチャートに示す。従来
の演算は第4図に示す通りセンス線に誘導さnた電圧の
最大値VfiAXがスレッシュホルド電圧■thを越え
るとただちにピーク電圧Vpと判定してしまう。従って
通常状態では検出しない電圧が静電誘導によりスレッシ
ュホルド′「E圧Vthf越えてしまい、演算制御部は
第2図において走査した場合、Plをピーク座標と判定
し、誤った座標指示器4の位置を算出してしまい、正確
な座標読取りができないという欠点があった。When this state is viewed in terms of the amplified F wave and NFC scanning waveform, it becomes as shown in FIG. 2, and the level of the scanning waveform increases by 70 minutes of the electromotive force due to electrostatic induction. A normal waveform is shown in FIG. 3, and the peak voltage Vp is about 6V, and vth is set to about 1°5. In contrast, the electrostatic induced voltage (■) in Figure 2. can reach up to 2v. Figure 4 shows the peak voltage Vp
The operation of the calculation control unit of the hansoku is shown in a flowchart. In the conventional calculation, as shown in FIG. 4, when the maximum value VfiAX of the voltage induced in the sense line exceeds the threshold voltage th, it is immediately determined to be the peak voltage Vp. Therefore, the voltage that is not detected in the normal state exceeds the threshold 'E voltage Vthf due to electrostatic induction, and when the arithmetic and control unit scans in FIG. The disadvantage was that the position was calculated and accurate coordinate reading was not possible.
不発明は上記の欠点を速やかに除去すべくなさtたもの
で、演算制御部で比較減算を行なうことにより、手によ
って発生する浮遊容量による静電誘導の座標読取誤動作
を除去することができる座標読取装置である。The invention was made in order to promptly eliminate the above-mentioned drawbacks, and by performing comparison and subtraction in the arithmetic control section, it is possible to eliminate coordinate reading errors due to electrostatic induction caused by stray capacitance caused by hands. It is a reading device.
以下図面と共に本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.
不厘標読取装置は第5図のように1;1.7成さnてい
る。すなわち、1はタブレットであり、センス線Xn、
Ymを有する絶縁板2からなっている。The non-standard mark reading device has a 1:1.7 configuration as shown in FIG. That is, 1 is a tablet, the sense line Xn,
It consists of an insulating plate 2 having Ym.
3x、3yは各センス線Xn、Ymi走査する走査回路
、4は座標指示器であり、この指示器4は前記センス線
x’yt 、Ymに誘導信号を発生するためのコイル5
を先端部に有している。6は励磁回路テコイル5に約3
\\KH2の励磁信号を与える。7はセンス線Xn、Y
mからの誘導信号tを波形処理する増幅p波回路7,8
は増幅p波回路7からの信号をA / D変換するA
/ D変換器である。走査回路3X、3Y、増幅ろ波回
路7、A/D変換器8により走査検出回路を構成してい
る。3x, 3y are scanning circuits for scanning each sense line Xn, Ymi, 4 is a coordinate indicator, and this indicator 4 is connected to a coil 5 for generating an induction signal to the sense lines x'yt, Ym.
It has at the tip. 6 is about 3 to the excitation circuit coil 5
\\Give KH2 excitation signal. 7 is the sense line Xn, Y
Amplifying p-wave circuits 7 and 8 for waveform processing the induced signal t from m
is A for A/D converting the signal from the amplifying p-wave circuit 7.
/D converter. The scanning circuits 3X and 3Y, the amplification/filtering circuit 7, and the A/D converter 8 constitute a scanning detection circuit.
9は演算制御部であり、データメモリ、CPUを含みA
/ D変換器8からの信号で座標指示器40位翫ヲ演
算すると共に他の全ての外部入出力の制御を行なってい
る。1\は外部機器とのインタフェース回路である。さ
らに、前記演算制御部のA/D変換器より得らルる検出
信号のピーク判定動作全フローチャートに従って展開し
て述べると、フローチャート図は第6図に示す通ジであ
る。すなわち、Aは検出信号の最大値VmAX、最小値
Vminの検出部、Bはその最大値V m A Xと最
小値V m i nとの電圧差△v6検出し、スレッシ
ュホルド値△■τe 、fとの比較部である。Aの部分
によりBの部分の演算
△V = VyLAz −V m1tL△V〉△Vre
f
を可能とし、この演算により静電誘導によるピーク電圧
であるか否かの判定をする。9 is an arithmetic control unit, which includes a data memory and a CPU;
/ The signal from the D converter 8 calculates the 40th position of the coordinate indicator and controls all other external inputs and outputs. 1\ is an interface circuit with external equipment. Furthermore, if the entire flowchart of the peak determination operation of the detection signal obtained from the A/D converter of the arithmetic and control section is developed and described, the flowchart will be the same as shown in FIG. That is, A is a detection unit for detecting the maximum value VmAX and minimum value Vmin of the detection signal, and B detects a voltage difference △v6 between the maximum value VmAX and minimum value Vmin, and the threshold value △■τe, This is a comparison section with f. Calculation of part B by part A △V = VyLAz −V m1tL△V〉△Vre
f is made possible, and it is determined by this calculation whether or not the peak voltage is due to electrostatic induction.
実験によると、第2図において静電誘導による電圧差△
■αは約\。2v程度である。こnVC対し第3図にお
いて実際の座標指示器の電磁訪グIによる電圧差△Vb
は最小IV程贋である。し1こがってスレッシュホルド
値△Vreff\、5■に設足すlしば、第6図の実施
例により静篭訪界による座標読取装置の座標読取りの誤
動作を除去することができる。According to experiments, the voltage difference △ due to electrostatic induction in Figure 2
■α is approximately \. It is about 2v. With respect to this nVC, the voltage difference △Vb due to the electromagnetic contact I of the actual coordinate indicator in Fig. 3 is
is as fake as the minimum IV. However, by setting the threshold value △Vref\, 5■, it is possible to eliminate the malfunction of the coordinate reading of the coordinate reading device due to the static visit by the embodiment shown in FIG.
以上のように不発明によnば、座標読取装置において基
本的なイ幾能である座標読取の誤動作をわずかな・段面
の追加にエフなくし、従来の装置と比較し著しく信頼性
を同上させら几る効果を有するAs described above, according to the invention, the malfunction of coordinate reading, which is a basic function in a coordinate reading device, can be eliminated by adding a small step, and the reliability is significantly improved compared to the conventional device. Has a soothing effect
第1図は従来の座標読取装置の静電誘導を示した説明図
、第2図は静電誘導による走査波形図、第3図は通常の
疋有敦形図、小4図(α) 、 (b)は従来の検出信
−号のビーク判定フローチャート図、第5図は座標読取
装置の構成図、第6図(α)の)は不発明の一実施例を
示すビーク刊5Eフローチャート図である。
1゜。タプレツl−2゜、絶縁基板
2α、。カバー 3x、3y、。走査回路
4゜。座標指示器 5.。コイル6゜。励研回路
7゜。瑠幅p波回路8・・A 、/ D変換器 9
0.演算制御部1\1.インタフェース回路
以上
出願人 株式会社第二鞘工舎
第1(21
第2図
第3F
第4−口(副 第4層(1,)第6問(a)
第6図(1,)Fig. 1 is an explanatory diagram showing electrostatic induction in a conventional coordinate reading device, Fig. 2 is a scanning waveform diagram due to electrostatic induction, Fig. 3 is a normal Atsushita diagram, and Fig. 4 (α). (b) is a conventional beak judgment flowchart of a detection signal, FIG. 5 is a configuration diagram of a coordinate reading device, and FIG. 6(α) is a beak publication 5E flowchart showing an embodiment of the invention be. 1°. Taplet l-2°, insulating substrate 2α,. Cover 3x, 3y. scanning circuit
4°. Coordinate indicator 5. . Coil 6°. Exciting circuit
7°. Ruiba p-wave circuit 8...A,/D converter 9
0. Arithmetic control unit 1\1. Interface circuit and above Applicant Daini Sayakosha Co., Ltd. No. 1 (21 Fig. 2 Fig. 3F No. 4-Exit (sub) Layer 4 (1,) Question 6 (a) Fig. 6 (1,)
Claims (1)
、このタブレットに対し座CN k指示するためのコイ
ルを有する座標指示器と、前記コイルに交番磁界を発生
させる励磁回路と、前記センス線に発生する誘導信号を
順次走査して検出する走査検出回路と、この検出信号に
より前記座標指示器の位置を演算する演算制御部とから
ムる座標読取装置において、前記演算制御部により検出
信号と、+iil記タブレットと座標指示器及びそ2″
Lをもつ人の手との間に存在する浮遊容量による雑音信
号とを比較減算し、一定値以上の信号を検出信号とし、
雑音信号と区別しながら座標読取Vを行なうようにした
ことを特徴とする淫標読取装置。A tablet comprising a large number of sense wires laid at regular intervals; a coordinate indicator having a coil for instructing the tablet to a position CN k; an excitation circuit for generating an alternating magnetic field in the coil; In a coordinate reading device comprising a scanning detection circuit that sequentially scans and detects generated guidance signals, and an arithmetic control section that calculates the position of the coordinate indicator based on the detection signal, the arithmetic control section detects the detection signal; +iii Tablet and coordinate indicator and part 2''
Compare and subtract the noise signal due to the stray capacitance that exists between the hand of the person holding L, and use the signal above a certain value as the detection signal,
An indecent mark reading device characterized in that coordinate reading V is performed while distinguishing it from noise signals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57215267A JPS59105183A (en) | 1982-12-07 | 1982-12-07 | Coordinate reading device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57215267A JPS59105183A (en) | 1982-12-07 | 1982-12-07 | Coordinate reading device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59105183A true JPS59105183A (en) | 1984-06-18 |
JPH0125091B2 JPH0125091B2 (en) | 1989-05-16 |
Family
ID=16669473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57215267A Granted JPS59105183A (en) | 1982-12-07 | 1982-12-07 | Coordinate reading device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59105183A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6151538U (en) * | 1984-09-10 | 1986-04-07 | ||
JPS61110225A (en) * | 1984-11-05 | 1986-05-28 | Oki Electric Ind Co Ltd | Coordinate inputting device |
-
1982
- 1982-12-07 JP JP57215267A patent/JPS59105183A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6151538U (en) * | 1984-09-10 | 1986-04-07 | ||
JPH0132131Y2 (en) * | 1984-09-10 | 1989-10-02 | ||
JPS61110225A (en) * | 1984-11-05 | 1986-05-28 | Oki Electric Ind Co Ltd | Coordinate inputting device |
JPH0315204B2 (en) * | 1984-11-05 | 1991-02-28 | Oki Denki Kogyo Kk |
Also Published As
Publication number | Publication date |
---|---|
JPH0125091B2 (en) | 1989-05-16 |
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