JPS59101069A - Data memory - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

BACKGROUND OF THE INVENTION This invention relates to rotating disk data storage devices.More specifically, the invention relates to rotating disk data storage devices having greatly expanded storage capacity and The D3L relates to improvements in rotating disk data storage technology that have enabled the use of small, compact and low cost data storage devices.

Small rotationally rigid disk drives are known in the prior art. The assignee of this invention is a high-volume, high-volume,
We took the lead in developing a low-cost 8-inch rigid disk drive system. Such drives have been very successful. Its various features are disclosed in the following commonly assigned United States patent application with this invention: September 1980.
Continuation 1806/190°19E3, filed on September 24, 1981, and currently having United States 1ηiiT number 4°396.959; serial number 06/304,209, filed September 21, 1981, and September 278k, 1982;
ZiJ [Sareta 06//l 24, 91/I].

While Assignee's 8-inch Rigid ('J') product line of disk drives has been very well received, it offers very high data storage capacity, very small physical package, reliable J3 and low cost. Combined features and features that Assignee has determined will be incorporated into the 8-inch rigid disk drive product line or competitive products.
5.2 not readily apparent from the elements used in the
A need arose for a 5 inch rigid f'isk drive product.

SUMMARY OF THE INVENTION A general object of the invention is to provide a small rotationally rigid disk data storage device with data storage capacity not previously achieved in similarly sized devices.

Another object of the invention is to provide a fully digitally controlled transducer position servo system for low rotational stiffness disk data storage devices.

It is an object of the present invention to provide a small rotationally rigid detask data storage device that compensates for (1't) variations in photodetector characteristics.
The purpose of the present invention is to provide an optical encoder for data track boundary sensing, which utilizes the digital automatic publication 11] control 211 of the light source.

Another object of the invention is to provide a digital control means for a brushless, electronically commutated direct drive disc motor.

Furthermore, another object of the present invention is to provide a parallel digital process for electronic commutation of a brushless direct-coupled drive disk motor 1N! Multiple digital programs are installed for J alignment control, data trans decoder υ rotary hook duator position control, and digital compensation for J3 and track boundary optical encoders.
It is to pull.

Another object of this invention is to provide an improved and highly miniaturized rotary actuator assembly that includes thermal isolation from drive body #I features.

Yet another object of the invention is to provide an improved and simplified optical encoder assembly that is easily installed and arranged.

Additionally, other objects of the present invention include adjusting and recording electromechanical components in a stowed and open state, supporting electrical components, and improving
It is an object of the present invention to provide an improved one-piece casting for a drive device for providing fish (with their phase H-bonds J3 and heat loss).

Yet another object of the invention is to provide a disk drive including an improved rotary actuator arm.

Yet another object of the present invention is that the data transfer phase is carried out through the window in the cover of the base casting.
This display provides an indication of the rack position.
Is Rukoto.

Yet another object of the present invention is to be easily assembled and suitable for D-bottle-like operation, and to have lower speed than previously known. It is an object of the present invention to provide a small and highly miniaturized rotating disk data storage device that achieves a storage capacity of 1.

These objects, advantages and features of this invention are attached hereto.
A more complete understanding may be obtained from a consideration of the preferred embodiments of the invention presented in conjunction with the drawings presented below.
And it will be appreciated.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A disk drive system 20 incorporating principles of the present invention is shown structurally in FIGS. 1-5 and electrically shown in FIGS. 16-13. It is shown in The structural components of the drive device 20 will be described first, followed by the electrical components J and their interconnection and operation.

Disk drive 20 is an improved system that utilizes a rigid rotating disk data storage medium and a data lance detour that floats in close proximity to the surface data storage area of a large portion of the disk, often referred to as winch single star technology. The drive unit 2 includes a data storage system
0 has a very high data storage capacity reaching 40 million bytes, [1] e311 figure gart a 5so
Ciates' SA 400 series floppy chip drive has the same dimensions as a standard V 5.25-inch mini-70 disk drive, e.g., 3.3 inches wide. This system 20 provides four 5.25-inch rigid data storage disks in a small, compact chair that is 5.9 inches long and 8.5 inches deep. While the market for 5,25 rigid disk drives is supplied with J3, the principles of this invention are the same for systems using larger or smaller storage disks and larger or fewer disks. Although this system 2o is used with one storage disk, the actual economy of storage capacity R'!
2.3 and 4 disc formats are given.

The system 20 includes a periodic open-loop servo system that includes an optical encoder that outputs two quadrature signals that provide centerline on-line sector bursts that inscribe track boundary information and track centerline information. use. The general servo principle used in System 2o is 'Assignee's U.S. patent application Ser.
8, J5 is taught, and that information is further referred to.

Structural Description Referring to FIGS. 1-5, the drive system 20 is formed on a cast aluminum U-body 21 that mounts and overlays all other electromechanical components. The base body 21 has two notches 22 that define a semi-cylindrical disk area 23 and a rotary axis area 23.
It is divided into a.

A cutout 22 is provided for automatic operation of the system 20 and for automatic operation of the system 20 (binary J-).

The substrate 21 is shock-mounted to the user's equipment by means of a 3-phase brushless (electronically commutated) The DC motor 24 is installed in the medium heat section 1 of the disc area 23 of the base plate 21.

Tanabata 24 is a memory j゛Isk 6a, 26+), 26C
and 26d (FIG. 3) directly connect and drive the disk hubs 25 mounted in parallel in an equally spaced IO arrangement. In order to have a data storage capacity equal to that of a drive without a single sector, but with 41 small sectors,
The motor 24 rotates the disk 26 at a constant speed, for example at a counterclockwise angular velocity of 5) 8 revolutions per second.

The rotary actuator assembly 23a rotates the transfer assembly 28 through a generally right-angled recess.
7 components. Acqueuator assembly 27
The components are two arc-shaped bars vA stone 31 ilj and 3
2 includes a magnetic field return base plate 1-30 made of steel to which is glued. Magnets 31J5 and 32 are suitable ferroceramic and have a normal N-8 pole with a culm J relative to the plane of plate 30, as indicated by "N" and S" in FIG. The magnetic field is reversed at the midpoint of each magnet, as indicated by the "N" J3J: and II SIT labels in FIG.

The cylindrical support 33 of the sample casting 21 extends upward in the akubu unit tower 23a. Pillar 33
The shaft hole 34 has a cylindrical shape.

Two bearing assemblies 35 and 36 (well, hole 3
4 are lined up and sealed on the vertical axis. They are separated and sealed from each other by slides 37, while springs 381 align them properly.

The moving member of actuator 27 is a generally bowtie-shaped O-piece 40. Chiyo tie-shaped [1
-Yu 40 is two trapezoidal field coils 4 facing each other.
Contains 1 and 42. Each coil is made of, for example, 1500 27 gauge insulated 01 wire. The coil 41 and 4.2 are made of a suitable plastic 4fiJ selected for electrical insulation and thermal conduction.
Completely encapsulated within the fat molding material. metal hub 4
3 OJ: Bishito) 1 to 44 is coil 41J3Jζ and 4
2 to form the rotor 40. 4/C
Connector cable 45 connects coils 41d3 and 42 to external plug 7! Electrical route to I6! I can do it.

The top plate 47 seals the rotor/'IO within the rotor assembly 27.

Top plays 1 to 47 are shown in Figure 1 J, ';
The top bar magnet 4 includes two arc-shaped bar magnets 48/I9 that are aligned with the magnetic field as shown in the figure.
8 J5 and 49 are arranged directly above the lower magnets 31 and 32, respectively. The top plate 47 also connects the mechanical actuator 1 to the base casting 21, while also connecting the top plate 47 to the mechanical actuator 1, as briefly explained below.
and a Z-shaped section 5 that provides thermal insulation 4 to the bottom play 1-30.
Contains o.

A rotor 40 resides in the gap between the pairs of magnets. Its shaft 44 extends through bearings 35J3 and 36. The shoulders of Shireff 1-44-t are
In cooperation with the washer and screw, the rotor is locked into the bearing and maintains a precise alignment of the rotor with respect to the magnet.

One aspect of the invention is to provide uniform thermal insulation of the top plate 47J5 and bottom plate 3o visible to the base casting 21. Ferromagnetic plates 1-30 and 47 (made from low carbon steel) have a modest coefficient of expansion compared to cast aluminum substrates.

To overcome the problems of warpage and distortion caused by the different thermal expansion of the plate relative to the substrate, the plate 3
o and 47 are fixed to the 31 body 21 and identified with each other at the ends of the other 7 parts 5o. Thus, the bottom plates 1-3o are connected to the base molding 21 by two screws 51, and the top plates 1-47 are connected to the base molding 21 at the same end as the bottom plate 3° by two screws 52. 21.

The plates 30 and 47 are joined together at the other end by two spacers 5:3 and two long screws 54.

The plate is able to move the plate rate 30,47J:t and the base casting 2 without causing lateral stresses or changes in the critical alignment of the rotary actuator 7 assembly 27.
1. Only by the 7-shaped portion 50 which adjusts for the difference in thermal expansion between 1. At the other end, it is connected to the base structure 21. A gap of 1/20.000 inch exists between the lower plate 1-30 and the lower plate 1-30 and the lower plate 1-30 of the actuator area 23 of the base casting 21. This gap (!, in the area of the screw 51 is provided with a light shoulder on the floor). , ensuring that thermal isolation is achieved by the rotor assembly. It also eliminates the need for the actuator well area 23 to be machined.

Five data transducer arms 60a.

60b, 60c, 60d and 60e are 43.1
It is mounted on the 1''-tahab 44 in a straight line on an axis perpendicular to the fl, and in parallel planes spaced apart.

Arm 60 is separated by three counterbalances 61a, 61b and 61c and by school arm 62. The counterbalance bolt 61 balances the transducer reassembly 2B so that a pure torque is generated by the rotor 40 and the bearings 35 and ζ36 are loaded flat and uniformly, thereby ensuring that the flat slots 1- Expand the problem and minimize the u8 tendency.

The arm 60 has eight floating head read/write devices 63a, 63b, 63c.

63 (1,63e, 63f, 63111 and 63
1) (Transducer 63e is not shown in FIG. 3 and is obscured by scale arm 62). The read/load transducers 63 are directed against their respective storage surfaces by beam springs 64. The force exerted by each spring 64 depends on the aerodynamic characteristics of each transducer 63. , which floats over the disc surface and comes into actual contact with it in the internal landing area 65.The arm 60, the counterbalance arm 61
The transfer assembly 28 formed by J5 and scale arm 62 is typically directed to the landing area by a tension spring (not shown). An internal stop 66 limits the action of the transfer assembly onto the disk hub 25, and an external stop 67 limits action therefrom. Middle J stanchions 66J3 and 67 include resilient bumpers that are contacted by the lowermost 1-Lance Dieu support arm 60e.

The optical encoder assembly 70 includes a cylindrical vertical column 7
Attachment men 1 to 1 are attached to base casting 21. The clamp 72 around the grooved cylindrical base portion 73 holds the encoder 70 on the post 71. The base portion 73 has an inner cylindrical chamber deeper than the vertical post 71. and apply a vertical gap 74 to the vertical alignment of the encoder. Rotational alignment of the encoder is accomplished by rotating the encoder 70 around the post 71 with the clamp 72 removed.

T:),'y In manufacturing the axle 20, the encoder 70 is assembled and then mounted on the column 71. The clamp 72 is then firmly tightened, and the encoder 7o and column 71 assembly are then attached to the base molding 21, and the
is an optical encoder 7o held in proper rotational alignment.
It is also attached to the base of the base casting. encoder 7o
Realignment should be required at the time of final inspection or maintenance;
This can be easily accomplished without removing the clamp 72, by adjusting the pT of the encoder 7o, and by tightening the clamp 72 to N1. Opening of the clamp 72 is thus considered to facilitate vertical and horizontal rotational alignment of the encoder assembly 70.

”--encoder assembly 70 is shown in FIGS. 58-5Q.
The figure shows the detailed fence. The assembly 70 is
It includes a top member 8o and a bottom moon 81. The top part vj80 is a light emitting diode 82 ; j3 J:
A lens 82a is housed to focus the energy photons radiated toward the low E1 member 81 onto the U-1 plane.

The top member 80, shown at d3 in FIGS. 5a and 5b, includes a generally cylindrical body 83 and a bottom portion 4.
It has a rear wall 84 that moves two bottle-shaped protrusions 85 that are paired with aligned four portions 86 on the rear wall portion 87 of Δ81. Two grooves 38 are formed on the back surface of the rear wall 84J5 and the rear wall 87. Groove 88 includes electrical leads from rear walls 84J3 and LE 82 below 87;
They are lined up.

Top member 80 ti, J: HfLBF581NI
81 I3, formed by molded thermoplastic injection, and they are attached to the bottle 85 and the mating thrower 1.
-86 and adjacent thereto and are bonded together at a common contact area by a suitable adhesive.

As shown in Figures 5C and 5d, the bottom moon 81 includes eight lower shelves.

It also has a somewhat orthogonally shaped upper surface 90 on the shelf 89. Surface 90 includes a central right-angled recess 91J3 and raised peripheral sections 92 located generally at the corners of surface 90.

The fourth section 91 includes an integrated photodetector array 9, as shown enlarged in the top plan view of Figure 5f.
Hold 3, then -C alignment.

Array 93 includes three photodiodes: a 1F1 diode, a P2 diode, and an 'r RKO diode. The Pl, 1 and P2 diodes are longitudinally adjacent to each other, and a smaller 1''RKO diode is inserted between the Pl and P2 diodes.

A lower shelf 8 formed in the lower member 81 holds a small four-land printed circuit connection board 94. Thin wires 95 are coupled between connection pads on array 93 and lands on printed circuit board 94 . 4
/C cable (not shown) connects (14) from array 93.
A circuit board 9 to provide a structurally low electrical connection.
Connected to 4. The array 93 and the circuit boards 1 to 94 are adhered to the recesses 9'1 and 8 shelves, respectively, in the lower part 81.

Focal point VX (mask) 96 is mounted in line on array 93 by gluing its corners to the four raised sections 92 of 9o. The focus plate 96 is shown at 45 in FIG. 5e.
It is made from a thin sheet of glass deposited with an opaque film of silver, which is shown greatly enlarged. The membrane of the reticle 96 has three silks 1710, for example two phases 97 and 98 of 10 parallel openings (
]1 and P2 diodes, and a single aperture 9 corresponds to the T RKO diode.

A scale 100 made of thin temporary glass on which fine lines 101 of silver radiation are deposited is glued to the scale 7-me 62.

The scale 100 passes through a horizontal slot into an encoder 7o formed between its upper 80 J3 and lower 81 members, and the encoder 70 is configured to generate a quadrature output signal. , opening silk 97 is 90'
The fine line 101, except that it is phase shifted by
is oriented such that it is optically positioned at the set 97 and 98 of the 17f1 apertures of the reticle 96.

The opaque area 102 on the scale is aligned with the aperture for the T RKO diode. Except when the scale 100 is at its left limit -F and the opaque region 102 closes the aperture 99 - (, the light rays from the light emitting diodes 82 are at the T RK on the array 93
0 diode, thereby causing transducer 63 to reach the radially outermost data track, indicated as ``P1''.

The groove 103 has a cylindrical portion 73 [square-shaped J
R, and the encoder 7o can be clamped onto the shaft 71 by the clamp 72, as already explained.

The main printed circuit board 105 is mounted on the outside of the base molding 21 as shown in FIG.

The circuit board mounts and couples electronic components, including two microplanes, as described below. Some components, such as monolithic power drive array 106, require effective heat dissipation for proper operation. In order to regulate effective heat transfer to the base structure, the partial heat sink 107 is provided with screws 109 that engage threads in the shoulder 108.
It is attached to the shoulder 108 of the base casting.

The small print 1 to the circuit interconnection base 110 are connected to the head 1
Herans de user 63, optical encoder 70 and J: "ils 41 and 42 of the bow tie-shaped rotor 40,
For example, a series of connecting pins (not shown) are provided which are coupled to a plug, such as plug 46. A small bracket 111 is attached to the substrate 110. The connection land 113 at the bottom of the substrate 110 is connected to the base casting 2.
The bracket 111 is attached to the base rust structure 21 with screws (not shown) so as to pass through a groove 114 formed in the bracket 1 . Land 113 receives a connector attached to main printed circuit board 105 at the bottom of casting 2'1. The connector is installed at a location determined by the insertion area 115 of the base molding 21. A resilient gasket (shown) between the bracket (h 111 J') and the base casting 21 provides a hermetic seal in the groove 114.

13Th aluminum cover 116 covers disc 26
and Transdue! -63 is very clear fj': na(
The top of the disk system 20 is sealed so that it can operate in the absence of particles. A resilient force socket 117 is positioned between and seals between the cover 116 and the outer lip of the base molding 21.

Air handling (not shown) changes the atmospheric pressure in a sealed space to the surrounding state. An air filter (not shown) removes contaminant particles from the airflow generated by the centrifugal force of the rotating disk.

A clean plastic circular window 118 directly above the rotary actuator assembly allows visual inspection of disk rotation and actuator movement. The adjustment column on the window 118 has a rack scale 119 and a rack scale 119 of 1 on the top 1 Herans duuser arm 60a, so that the data 1 to 1 can be adjusted so that the 1 to rack selection operation can be disked by the user. Provides a relative indication of rack position.

ELECTRICAL QJ,T, COMPONENT SUMMARY (FIG. 6) Referring to FIG. , an actuator control digital controller 121, an interface circuit 122, and a read/write circuit 123. These subsystems receive command information from the Nina interface 124 and control the motors 24 .
Optical encoder 70J3 and data transducer → J
-63dIJs+, and calculates control data for digitally operating the motor 24 via the motor drive circuit 126 and the rotary actuator 27 via the actuator drive circuit 127;
Move the transfer assembly 28 to 1-transfer from the rack to the truck.

- move the transducers away and maintain the transdules within the boundaries of each selected data track.

The optical encoder 7o is digitally balanced and compensated by the processor 121 together with the LED driver circuit 128.

The motor control digital processor 120 is described in connection with FIGS. 7 and 8, and the motor control digital processor 121 is described with reference to FIGS. 9, 10 and 11; - interface circuit 122 is described with respect to FIG. 12; and read/write circuit 123 is described with respect to FIG. Each will be explained in turn.

Motor Control Digital Processor" 120 (FIGS. 7 and 8) The motor control digital processor is preferably a programmed digital microprocessor 131, such as a type 8o48 manufactured by Intel Corporation of Sunta Clara, California. including.

Block 131 contains internal read-only program memory containing microcode written to execute flowcharts 1 through 1 depicted in FIG. 8 and described below. Processor 131 also includes internal configuration registers and three 8-bin 1 to parallel manpower/output f-tabo-1.

The crystal 132 connected to the block 4 no. 131 is connected to the block 1
'' (used to generate one pulse of 4 M l-1z glue to sensor 131). The seven A-bit data inputs are provided to the processor 131 via one of the input/output vehicles-1, such as, for example, the board 1-1. 4 bits are connected to the sensors in the brushless DC motor 24, namely the electro-optic index sensor 133 and the three Hall effect 1 to lance ducers 134, 135.
There are C from J3 and 136. Hall transdecoder is used in processor-1 to achieve electronic rectification.
31 to provide phase information to the field winding of the motor 24 ()
This makes it possible to switch the drive flow.

The small Δ, B, and C signals from sensors 134, 135, and 136 are responsive to the phase of the three-phase motor. For example, they are 30°-1 and the drive hub 2
Every time 5 rotates 30 degrees, the 1-transducer changes data state. This change in state is read out by the processor 31 and outputs the three-phase binary drive signals φA, φ13a3 and φC on a second boat 1-, such as boat 2. 40' to properly drive the motor 24 for the next 30 degrees of rotation. I"ru.

Motor processor 131 also includes a write enable signal on line 137, a write current signal on line 138, and a drive select signal on line 139 from interface circuit 122. Receive binary input.

In addition to the φA-C signals, processor 131 also provides seven single pin control signals, namely lines 140.
ig error signal via line 141, interrupt control signal via line 141, speed side j2 signal via line 142, line 14
3, a non-pull signal via line 430, a selection signal via line 431, and a non-pull signal via line J3 and /I32.

Processor 131 also outputs an 8-pin to 7-bit speed control data word to a digital-to-analog converter (+) AC>144 via bauds 1-3, for example. The word is converted to a voltage. The voltage is applied to the positive input of an arithmetic amplifier 145, formed as a transconductance amplifier.

Motor 24 includes three internal stationary windings A, B and C in "Y" connections. The common coupling point is coupled to the power supply, eg +12pol1~ DC. Three Darlington combined N P N power switches 146,14
7 and 148 have oven collectors coupled to windings A, B and C, respectively. The switches are each Tights King IP100 Darling amplifiers manufactured by Textile Instruments or equivalent. Switch 146, 147J3J, bi1/
While I8 is briefly depicted in Figure 7 as a single transistor, in reality a Darlington-coupled power amplifier is preferred due to the required amplification element. This is the place to be understood.Gurin 1-
The emitter of the switch 146, 147 and 148 is
commonly connected to ground via a reference sensing resistor 149;
Complete the electrical paths for windings A, 13J3 and C of motor 24.

The processor 131 connects the processors 146.1 to 146.1 through three series resistors 152, 153 and 154.
Three-phase rectified signals φΔ, φB and φC are outputted via three lines 14, 9, 150 and 151 respectively /Z-coupled to the bases of 47 and 148.

The three resistors 155+ 156 and 157 are connected to amplifier 1
45 outputs. These three resistors are connected to Darlington switches 146, 147 and 14 respectively.
Connected to the base of 8. The actual current flowing through windings A, BJ3 and C is determined by the three control switches 1 to 1.
46.1/17 J3 and 148 are modulated by the current in J5 and the shape of the rectified signals φΔ, φB and φC. These three control currents, in turn,
152, 155, 153, 156, 154
is determined by the current flowing through the three series resistor networks formed by and 157.

The negative input to amplifier 145 is connected through resistor 158 to sense resistor 1/I9, the common emitter junction. The actual motor voltage across sense resistor 1/19 is thus provided to resill amplifier 145. DAC1
The speed correction voltage from 44 (digitally calculated by block 131) is also provided to amplifier 1/I5. A correction current flows to the output of amplifier 145 whenever the actual motor voltage and correction voltage are unresponsive.

This current is added to or subtracted from the current provided to the bases of Darlington switches 146, 147 and 148, depending on whether the motor is rotating too fast or too slow. In this manner, digitally modulating the drive current in the sensor 131 provides improved motor speed control for brushless DC motors.

A feedback capacitor 15 constitutes an amplifier 145 as an integrator to stabilize the motor speed control servo lube. Also, Darlington switch 146
．． The three bypass capacitors 100.161J and 162 coupled to the bases of 147 and 148 effectively slow down its switching speed and further stabilize the motor control, which would otherwise occur from sharp switching transition points. It would be desirable to reduce the noise.

Motor processor control program (Figs. 8a, 8b, and 8C) The operation of the digital motor speed
A, FIG. 8B, and FIG. 8C) [1-chart diagram P4]" is further refined.

The first routine is START 170. )", the processor 131 clears all of its registers in the initialization step 171t 45b. Then, at logic node 172, the "power supply (J5
Test the possibility of using 2V DC. If 12V is not available, it loops back to Star 1 Hertzin Settings 171 and continues the loop until the correct voltage is available at the Power Supply.

When 12V is present, determine whether the motor 24 is rotating or not using the logic 1
Go to 111 points 173. If it does not, the routine proceeds to step 174 where a high current, e.g. 4 amps, is applied to motor 24 for e.g. 1 second. Another logic node 175 tests the rotation of motor 24. do.

If it is still moving, the drive current is 1
The counter of block 1 131 is incremented at step 176.Logic node 1
77 is the counter! Determine if you have gone down to Kotoe (count up to O from the current number such as ,1''5). If it has not, the routine returns to step 174 and steps 174,17
5,176J5 and 177 are tried repeatedly five times.

If the motor is still not rotating after five attempts, then logic node 177 stops device 20;
Step 17: Inform the upper interface of the malfunction
Proceed to step 8.

If, in either step 173 or 175, it is determined that the motor 24 is rotating, then the start routine starts, e.g.
．． Proceed to step 179 where 5 amperes are applied and the rotation is accelerated to the operating angular velocity within a correspondingly short period of time. Motor 2/
Whether I has reached its speed is tested at logic node 180. If it has not been reached, the routine repeats 3 steps for 2 seconds in step 181.
Give the amperage, and the argument! I! Test motor speed at node '182. If motor 24 has not reached operating speed J:, the routine continues at step 18.
At step 3, apply 2.5 amps for 25 seconds (ffi person) and jump to the main routine at jump slap 184. J3 tested at node 180: If the motor reaches speed, then
The routine jumps directly to jump step 184. This completes the start routine 170.

Main loop 190 is depicted in Figure 8b. 1st
The steps are 1-Lance Dury-134°135
The purpose is to read holes A, I3 and J: and C from iJ3 and 13G, and store the read values in internal registers of processor 131 in step 191. Logic node 192 compares the current read value to the stored value to determine if the Hall signal has changed.

If they had changed, then the pro 9131
φA controls Darlington switches 146, 147 and 148 in process step 193.

The 71-lix state of the output horn signals of φB and φC is changed.

Motor processor 131 also monitors the status of the input lines, including write current, write enable, and drive PII selection to determine if a write condition exists. This test 1~ sets the state of the output write error line, which is explained in detail below.

If the Hall signal is not changing 41 in test 192 and subsequent step 193, the processor 131 enters the predetermined interval by counting the time interval d3t in step 194 and then returns to step 194 in the main loop. 1, loops back to step 191. Processor 13-1 remains in the main loop until interrupted by an index signal from index sensor 133. So, immediately, P[1t? The tree jumps to interrupt routine 200.

Interrupt routine 200 is shown in Figure 8c. First, the processor outputs an interrupt protection signal via the output line 141 at step 201 J5. This step interrupts the accu-data control processor 121;
Also, to ensure that the Leevo sector is not overwritten, any write operations are inhibited in the read/write circuit 122.

The processor 131 has writable lines 137 J>, J
: Exclusive OR test 1- on write current line 138 to perform a check on the data write function at node 204. C) All times 11L line 137 is a line from the user interface chair via input/output circuit 122, and write current line 138 is from read/@write circuit 1.
23 is the line from the write amplifier J'3&j. Both lines are enabled or disabled (logically high or low) at the same time. If not,
An error condition exists and the write error flag is set to step 2.
05, is set in a register at z13, and output on line 140 at routine step 206.

If there is no write error, as determined at node 204 at 43, the interrupt routine proceeds to logic node 207 which tests whether the write error refrag register has been cleared. If so, the processor outputs the t-10 signal in step 20.8.

The interrupt routine proceeds to its sliding door speed check node 209. If motor 21 is not at speed as tested in step 209, processor 131 transmits an underspeed flag via line 142 in step 210.

The routine then proceeds to process step 21'1,
Digital filter algorithm, Y (k) = 0.
996mu(k-1)-1111(k) +V
(k −1>wiff' n shi, kokote Y (k)
C is the digital motor speed correction value output to DAc1/I/I, mu(k-1> is the previous error signal, n group(1() is the current error signal,
Then V(k-1) is the previous motor speed correction value output.

This algorithm yields a sum of poles J5 and zero that maintains the desired roof speed with appropriate damping. The calculated value is then sent to step 212
is output.

The interrupt routine then interrupts line 1 in step 213.
By changing the logic state of 41, the FIII-included protection is set to full protection, and in step 214, J3 is connected to line 1.
43 to output a uri-in-index signal.

The interrupt routine then returns 35 to the main loop at step 215.

Actuator control digital block 1” mouth υ121 (9th
10 and 11) A more detailed diagram of the circuit of the actuator control digital processor 121 is shown in the circuit diagram in FIG. 9, the waveform diagram in FIG. 10, and the control routine routine 1 in FIG. 11. It is depicted in ~.

5-tater control block 1 with a clock frequency of 4 MHz Scissor 1
It is theoretically possible to use 20 iiJ rtl: t,
t- On the other hand, the 6805R2 Mic 1'' processor is
It was determined that the most reliable operation would be with its own crystal 220 setting the clock frequency to 4Ml-1z.

Pl, P2 and TRKO diodes of phototube array 93 are connected to three operational amplifiers 221, 222 and 223. Three equal resistance resistors 224 are connected from the outputs of operational amplifiers 221, 222J5 and 223 to establish a very high gain element for each IZ. Three =1 densifiers 225 are bridge-coupled with resistors 224 and ? Stabilize and supplement the llLi0 amplifier.

Amplifiers 221, 222 and 223, resistor 22/I and capacitor 225 are preferably mounted on mutually coupled circuit board 110. Rilli 121
is connected to a circuit trace on the main printed circuit board 115 that leads No-ΔN2 to the triplicated analog input of . These inputs can be connected sequentially within the block 121 to internal analog-to-digital converters.

The other analog input to the pro-top tree 121, included in the analog input AN3, receives the rotations ffm 42 from the read-m input circuit 123 which provides sequential ΔJ3 and B servo sector bursts read from the nervo sector on each rotation.
This is a signal input via /I. A, J: and B berth 1- are determined by determining the centerline A fret[~ and in order to correct the correction value t1, their respective amplitude peaks are
? This is a sine wave compared by tree 121.

A.
30 is processed as J:. Two resistors 232 Onibi 2
33 forms a voltage dividing network that can supply a reference voltage to the comparator 231. Resistance 23/1 (Yo, capacitor 1)
~235 to form a charging network in series. capacitor 2
35 t;J: , charged to the peak of each parse 1 to Δ, 13 and B. The oven collector NAND gate 236 draws the capacitor from the binary data port of the processor 121 so that the processor 121 energizes the capacitor before being charged to the peak of each Δ or BFj-hoverst. Connected to J-235.

Other data inputs to the actuator control processor 121 are the motor control processor 120 on line 141.
It includes an interrupt pulse sent from the servo sector 121 to notify the actuator processor 121 of the start of the servo sector. The other input is connected to motor processor 12 via line 142.
0 and the actuator processor 1. i 12
This is the speed attainment control signal connected to the reset 1~ input of 1. If the speed arrival signal becomes false, the actuator 1-table reset 121 is reset 1~ and the reset 1-table reset 121 is
Beginning routine 301, which is described below.

The stepping pulses from the user interface 124, /J) are sent to the CC 10 and the tree 12 via the line 240.
1 is input. The direction of the stepping pulse is determined by a D-flip-flop which latches the received first snow-rubbing pulse representing the direction and sends its sign over line 242 to the Pu 241
determined by The drive selection signal from the interface is input onto the line 243, and is clocked by the stepping pulse.
Activate.

The drive selection signal also controls the three oven rectors.
I) Activate 245,246J to data 1 and 2/I7. Gate 245 sends a seek completion signal to the user interface when drive selection is true and latch 244 is loaded. Optical encoder 7
J determined by 0: uni, whenever the transducer is placed above 1~luck zero, gu 1
to 246 is true. Goo 1-247 provides a ``Pr Ready'' signal to the user interface whenever the drive selection is true and the BUI ``SERRA'' J 121 is not detecting ``GOO''.

The drive system 20 simply seeks from the interface or IM: tj.
7/ Display that it is possible to receive a write command.

Pro Upper 121 is the actuator--9 drive circuit 12
7 a5, J: HILE I), drive circuit 128
Outputs 1 word of data to 1-. The niter drive circuit 127 returns zero J in 256 steps (28 steps).
3J: and a reference current. The current is converted to a voltage in an operational amplifier 252, its gain is set by a resistor 253, and its stability is established by a capacitor 254. coil 41
and 42.

One suitable drive circuit is depicted in FIG. 6 and described in U.S. patent application Ser. Explained.Referenced!:!llll!!Characteristics of the rib circuit are such that no current flows through the rotor coils when the transducer is aligned with the selected 1-rack centerline. This means that the rotary actuator 27
greatly reduces the need for heat extinguishing.

The LED drive circuit 128 meets the 8 pin 1 to digital-to-analog converter 261 which sets the current between the pillow and the reference current in an equal number of steps between 1 and 25G. t
? Current is provided to an operational amplifier 262 preferably located on the interface circuit board 110. Resistor 263 and capacitor 264 set the gain and provide compensation for amplifier 262. The current is amplified by transistor 265 connected to drive LED 82 via current limiting resistor 266 . 1 encoder 70 is described with respect to FIG.

The two interlaced bin sets 271 iJ3 and 272 connect the des1-interlaced junctions E 3 J5 J: and Ell to two diagnostic routines called by the control program (described below). give.

Processor 121 outputs a reduced write current command to read and write circuit 123 via line 281. The μ1 included current is reduced to within half of the data cylinder (1 to rack 256-511).

Actuator Control Program (Figures 11a-11.f) The operation of the actuator control digital program 121 can be further understood by considering the flowcharts set forth in Figures 11a-11.f. Probably. There are six separate routines in the control program for the actuator blower 121. These routines are reset 301, main loop 302, test ζ 303, seek 304, interrupt 305, and step pulse 306.

Referring to FIG. 11a, the initialization and adjustment of processor 121 in the context of system 2o occurs at iJ3 in lot routine 301.

All of the internal registers of the 6805R2 microprocessor 121 are cleared to zero, and power is removed from the actuator drive circuit 127 in step 302. A four second delay occurs in step 303. This delay is The bias spring is activated to return the transfer assembly 28 to the internal g7 stop 66 so that the transducer 1] 63 is on the outermost 1~book J, i.e., on the known star 1~ position inside the track U mouth. Make it as follows.

Two phase signals P1 and P from optical encoder 70
2 is processed electronically by processor '121;
Four quadrature signals (described below and shown in FIG. 10) are generated. Each signal represents a track. At reset 1 to 301 J3, processor-121 orients itself to the appropriate phase. In this way, the processor 121 causes the actuator 27 to
command to move in a known direction, and P 1
iJ3 and 1]2 signals are monitored. once phase 120
, ie, the desired phase is reached, the processor locks on that phase in step 304.

Since the four in-plane phases of the tracker subsystem return sequentially to each other, phase zero is always achieved within the four 1-racks.

The processor 121 then calculates and stores a non-electric horn compensation value for the actuator drive 127 in step 305. Ideally, the actuator drive 127 is configured to drive the selected transducer υ63.
When the rotor coil 41 or 42 is located on the selected center line of 1 to 4, no current is passed through the rotor coil 41 or 42. (
The actual track center is the optical encoder phase (ffi@
(1) The transducer position is digitally adjusted by processor 121 to reach the true track center, rather than the center indicated by 1 or P2. It should be understood that it is used to ) As a practical matter, the transfer bias spring J3 and the slight electrical imbalance are 61 stopped and the actuator drive 1
27 requires the iIJ value to be given.

The processor '121 digitally controls the amplitude of the ED light +1jt82 transmitted through the optical encoder 7o.

The processor commands the drive current output by the LED driver 128. By controlling the LED amplitude, processor-121 can control the diode P of array 93 without the need for electrical trimming required by prior art quadrature encoders.
Digitally compensates for the difference in optical sensitivity of 1 d3 and P2. To provide compensation that eliminates the difference between the two cells, the L, IED output is connected to each diode cell P. The processor 121 must be applied separately to the Pl and P2 diodes. Let the reference value for the output on [v].

10. See all figures M-root, L F-1') -U)
When the digital word sent to A C261 is incremented, L E D 82 C, light 4'A output a t
P I J3J: Outputs more light resulting in a decrease in the voltage level at J P2 and a smaller analog-to-digital value converted and read out in processor 121.

Thus, the "positive" peaks of the 1]1 and P2 waveforms depicted in FIG. represent. The increasing light level drives each photodiode toward ground potential. The automatic gain control system does not attempt to control the peak absolute voltage value, but it does The relative amplitude of the -r-RKO cell is also adjusted to the 10th negative peak.
depicted in the diagram.

The processor 121 directly commands the current flowing through the actuators 1-27 to adjust the selected phase 0.1.2 or 3 on the appropriate linear portion of the selected phase signal in real time.
to be servo controlled. Servo berth 1 to beak A and B
The processor commands J:, and at the same time the actuator aligns the transducer to 1 on the rack centerline, select J/l! Correction 11 to keep the cutuator servo-controlled near the center of the phase signal
C Used to fit the summer. In an improved digital servosysdem, this application is incorporated by reference to its predecessor, United States Patent Application No. 06/304,20.
There is no need to generate an additional phase shift control signal as was required in J3-C.

Processor 121 digitally adjusts encoder 70 as follows. J i.e. one signal e.g. P
2 (which is ideally the midpoint of the positive and negative peaks in the most linear part of the signal), the block length 121 is controlled by the other phase signals, e.g. ]] detects a negative peak value of 1. In practice, the processor 121 microsteps the transducer across the 1-rack until the P1 peak is reached and its amplitude no longer increases. : Command the sea urchin rotary actuator 27. Each beak is
It is counted in the processor 121 and the current child [j
It is compared with the LLD peak value above.

If the actual read peak amplitude for Pl is not equal to the apparent peak value (well, the IED current is
P which is equal to the value of childbirth! 121 (J) then commands a second microstep movement of the actuator 27 through the peak (full wind heard) P1 position; The amplitude of Pl is then read again. This procedure is repeated until a correction value is determined that gives the P1 amplitude equal to the apparent value. The process 306 is then repeated for the P2 amplitude. The correction values for P1 and P2 are stored in internal memory locations of the processor 12 and are recalled whenever 1]1 or 1]2 is selected during system operation.

The trunk zero negative peak amplitude is also read and stored in adjustment step 306. Experience has shown that as the humidity inside drive 20 increases, the light level of LIE l') 82 decreases.

Thus, 1 ~ rack zero diode − r r< +
< The amplitude counted by o is stored in the adjustment step 306 as an apparent reference value. During the drive operation, the processor 121 periodically compares the actual amplitude of the TRKO diode with a reference value. If a drift occurs, then the processor υ 121 recalculates the pre-stored compensation values for Pl and P2 according to the measured drift 1- in the light level.

Processor 12'I then commands actuator 27 to move to track zero in step 307. (In the rack HD, the -1" RKO die A-1 reaches its maximum voltage (minimum current) state as shown at J3 in FIG. 10. When the transformer 21 port is reached, the , the actuator is 1-
Identify a phase zero servo signal from encoder 70 by identifying a phase signal that has a negative slope on the final phase (Pl) as it moves toward the rack U-mouth. 1~
Ratsukupiro is always at phase zero, and the phase exit is always from the heard wind to the T wind.
It is identified as one of the four phases that occur during the transition of the RKO diode (shown on the right side of the phase waveform in Figure 10).

This completes the reset (adjustment) routine 301 and the processor 121 then jumps to step 30.
8, jump to main loop 302.

! Referring to figure 11b, the main loop 3c)2 includes periodic status checks and updates of the calculated values.

Diagnostic jumper E4 is checked at step 312. If the jumper is in that position,
The internal memory 303 (FIG. 1ie) is called. It is explained below. If the jumper is disconnected (pulled), the main loop proceeds to logic node 313 which checks the state of the step pulse flag. If a track step pulse is being received from user interno-ace 124, processor 121: Step 3
At step 14, the stamp pulse counter 1ijj is read. The processor then tests which additional step pulses arrive from interface 124 at logic node 315! II-ru. Mori.

If that's the case, then go back to the main loop. If this is not the case, the program will run in the computer program 31G.

Jump to 4.

If the step pulse flag is not set to 1 (), as tested at logic node 313, the processor reads out either the Pl or P2 phase value at step 317. The processor also performs step 3
-1-RK 04g issue was not issued in 17th. Processor 121 then divides the new position correction value based on the previously determined lc desired position from the AJ3 and B1 nervous sector peaks in step 318. The updated position correction value is sent to step 319.
3 and output to the actuator drive device 127. The main loop then returns to step 312 and repeats the step. Each pass through main loop 3o2 (missed interrupt) requires approximately 200 v microseconds. In this way, the main loop is passed approximately 85 times for each rotation of the disk 2G.

If the E4 test jumper is installed, main loop 302 branches to test routine 303. B0
In the processor 1211J, the logical addition 325 performs a test I~ to determine whether the internal track counter has a value corresponding to 1~rack L entry. If not, a seek to the track U is commanded in step 326 by the processor including a call to seek routine 304 to accomplish it.

Once Trackze L1 is reached, the process will start at 121
An internal diagnostic track counter is incremented by one in step 327. Then the internal diagnostic track car
Kunta is J3 at logic node 328 and is killed.

If the transducer has not yet reached the number corresponding to the innermost data track (1-rack 511), then the ``1'' processor executes step ``32''.
At step 9, the actuator 27 is commanded to seek the number of tracks sent to the cellar 1 in the diagnostic counter. The processor 121 actually calls the seek routine 304 which steps the transducer inward by 11 racks, and then the processor 121 returns the return slap 33.
At 0, the process returns to the main loop 302.

If the diagnostic counter exceeds 511 (if it reaches the number 512), the diagnostic counter (is reset to zero in step 331 a3, and then the block Clgram returns to step 327.

The seek routine 304, number 11 (illustrated in FIG. 1), performs the following operations during periods when the step pulse flag is set and no additional stepping pulses are received:
Whenever there is a path passing through the main loop 302, a step pulse count of 1 is output in step 316.
be sent to If 16 or more stepping pulses are not received, the flow tree enters single track stepping mode at 1111 point 336. The location is about 3! ■
1 node 337 is tested. If destination 1-rack has not yet been reached, Luruno returns to single step node 33G and repeats until the destination track is reached.

If 1Ω is recorded on the track pulse counter, the lζ value is 1.
61, the rotation mode is commanded to the actuator 27 in an acceleration step 338, as tested at node 335. The final velocity is maintained for a predetermined time in step 339, and the deceleration curve stored in the look-up table is followed by the processor 12, which positions the axle on the selected destination track in step 340. .

Once the destination truck is reached, the Akudyu ball = Yu is
Step 342 of monitoring track centerline servo information
set or stabilized at ``SEEK COMPLETE'' is output to the input/output circuit 122 and the input/output circuit 124 at step 3/I3, and a return to the main loop 302 is then made at the input/output circuit 344. .

There are two possible interrupt routines called from main loop 302. The first such interrupt routine is
Interrupt (Narborector) Routine 305 (Figure 11e). This routine 305 is performed if test jumper E
If 3 is connected, it is bypassed. Hello, logic 1
If des1-jumper E3 is connected, as des1-ed at point m 350, the save zone timer expires (set to 111) in step 351.

Also, all the loop assembable A no set values are:
J3 is present at step 352]. Processor 121 is then returned to main loop 302 via return node 353.

Interrupt routine 305 is called by an interrupt signal from motor control processor 131 which is output on line 1/11. This routine [J, thus, is normally called every revolution of the disk 26 when one novo sector is reached by servo 1 through servo l-1 noro 3.

If the F3 interrupt routine bypass jitter is not installed, the zone timer is incremented in step 354. The operation of the zone timer is described in Section 19 previously referenced.
United States Patent RF Application No. 0 ('3/30'I) filed on September 21, 1981.

209, to which reference is made more specifically.

Interrupt routine 30! 5 then sends AJ'3J and 81 sent from the read/write circuit 123 to the processor 121 in step 355.
- Continuously read one shift of the beak to the rack center line 1 novoverse 1 and avoid digitization.

The processor then calculates the value to the new Onosen1 in J5 in step ζ358, and in step 3! U9
The centerline correction lookup table is updated at . This corrected value is used by the main loop 302 in step 318 and the updated value is outputted in step 319. Once the track centerline correction lookup table is corrected, processor 121 jumps to slap 353 and jumps to the main loop.

Other interrupt routines include step pulse routine 306 (
This is Figure 11. This routine 306 is fired on the leading edge of the ¥51 step pulse received by processor 121, and it disables further interrupts, thereby disabling the output. The user 121 multiplies the fast step pulses R1 without being further interrupted by index or other interrupt signals.
- It makes it possible to Thus, when the step pulse routine 306 is called, the first step 3
60 must disable interrupts to the processor 121. The direction of the seek (inside or outside with a plus or minus sign) is saved in step 361. The step pulse flag is returned to the main roof 302 in step 362, and then in the return procedure 363. software of J
tf, complete explanation of the formation.

Input/Output Circuit 122 (FIG. 12) (Comic and Power On Reseller (POI) circuit 4-01 supplies the regulated voltage to system 20 and the POR signal to motor assembly 120. A terminal resistor annoy 402 terminates the line from the user interface 124. An appropriate input cover-to-no circuit 403 terminates the incoming line and resistor j.
7 ray 402.

Signals from human buffer 403 circulate through system 20. The live destination 404 is provided 111 and is required by the user. It operates according to the drive selection signal.

Output control signal buffer 405 J3 and input/output data buffer 406 control signals and OS data between Nina interface 124 and system 20.
Is the insulation required for J1? Offering.

Read/write circuit 123 (Fig.
Seek from the actuator control stage 121 via line 413, such as the speed attainment signal via line 2, the drive selection signal via line 139, and the write signal from the interface to line 412/1. Completion signal and operation i from the actuator control means via line 414
It includes a writable circuit 411 that receives iJ function i', No. 5.

Circuit 411 connects write drive circuit 416 via four wires 137.
It outputs a write enable signal to rJ-. The write drive circuit sends the power-on reseller 1-Nobuyumi from the circuit 40'1 and the write data from the data buffer 406 to f1' on the line 281.
A decrease write current control signal 011 from the actuator control means 121 is received. The write drive capacity 416 is
Two read/write lines 417 d5.output the current logic signal through line 138 and connect to 'δ7' 119 at the head selection time. J: Outputs the data included in p1 to 418-J2).

Head selection circuit/119t, input error/I 0
3 receives data 1 to lance decoder selection data,
And 8 pieces of data (Helance Deli 63a to 6
Select one of 3h.

The data is selected by the head selection circuit 4'19.
C1 ~ Lance D'ney Jinyu 63 (This J is read from the disk 2G. The read data is sent to the line 4-1.
7 and 418 via readout amplifier and filter 42
Sent to 0. The data is roughly compressed in F3 J3 and comparator circuit 421, then passed through circuit I22 and sent to data buffer 40G.

An amplifier 423 recovers servo bursts A and B and sends them onto a peak detector circuit 230 connected to the actuator control means 121 via line /124.

Having now clearly described the preferred embodiments of this invention, it will be appreciated that the objects of this invention are fully achieved, and without departing from the spirit and scope of this invention, It will be understood by those skilled in the art that many variations to the circuit and widely different embodiments and applications are suggested. The disclosure and description herein are purely illustrative and are not subject to any limitation.

[Brief explanation of the drawing]

FIG. 1 is an exploded perspective view of the major mechanical and electrical components of a disk drive incorporating the principles of the present invention. FIG. 2 is a top plan view of the same disk drive shown in FIG. FIG. 3 is an end elevation J3 J: cross-sectional view of the same disk drive taken 1q along line 3--3 of FIG. FIG. 4 is a top plan view of the rotary actuator's "tie" rotor used in the same disk drive. FIGS. Figure 6 is a simplified general block diagram of the same disk drive; FIG. 7 is a detailed block diagram of the motor control digital processor and drive motor used in the same disk drive. 88-8C are flowcharts of the logical steps followed by the motor control digital processor shown in FIG. FIG. 9 is a detailed block diagram of the actuator control digital processor used in the same disk drive. FIG. 10 is a waveform diagram of the signal output by the optical encoder. FIGS. 11a-11f are flow diagrams of the logical steps followed by the actuator-controlled digital browser shown in FIG. FIG. 12 is a detailed block diagram of the input-output circuitry used in the same disk drive. FIG. 13 is a detailed block diagram of the continuation-filling circuit used in the same disk drive system J3. Motors, 26a, 2C3b. 26C, 26d are storage disks, 27 are rotary actuators, 28 are data transducer transfer assembly, 40 are rotors, 41.42 are coils, 60a
, 60b, 60c, 60d, 60e are data transfer 1-9 arms, 63a, 631J. 630.63d, 63e, 63f, 63! 1122 is an interface circuit , 123 indicates the read/pI circuit.
IG, 2 FIG 4 FIG, 5f FIG, l 1e FIG, +2 1020 Live Oak Drive, Sunta Clera, California, United States of America 0 Inventor Brian Jay Nik Non Knox Gate Court, Presenton, California, United States of America 4804 @R Ming Richard C. Simonson 1625 Tangerurado Court, Pleasington, California, United States of America

Claims (1)

Claims: (1) A base, a data storage disk, a motor mounted on the base for rotating the disk, and at least one device for reading data from and writing data to a storage surface of the disk. - a transducer for supporting a data transducer on the storage surface; 1. A data storage device comprising an accu- diator means for moving between tracks and a digitally compensated optical track boundary encoder, the digitally compensated optical track boundary encoder comprising: a light source means mounted on the housing and configured to emit energetic photons;
and a photodetector array including a plurality of photodetectors arranged to receive energy photons from the light source means and convert them into analog electrical values; a translucent school having opaque areas at regular intervals movable between the detector arrays, the photodetector outputting a phase-shifted signal with respect to the photodetector; and 1) the housing square and the frame move relative to each other as the transfer means moves relative to the concrete at 11, and are programmed to include a thick digital converter means; l
ζ digital computer means, and computer means coupled to said analog/digital converter means;
digital-to-analog converter means coupled to the processor means, the photodetector converting the analog-to-digital converter so that the detected analog lightning value is converted into a digital value. said light source means (L1) coupled to said digital-to-analog converter means, said processor means I reads out the detected peak light value from each photodetector in turn, and reads the detected peak light value from each photodetector in turn; Compare the successively detected value with the value of the older brother () of the given name,
The difference is then calculated and outputted to the digital-to-analog converter means so that each photodetector outputs a corrected analog electrical signal.
said processor means having an internal coupling for adjusting the level of said energy photons emitted by said light source means to each photodetector whenever its electrical value is read out to said processor means; One means is further coupled to control movement of said actuator means to provide said peak light value, and each said
The data 1-ra according to the analog electrical values
A data storage device that avoids moving the 1-lance decorner between the data storage devices. (2) The star has a clear area that covers the range of movement relative to the housing, and a base 11t data 1
- one opaque slot 1 at one end overlying the rack;
receive photons from the light source means through the clear region, except when ~ are aligned in a line between them (
) a third photocell in said array arranged such that said processor means periodically transmits the electrical value outputted to said third photocell when not aligned with respect to said opaque spot. read out the positive value of iTJ emitted by said light source means and calculate the positive value of iTJ which is reduced to the drift 1 to J51 energy level, and supply said ijf to adjust said light source means to a predetermined value. The energy level of "Children or 1" - TsunoJru, 1jr
i'l A data storage device according to claim 1. (3) a brushless DC motor including a plurality of non-rotating fields (having a drum coil and an internal non-contact commutation sensor 4);
at least one data storage disk rotated by said motor; a data storage disk for reading data from and writing data thereon on a storage surface of said disk; 1-transducer (1-transducer) for supporting the transducer; and a power actuator for moving the transporting means and positioning the transducer between selected data tracks; , a drive circuit means coupled to switch a drive current between the coils and vary the drive current; and a drive circuit means coupled to the commutator sensor and the drive circuit means, the drive circuit means being coupled to the commutator sensor and the drive circuit means, the drive circuit means being coupled to the commutator sensor and to the drive circuit means, the drive circuit means being coupled to the commutator sensor and the drive circuit means, the drive circuit means being coupled to the commutator sensor and the drive circuit means, the drive circuit means being coupled to switch a drive current between the coils and varying the drive current. A switch command is also executed according to the data, and a programmed digital processor means for outputting the switching command to the drive circuit means to switch the drive current is programmed. The settling means further monitors the motor speed and calculates the IJ jL values and outputs them to the circuit means to adjust the drive current to maintain the motor speed at a constant apparent value. A data storage device coupled to Jζ corresponding to the value of . (4) The driving means includes a plurality of electrical switches each coupled to the 21-il, and a common voltage Σ'+
'= point ilD and two opposite pole-by-pole inputs, i.e., an input coupled to said reference node and an output coupled to regulate the current passed through said electrical switch. alternating contact amplifier means having;
and, in general, a digital signal coupled to the other input of the transconductance amplifier so as to operate in response to the voltage applied to the reference node as well as the transconductance means. 4. A data storage device as claimed in claim 3, comprising an analog converter. (5) a base body, a data storage disk, a Tanabata disk mounted on the base body for rotating the disk, and at least one data 1 Herance duuser for reading data from and loading data from the storage surface of the disk; rotary type 1 to lance decoder transfer means for supporting the data 1 - lance decoder on the storage surface; rotary drive means for avoiding rotation of the transfer means; a data storage device comprising: a data storage device for controlling the rotary drive means at least in part by data read from the base body; a lower ferromagnetic flux folding play 1~means existing on the opposite side of said shaft support and on a plane common to said shaft support; a plurality of lower permanent magnet means attached to a part of the surface of said plays 1 to -1 of the side surface 90'';
rotor means rotatably mounted on said base body, each having a locus of rotation not exceeding said axis and having a plurality of opposed coils, each rotor means being rotatably mounted on said base body about said axis; Lay the front two lower magnet means on the 11111 plane on the opposite side of the support, and make 4M so that most of the 11-meter is balanced around the pivot support, and means for an upper ferromagnetic flux folding play 1 present on the opposite side of said pivot on the rotor means; and a lower portion of said upper flux folding play 1 on the opposite side of said pivot. a plurality of surface-mounted permanent magnet means, each upper magnet means being aligned with respect to said lower magnet means and aligned with respect to the magnetic field of said lower magnet means. A data storage device arranged in a magnetic field. (6) The means to the upper play 1 and the lower play 1 to means are mounted on the base body in a part of the rotary drive means, and in turn the means for the rotary drive on the opposite side of the one end. a single attachment member J3 at the other end of the drive means and commonly attached to each other and attaching said commonly attached upper and lower plate means to said base body at said opposite end; further comprising means, and said single act namemen 1 and said means 1 to d.
6. The data storage device according to claim 5, wherein the relative movement between the input body and the input body is adjusted. (7) said upper and lower magnet means include a pair of two common oversized magnetized annular sections on opposite sides of said pivot; 6. An data storage device as claimed in claim 5, including three coils, each coil being positioned in a rotatable position between said pair of sections. (8) a substrate, a data storage disk, a controller mounted on the substrate for rotating the disk, and at least one device for reading data from and writing data to a data track on a storage surface of the disk; A data transducer, a transducer transport means for supporting the data transducer by supporting the data transducer, and a housing movably mounted on the base body are installed; mounted on the rack boundary optical encoder means and said transport 1 to 1 containing the scale;
Move the stage to transfer the transducer 4j to the data 1-
11. A data recording device comprising an ac-coator means for moving between racks, and a servo control means for controlling the ac-coator means based on the position information obtained at least in part by the optical encoder means described in 11o. . said housing is comprised of two parts, an upper part and a lower part, having a common longitudinal axis of alignment and rotation;
and has an internal locking structure to maintain the common axis,
said parts are assembled and coupled together, and a single light-emitting tie A-F energy source mounted on an Im-coupled base aligned on the axis of said upper part 1911 directs energy photons to said lower part; a lateral surface on said lower part facing said energy source, said surface defining a four-part area therein and a small number of raised parts arranged around said surface below said four-part area; 1) four recesses 81 (mounted in the region 1); reconnaissance light diode Δ-dore array arranged in a straight line on said array; further comprising an optical mask having angled corners and cut into the surface; further comprising: a circuit wafer having a small number of races, and a bonding wire coupled to the array and the race, coupling the array and the couple; Data storage device, '2.+. (9) a base, a data storage disk, a motor mounted on the base for rotating the disk, reading data from data tracks on the storage surface of the disk, and at least one data transducer for writing data, a transducer transport means for moving the data transducer 1 to 10 surfaces; l mounted as possible
a rack boundary optical engine]-der means which includes a storage and a school mounted on the transport means;
The actuator means for moving the transducer between the front HI27 motor 1 and the rack by operating the X means, and the full-end optical encoder means provide at least 181j to I. and servo control means for controlling the actuator means from position information. t, and the housing has a straight line j>J with respect to the base body J:
and has a single longitudinal axis of rotation, said housing defining a chamber (Mr. RIS PI 4
of the encoder having a length of 18 msec, attached to the base body and extending from the base body along the axis and housed in the cylindrical portion, thereby attaching to the base body; (10) The lower cylindrical part is removable for attaching the encoder housing to the bin. a removable ramp adapted to be compressed as such and located near the portion to clamp it to the bin to assemble the encoder means in line with the body; 45rl - Data storage device according to claim 9. 11) A base body, a data coordination disk, a motor mounted on the base body for rotating the disk, and a storage surface of the disk. at least one data transducer for reading data from and inputting data from two data racks; a rotary transducer transport for supporting a data rack against a storage surface; means, rotary actuator means for moving the transducer υ between the data tracks by moving the front δC transfer means; ``
and servo control means for controlling said rotary actuator from information, wherein said substrate is a single cast member defining a disk area and a rotary actuator area. and the motor is a brushless DC motor mounted on the casting at the central opening of the disc region and directly driving the disc on a common shaft; determining a generally right-angled well portion with an upwardly extending Iζ actuator pivot located in the well, said actuator means being generally right-angled box-shaped, and said well portion surrounding said pivot; a rotatable member occupying an area and pivoted on the actuator shaft, the rotary transfer means being mounted on the rotatable member, and the base body defining a continuous peripheral lip and having a rotatable member on the lip. a gas scoot housed in a gas scoot; and a sealed cover surrounding said disc and transfer means and closely mating with said gas foot. (12) A main circuit board means separably mounted on the base molding outside the cover, and a spare circuit board separably mounted on the base molding inside the cover. further comprising means for providing a portion extending through an opening in said base casting and having an electrical connection for connecting with a plug on said necessary circuit board means, said preparatory circuit 12. A data storage device according to claim 11, further comprising sealing means for covering said space of said base casting when substrate means is attached to said base casting. 11. The data storage device of claim 11, wherein the circuit board means includes heat-generating electronic components thermally coupled directly to the base molding. (14) The rotary transfer means. a closed window means in said cover adjacent to said window means; and 1) cooperation between said symbol multi-transmission means and said window means, and track position adjustment means for providing an indication of
A data storage device according to claim 11. (15) The transfer means moves the rotary member (the annular portion for the opposing attachment) and extends from the annular portion to the top of the transducer jJ at the touch-men 1 position. The annular part includes an arm bent inwardly and threaded through the threaded part, and further includes an arm bent inwardly and threaded over the threaded part between the annular part JLi and the apex. 12. The data storage device of claim 11, comprising: a plurality of tq+ main shaped glues of decreasing diameter arranged along the substrate. (16) a base casting; , a brushless DC motor with an internal non-contact commutating sensor and an index sensor, which is attached directly to said motor for rotation and has a plurality of concentric data racks on its storage surface, one for each track. at least one data storage disk containing servo sectors containing two pre-stored sequential bursts equally radially offset from the centerline;
at least one data lance ducer for sequentially reading out the servo sector berths; rotatable lance durometer transfer means for supporting the lance ducer; , and a rotary actuator assembly for rotating said transducer-transfer means; a rotary actuator assembly pivoted on said parking structure for rotational and axial alignment; and a light source and a light source. a scale having alternating translucent and opaque regions disposed on the transducer transport means and passing between the light source and the photocells, the photocells comprising: an electric motor drive municipal switching circuit phase-shifted relative to the translucent and opaque regions and coupled to drive the brushless DC motor; and an electrical circuit coupled to drive the rotary actuator assembly. a rotary acticoator power drive circuit for sequentially receiving each servo sector burst 1 and recording an analog value responsive to the peak amplitude of each said burst; receives data from a coupled analog peak detection circuit, the commutation sensor υ and the index sensor of the brushless DC motor, and calculates a binary rectification multiplier by 81 and applies it to the power switching circuit to control the brushless morph. digital processor means operatively coupled to the processor means;
coupled to receive analog data from the photodetector and the peak detector and convert the data to digital values, and further coupled to receive track 3 bar selection information from a higher system interface; and said pro-sensor means is coupled to said rotary actuator power drive circuit and said light source via digital-to-analog converter means, said pro-sensor means:
1-rack selection information from the interface, track boundary information from the optical encoder means, and track centerline information from the peak detector;
The transducer is measured and outputted to the rotary actuator power drive circuit to drive the rotary actuator 1] and then move the transducer to the rack to the desired data 1. keeping the lance due line aligned on the center line on the track during read and write operations, further measuring the difference in response to the characteristics of the phototube, and calculating and transmitting a light level correction value to the light source. a data storage device that compensates for said difference. (17) said digital processor means (including a plurality of programmed microprocessors, one microprocessor) receiving data from said rectifying processor and said index register; and the other microprocessor is coupled to control the rotary actuator power drive circuit and the light source, and the other microprocessor is coupled to control the rotary actuator power drive circuit and the light source. The processor generates an index (No. 5) from the index sensor 1 which interrupts the operation of the other microprocessor, and reads the peak of the 1 novo sector parse 1~. (The data storage device according to paragraph 16. providing a translucent area between the reference track photocells, and the digital brochure means periodically converting the electrical values output by the reference track photocells when the light source is aligned with respect to the translucent area. The light level correction value is measured and based on it, the light level correction value is adjusted to compensate for any changes in the characteristic energy level produced by the light source. , the data storage device according to claim 16. (19) The motor drive power switching circuit includes a plurality of electrical switches, each of which is connected directly to the fixed coil in the Tanabata. '91[, said switch having a common voltage reference node, one input coupled to said base ring node and said output regulating the flow through said electrical switch. A further coupled transconductance amplifier having two oppositely polarized inputs and one output is constructed such that its operation is equal to the voltage at the contacts F1 and the digital B1 processor means. the digital processor means being coupled between the processor means and another input to the amplifier such that the digital processor means digitally commands the motor to rotate at a constant predetermined speed. Iζ
17. A data storage device as claimed in claim 16, further comprising a digital-to-analog converter. (20) a lower ferromagnetic flux fold plate having a generally right-angled actuator well defined by the base casting and including a 1lllIll support between the casting and the assembly and an opening to the pivot; and two lower permanent magnets mounted on the lower plate on opposite sides of the pivot, and housed in the pivot;
two coils, each of which has a rotor aligned on the magnet; a ferromagnetic flux folding plate that extends across the frontage of the rotor; and a lower magnet. two upper permanent magnets mounted on said upper plate in a straight line with respect to each other and mounted directly on said two coils of said rotor, each of said upper magnets being aligned with them in a straight line; 17. The data storage device of claim 16, wherein the upper plate and the lower brake h are arranged in a straight line with respect to the alternating magnetic fields of the lower magnets. J5 at one end of the well is attached to said base casting, and J3 at the opposite end of said well is commonly attached to each other, and said common to the attachment to said concrete casting. 11- at the attached end, and wherein said attachment part 11- is adapted to adjust the relative movement between said commonly connected plate and said base casting. 21. The data storage device of clause 20. (22) The optical encoder assembly - has a common linear and rotational longitudinal axis and has an internal latch structure for maintaining the common axis. Upper J5
J: comprising two separate housings with a lower part of 1"V, the light source being mounted in a cylindrical aperture in the upper part aligned with the m2 frame and directed toward the array. a lens for focusing the emitted photons; said lower part defines a recessed area for mounting said array;
a plurality of raised planes disposed near the surface of the array; further comprising an optical mask having fixed angles aligned on the array, and attached to the planes; the portion also includes an underlying shelf extending outwardly from the top surface, having a plurality of circuit traces mounted to the shelf and directed toward the top, and having a plurality of circuit traces attached to the shelf and directed toward the top surface; 17. The data storage device of claim 16, further comprising: a printed circuit wafer coupled to a connector cable; and a plurality of overlapping bond wires coupled to the array and the traces coupling the array to the cable. . (23) The pivoted housing of the optical encoder assembly includes a lower cylindrical portion defining a cylindrical chamber on an axis in line with the pivot and is attached to the base molding. The shaft is extended from there and housed in the cylindrical chamber to provide the pivot support.
17. A data storage device according to claim 16, in particular comprising a bin of <. (24) said lower cylindrical portion (J) removably clamped to said bin, further comprising a removable lamp surrounding said portion;
A data storage device according to claim 23. (25) The body casting defines a continuous peripheral lip, and gas shoes I~ housed on the lip.
17. A data storage device as claimed in claim 16, including: a hermetic cover surrounding said disk J3 and transfer means, said sealingly mating with said socket. (26) Removable on the opposite side of the base molding engaged by the cover (separable into the main printed circuit board mounted like iU and the base molding inside the cover); electrical circuit boards, including a pre-bonded circuit board mounted in a manner similar to that shown in FIG. and further comprising means for sealing the opening into the base VF structure when the spare circuit board is mounted on the base molding. 27. The data storage device of claim C125. 27. The data storage device of claim 26, wherein the primary circuit board includes heat generating electronic components thermally coupled to the base molding. a data storage device; (28) sealing window means in said cover adjacent to said rotatable transducer transfer means; said one of said transducer; 26. The data storage device according to claim 25, further comprising rack position display means for visually and relatively displaying the rack position. a cylindrical portion attached to the transducer assembly, and extending from the annular portion to an apex adjacent to and below positions 1 to 1 of the transducer; The annular portion J5 includes an arm member that rightly rotates the straight portion with the bent 1 internal thread.
and -C along the threaded section between the origin and the origin.
17. The data storage device of claim 16, further comprising a plurality of cylindrical chambers of decreasing diameter arranged therein. (30) connected to the Yuri 5 interface, the drive unit comprising a base, a data storage disk, a motor mounted on the base for rotating the disk, and a plurality of drives on the storage surface of the disk; At least one data track 1 for reading data from and writing data to the data track
~ Lance j゛Yuri, with two successive alternating servo bursts pre-recorded on the disk to support data transducing to the storage surface. a digitally controlled 7-quidule servo system;
The digitally controlled actico-ac-navo system comprises: an optical encoder means including a housing; a light source means mounted to the housing for emitting energy photons; and a light source mounted to the housing. receiving said energetic photons from the means and converting them into an analog electrical output signal;
a photodetector array comprising a small number of photodetectors aligned such that the light source and the photodetector array are spaced apart by a movable fixed spacing between the light source and the photodetector array;
a translucent scale, and the photodetector includes a translucent scale J5'
LL, then present the phase-shifted output horn signal with respect to I.
and the housing and the scale move relative to each other as the transfer means moves relative to the substrate, and each readout by the transducer 110 as it passes over the servo controller. peak detector means for measuring the peak width of the intersecting servo burst; programmed digital converter means including analog-to-digital converter means; and processor means coupled to said analog-to-digital converter means. and digital-to-analog converter means coupled to the processor means, wherein the peak detector means J3J and the photodetector detect the peak servo burst amplitude and the output signal from the photodetector. +'J is coupled to said analog-to-digital converter means such that it is converted into a digital value; 1 Kuzini 1
- further comprising an analog actuator driving means for moving said first lance device in said photodetector; Data from the output signal J3 and the track centerline offset from the corrected beak servo burst amplitude by determining and counting the rack boundaries; the transducer is coupled to directly command and control the movement of the data track, and moves the transducer between the data tracks in accordance with instructions from the L-rear interface;
a data storage device that maintains said transducer aligned on a centerline of each selected data track according to a set offset correction value. (31) The light source means is coupled to the digital-to-analog converter means, and the processor is coupled to read out peak light values from each photodetector in turn, and the processor is coupled to read out peak light values from each photodetector in turn. The detected value is compared to a predetermined apparent value, the difference is calculated, and the calculated digital light value is outputted to said digital light value to said digital to analog converter means so that each photodetector is The level of said energy photons emitted by said light source means for each photodetector whenever said output signal is quantified and read out by said digital computer means to output a corrected analog electrical value. 31. A data storage device according to claim 30, characterized in that: (32) the scale includes a clear area covering a range of movement relative to the housing and one opaque spot at one end marking a reference data track and is coupled to the digital-to-analog converter means; and said array aligned in a straight line - so as to receive photons from said light source means through said clear area - except when said opaque spots are aligned between said arrays
) ia 1JII photodetectors, the means for processing periodically the electrical values output by the additional photodetectors when they are not aligned with respect to the opaque region. 8111 read out the light source means to correct for any drift in the energy level emitted by the light source means, and output one energy level above a predetermined value. 32. A data storage device according to claim 31, wherein the peak detector means includes an amplifier coupled to receive the servo burst and a respective one of the lengths. a capacitor coupled to said amplifier for adjusting a charge proportional to the peak amplitude of the Bobath 1~, said capacitor being coupled to said analog/digital converter means. 34. The data storage device of claim 30. (34) The computer means is coupled to the encoder, whereby each amplitude peak value is extracted therein and the analog-to-digital converter means extracts the four numbers. The special δ that allows for discharge before being
'f A data storage device according to claim 30.