JPS59100637A - Echo canceller - Google Patents

Abstract

PURPOSE:To complete converging operation in a short period by continuing the converging operation as to a signal series fetched during a unidirectional talking section also for a non-sound section and a bidirectional talking section. CONSTITUTION:A power detecting comparator 1 compares a transmission side power and a receiving side power in a signal from an echo path 11 and divides the talking section into the non-sound section, the unidirectional talking section and the bidirectional talking section. An operating mode deciding circuit 4 designates the repetitive mode in case of the non-sound section and the bidirectional talking section and transfers a talking signal to a receiving signal register 2 and an echo signal register 3. The data in the register 2 is applied with convoluting integration 6 by an operating equation stored in an estimate impulse response circuit 7, the data in the register 3 is compared by an operating circuit 8, and the residual is fed to a tap coefficient correcting circuit 10 to correct the next coefficient and this operation is repeated. The converging operation is performed in the repetitive mode in succession to the converging operation of the normal mode of the unidirectional talking section, allowing to reduce the converging time.

Description

[Detailed Description of the Invention] (a) 0 Technical Field of the Invention The present invention relates to an echo canceller, and in particular, speeds up the convergence of the echo canceller using a repetitive operation mode used in long-distance communications such as satellite communications. It concerns echo cancellers.

(b), Prior Art and Problems Echo in a communication line refers to the sound that returns via the communication line, in other words, distortion, in addition to the side tones of the voice transmitted by the caller, and is caused by long-distance lines. This is one of the problems in Therefore, the signal sent from the transmitting side is modified by the transmission characteristics of the communication line, and the returned signal, that is, the echo, is measured, a pseudo-circuit with the same transmission characteristics as this is created, and the output signal of this pseudo-circuit is echoed. The echo can be canceled by subtracting it from the signal. For this purpose, it is necessary to actually measure the transmission characteristics of the communication line, but this measurement must be done during a so-called call. Therefore, measurement is possible only when the transmitting side is emitting audio and the receiving side is not emitting audio.

Therefore, in the conventional echo canceller, the convergence operation is performed only during the period when the signal reaches the echo canceller and during the period when there is no two-way communication, so the echo canceller converges. The major drawback was that it took a long time to complete the process.

(C)0 Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a good echo canceller that completes the convergence operation in a short period of time.

(d) 0 Structure of the Invention According to the present invention, the above object is achieved by comparing the transmitting side power and the receiving side power, dividing the call section into a silent section, a one-way call section, and a two-way call section, and performing a convergence operation. In the silent section in which the echo signal must be stopped, and in the two-way communication section, convergence operation is continued for the signal sequence taken in the one-way communication section.
This is achieved by providing cancellers.

(e) 0 Embodiment of the invention FIG. 1 is a diagram showing an embodiment of the invention, in which 1 is a power detection comparator, 2 is a received signal register, 3 is an echo signal register, and 4 is an operation mode determiner. , 5 is another received signal register, 6 is a convolution integration circuit, 7 is an estimated impulse response circuit register, 8.9 are both subtraction circuits, 10 is a tap coefficient correction circuit, and 11 is an actual echo path.

FIG. 2 is a repetitive operation mode configuration diagram, in which 12 is a received signal memory, 13 is an echo signal memory, and the other numbers are the same as in FIG. 1.

FIG. 3 shows an operation mode determining circuit, in which 16 and 20 are comparators, 15 is an arithmetic circuit, 17 is a gate, 18 is a memory for storing the normal mode, and 19 is a memory for storing the repetition mode.

The present invention will be explained in detail below with reference to FIG.

The echo canceller of the present invention has two operating modes, one of which is to compare the power on the receiving side and the transmitting side (same as the conventional double talk detection circuit), and when only the power on the receiving side is large, It is considered to be a one-way state and operates in the normal operation mode of the echo canceller (indicated by the solid line in the figure). When the power is sufficiently large (two-way communication), it operates in an operation mode (indicated by a broken line in the figure) in which it repeats corrections on the sequences that have been captured up to that point.

According to the learning identification method, hL= h, + at ・e, I-1,, /Σ4(
1) However, 2π is the received signal sequence A, tap coefficient l is the residual echo (correction error), and α is the control coefficient A' is the register number.

Furthermore, in the following explanation, when receiving a received signal sequence and an echo signal sequence from a line, it goes without saying that each signal sequence is A-D converted and digitized before being used. However, this A-D converter is omitted in FIG.

In FIG. 1, a power detection comparator 1 compares the power intensities of both a received signal and an echo signal corresponding thereto.

The details of this comparison operation will be explained according to the third tooth.

That is, first, the receiving side power Pr and the reference value pth are
Compare at 0. pth is a numerical value representing a level value that can be regarded as silence, and when the receiving side power Pr is at a level lower than pth, it is regarded as a silent section, and the echo canceller operates in a repeat mode stored in the ROM 19. The loss Pl of the echo path where the receiving side power Pr is higher than pth, and the difference between the transmitting side power Ps and the receiving side power Pr is designated as Pr-Ps.

When Pr-Ps is equal to or smaller than Poss, it is regarded as a one-way conversation and the echo canceller operates in the normal mode stored in ROM18.On the other hand, when Pr-Ps is equal to or smaller than P1oss, it is regarded as a two-way conversation and stored in ROM19. The echo canceller operates in repeat mode. In this way, the output of the operation mode determiner 4 specifies the repeat mode or the normal mode.

Assume that the output of the operation mode determiner 4 now specifies the normal mode. When the output of the operation mode determining circuit 4 is in the normal mode, the echo canceller operates as shown by the solid line in FIG.

Although it is not necessarily constant, the acquisition time is, for example, approximately 100 m5.

Take the call signal from the line into the reception signal register 5,
Based on the coefficients stored in the estimated impulse response circuit 7, the convolution integrating circuit 6 calculates a pseudo echo signal,
The arithmetic circuit 9 calculates the difference with the echo signal, and inputs the residual to the tap coefficient correction circuit 10. Based on this result, a new coefficient is output from the estimated impulse response register 7, and the convolution integration circuit 6 Operate. In this way, the convergence operation is performed.

Next, assume that the output of the operation mode determiner 4 specifies the repetition mode. The operation of the echo canceller at this time will be explained with reference to FIG.

When the output of the operation mode determining circuit 4 is in the repetition mode, the operation is as shown by the broken line in FIG.

As in the normal mode, the received signal series and echo signal series captured from the line for a time length of approximately looms are stored in the received signal memory 12 and the echo signal memory 13 after A-D conversion as described above, and are then stored in the counter 14 is cleared to zero. Next, the signals in the memory are divided into tap numbers, and are transferred to the received signal register 2 and the echo signal register 3 in order from the oldest one in terms of time. Next, the data stored in the estimated impulse response register 7 based on the data in the received signal register 2 is subjected to convolution calculation based on the formula 1, and compared with the echo signal register 3 in the calculation circuit 8. The residual difference is input to the tap coefficient correction circuit 10, and the coefficients are then corrected and calculated.

While repeating such calculations, the contents of the received signal memory 12 and the echo signal memory 13 are sequentially transferred to the received signal register 2 and the echo signal register 3 by the counter 14, and the above calculations are repeated.

In this way, in order to avoid code amount interference, when all the contents of the memory are counted as being read, each register is cleared, and the operation of reading the memory from the beginning again is repeated.

Therefore, according to the present invention, the convergence operation is performed not only during one-way communication, as in the conventional system, but also during silent periods and two-way communication periods, so that the convergence time is shortened.

(f) 6 Effects of the Invention As explained in detail above, compared to the conventional method which performs convergence operation only during one-way communication, the method according to the present invention has a convergence operation even during silent sections and two-way communication sections. Since the convergence operation continues for the stored sequences, it has the great effect of shortening the time required for convergence.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, in which 1 is a power detection comparator, 2 is a received signal register, 3 is an echo signal register, 4 is an operation mode determiner, and 5 is another received signal register. , 6 is a convolution integration circuit, 7 is an estimated impulse response register, 8 and 9 are both subtraction circuits, 1o is a tap coefficient correction circuit, and 11 is an actual echo path. FIG. 2 is a repetitive operation mode configuration diagram, in which 12 is a received signal memory, 13 is an echo signal memory, and the other numbers are the same as in FIG. 1. FIG. 3 shows an operation mode determining circuit, in which 16.2° is a comparator, 15 is an arithmetic circuit, 17 is a gate, 18 is a memory for storing the normal mode, and 19 is a memory for storing the repetition mode. 2nd sweet

Claims (1)

[Claims] The transmitter power and the receiver power are compared to divide the call section into a silent section, a one-way call section, and a two-way call section, and the silent section and the two-way call section where the convergence operation must be stopped. an echo canceller, characterized in that the echo canceller continues a convergence operation for the signal sequence captured in the one-way communication section;