JPS59100567A - Semiconductor switching element - Google Patents

Abstract

PURPOSE:To improve uniformity in turn OFF operation, by reducing the lateral resistance of electrodes, which are wired on the surface of a semiconductor substrate to 1/5-1/10 the conventional value. CONSTITUTION:Cathode electrodes 3 and gate electrodes 4 are electrically connected to copper foil electrodes 6 and 7, which are bonded to an organic insulating film 5, by solder layers 9 and 10. A cathode side connecting electrode 12 is electrically connected to the electrode 6 on an (n) emitter layer nE at a part of a through hole 13 that is partially provided in the insulating film 5 by a solder layer 141. A gate side connecting electrode 15 is connected to the copper foil electrode 7 at a part of a through hole 16, which is provided in the film 5, bt a solder layer 142. Then, the lateral resistance of the electrodes 6 and 7 is reduced to 1/5-1/10. Therefore, uniformity of operation in the longitudinal direction in one (n) emitter at the same time of turn OFF is improved.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a power semiconductor switching element such as a gate turn-off thyristor or a power transistor;
In particular, the present invention relates to an ohmic electrode structure suitable for improving uniformity of operation within a semiconductor substrate and reliability.

[Prior art]

In semiconductor switching elements that handle relatively large amounts of power, such as gate turn-off thyristors (hereinafter referred to as GTO thyristors) and power transistors, a control electrode (gate or base electrode) is ohmically connected to the surface side of the pace region.
Generally, a structure is adopted in which a predetermined number of elongated cathode emitter regions surrounded by . This is because it is possible to increase the effect of the control signal on the cathode emitter region through which the main current flows, and at the same time to increase the area utilization rate of the main current path in the conductor base. A problem with such a structure is that the operation becomes non-uniform due to the voltage drop due to the lateral resistance of the ohmic electrode on the surface of the rigid and elongated cathode emitter region and the 1b1 electrode.

Conventionally, these electrodes that have been generally employed are aluminum vapor-deposited films with a thickness of several μm at most, and aluminum wires with a thickness of about 0.2 mm have been used for connection with external terminals. Since the lateral resistance (direction of the film surface) of the aluminum vapor-deposited film is large, measures such as shortening the length of the emitter region have been taken to ensure uniformity of operation, but the area utilization rate of the semiconductor substrate has decreased. There was a drawback that the value decreased. Cathode emitter area 1 compared to general power transistors
This problem is especially serious for GTO thyristors, whose current capacity is several times larger, and there are cases where the upper limit of the current that can be cut off is restricted.

In response, we previously proposed a method in which a thin metal foil adhered to the surface of an organic insulating film is patterned into a predetermined shape and then soldered to a semiconductor substrate. In this method, copper foil with a thickness of several tens of micrometers is bonded to the surfaces of the cathode electrode and control electrode, so the internal resistance of the electrode is 115 to 1/1.
This is an excellent method that is effective in reducing the size of the semiconductor substrate by eliminating the surface area of the semiconductor substrate that was conventionally used for bonding aluminum wires, and eliminating the above-mentioned problems.

However, in this method that has been implemented up to now, in order to connect the cathode electrode and control electrode to the external terminal, the same metal foil that is integrated with these electrodes is soldered directly to the terminal connection terminal. As a result, the following problems were found. In other words, a thin metal foil is cut due to the difference in thermal expansion coefficient between the soft resin that covers the semiconductor substrate to protect the semiconductor substrate from various external mechanical distortions, or the mold resin and the metal foil. This is the problem. Although this does not pose a separate problem during manufacturing or immediately thereafter, it is a drawback that leads to a decrease in reliability that occurs during long-term use where the cooling/heating cycle and power cycle are repeated.

In addition, with the conventional method, when soldering metal foil electrodes onto semiconductor substrates, it is necessary to align the electrodes and semiconductor substrates with respect to each semiconductor substrate, which reduces productivity in electrode attachment. Ta.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor switching element in which one outer region has an elongated shape, which improves uniformity of operation and has a highly reliable electrode structure.

Another object of the present invention is to provide a semiconductor switching element having an electrode structure with high productivity.

[Summary of the invention]

The semiconductor switching device of the present invention that achieves the above purpose is characterized by being supported on one side of an insulating film adhered to first and second electrodes arranged in an intricate pattern on one side of a semiconductor substrate. The point is that the first and second connection conductors are bonded to the first and second foil electrodes, which pass through the insulating film from the other side of the insulating film 2.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Four layers of pE * ``B!
They are shaped like long, thin strips, with a total of five pieces lined up at regular intervals. pEln'1. I) Electrodes 2° 3.4 mm thick and made mainly of silver, for example, are connected to the surface of each layer of B with a low resistance. The electrode 2 is an anode electrode and is electrically connected to the base side connection electrode 11 and the solder skin 8. The fc electrodes 3 and 4 are cathode electrodes and gate electrodes, and are copper foil electrodes 6. about 40 μm thick that are in contact with the organic insulating film 5.
7 is solder I19. electrically connected by io. A cathode-side connecting electrode 12 is connected to the copper foil electrode 6 on the n-emitter layer 11 through a solder layer 141 through a through hole 13 partially provided in the insulating film 5. Similarly, the gate side connection electrode 15 is connected to the copper foil electrode 1 by the solder layer 1 42 at the through hole 16 provided in the insulating film 5 . FIG. 2 shows an assembly diagram inside the outer package. Cathode side connection electrode I2 shown in FIG. The semiconductor body 1 to which the gate-side connection electrode 16 is soldered is soldered to the anode-side connection terminal 11 on the alumina insulating plate 17, and at the same time the cathode and gate leads 18, 19 are connected to the cathode and gate terminals 20, 21, respectively. and cathode and gate side connection'rd pole 12,
15 are soldered to electrically connect them. Also,
The anode terminal 22 is connected to the anode side connection electrode 11. The alumina insulating plate 17 is attached to a copper plate 24 having a thickness of about 3 g through a solder layer 23, and an exterior plate 25 is attached to the copper plate 24. Then, the exterior plate 25 is filled with a resin material 26 such as epoxy resin.

The current path when the G T O silisk having such a structure is conductive flows from the anode-side connection electrode 1.1 to the cathode-side connection electrode ``2''. pg-nn in the semiconductor substrate 1
n1 flows through the path of pg nE and is divided into multiple pieces.
The current is divided into each layer, passes through the copper foil electrode 6 and the through hole 13, and is collected to the cathode side connection electrode 12. At turn-off, a gate signal of about 20V is applied between the gate terminal 21 and the cathode terminal 20 so that the gate terminal has a negative potential. According to this gate signal, a part of the main current flowing through the n1 layer is extracted through the adjacent pb layer, gate electrode 4, and copper foil electrode 7,
Injection of electrons from the n1 layer becomes blocked, and thereafter the self-sustaining ability of the current flowing through the main current path pE+nll+9g,ng stops.

In the operation of the GTO thyristor described above, this embodiment has the following effects. First, copper foil electrodes with a thickness of approximately 40 μm are soldered to each of the cathode electrode 3 and gate electrode 4 on the n emitter J fluorescent nE, so the lateral resistance of the cathode and gate electrodes is reduced to 115 to 1/10. Let's go. Therefore, the uniformity of the operation in the longitudinal direction within one n-emitter layer during turn-off is improved, and as a result, the maximum breaking current of the GTO cyrisk is increased. Specifically, in the case of only electrode 3.4, the maximum cut-off current was 100A, which was increased to 150-200A. In addition, the copper foil electrode 7
and the copper foil electrode 6 are electrically insulated by an insulating film 5, ensuring sufficient insulation against a voltage of about 20V at turn-off.

Furthermore, this embodiment has the following new effects not found in the conventional example. That is, as shown in FIG. 2, a copper lead wire 18.19 having a thickness of about 1 wn is used to electrically connect the cathode side connection electrode 12 and the gate side connection electrode 15 to the terminal 20.21.
are used, and by filling them with resin 26, the frequency of the series lead wires 18 and 19 being cut due to the difference in thermal expansion coefficients of these materials is greatly reduced. Specifically, it was confirmed that in the conventional example, disconnection occurred after about 30 cycles of heating and cooling, but it can withstand more than 200 cycles.

Furthermore, another effect of this embodiment relates to workability. The subassembly shown in FIG. 1 is manufactured in the following manner. After forming a junction of a predetermined shape on a silicon single crystal wafer with a diameter of about 75 cm by diffusion of a dopant such as phosphorus, boron, or gallium, the n=layer and px
Cathode and anode electrode films of several μm in thickness, such as Cr-Ni-Ag or Ti-Ni-Ag, are deposited on the surface of the layer, and patterned into a predetermined shape by photo-etching. At this stage, there is only one piece of silicone ueno.

- about 100 semiconductor substrates are aligned.

On top of the sea urchin after bonding and electrode formation, an organic insulating film 5 (e.g. polyimide, Kapton film) to which a copper foil electrode patterned in a predetermined shape is adhered is placed over the Pb-8n- Bond both together with Ag solder. Next, the semiconductor substrate is cut out from the sea urchin with a cutter. Thereafter, this semiconductor substrate is fabricated into the configuration shown in FIG. 2, connection electrodes and leads are connected using pb-sn solder, and then resin is poured to complete the structure.

As described above, in the structure of this embodiment, the foil electrodes can be bonded before cutting out the semiconductor substrate from the wafer, so the alignment of the foil electrodes and the semiconductor substrate can be done in one step on the wafer. Therefore, it is possible to bond foil electrodes to 100 semiconductor substrates in one bonding process. Compared to the conventional method of cutting out the semiconductor substrate, aligning it to each semiconductor substrate, and soldering the foil electrode, the working time required for this process is V
l, can be shortened to less than 0. In addition, in this example, the diameter is 7
It is necessary to bond the foil electrode to the entire surface of the silicon wafer in five cavities with good adhesion, but the problem of misalignment due to the difference in thermal expansion between the two remains. In this case, it is desirable to take this into account in advance when designing the shape, or to select gold whose coefficient of thermal expansion is as close as possible to that of silicon. For example, epoxy glass material has a coefficient of thermal expansion of 3X10-'/C and is suitable as the insulating film of the present invention.

FIG. 3 shows another embodiment of the present invention. This is 300
This is an example applied to a power GTO thyristor that handles a large current of ~450 A or more. The reference numerals of each part indicate the same parts. Unlike the previous embodiment, in this case, the semiconductor substrate is made of disk-shaped silicon, and the cathode, gate, and anode side connection electrodes 12, 15, and 11 are donut-shaped and disk-shaped, respectively, and have a diameter of about 40 mm. ■Since it is large, the material is MO as well.
, W, or Cu-C, a metal material with a small coefficient of thermal expansion is used. Further, at the end of the semiconductor substrate 1, the portion where the pn junction on the surface is exposed is covered with a silicone resin 101. In this embodiment, the lateral resistance of the gate electrode circle is reduced by 115 to 1/10 mainly due to the copper film 6.7 having a thickness of several tens of micrometers bonded to the insulating film 5. As a result, the uniformity of the turn-off operation of multiple nE layers within a large-diameter semiconductor substrate is significantly improved, and the maximum current that can be interrupted, which was conventionally limited by non-uniformity caused by the lateral resistance of the gate, is increased by more than 150%. It increased.

In this example, an example in which the n1 layers were arranged radially was shown.
In the present invention, which can reduce the lateral resistance of the gate electrode, the arrangement of the r3B layer is not limited to the one-ring arrangement as described above, but also a multi-ring arrangement. Furthermore, even when the nE layers are aligned vertically and horizontally, the uniformity of operation is not significantly impaired. In addition, connection electrodes 11, 12 .
Although the method of connecting 15 and external terminals is not illustrated in the drawings, the terminals connected to these connection electrodes by soldering,
Alternatively, the contact may be made by pressure welding from the outside.

In the case of the embodiment shown in Fig. 3, conventionally, the surface of the PA layer was dug down by etching, and the gate electrode 4 was brought into low resistance contact with the surface to prevent troubles caused by contact between the gate and the cathode side connection electrode. However, in this embodiment, such tedious work can be omitted, and the gate and cathode are sufficiently electrically insulated by the insulating film 5.

FIG. 4 shows another modification of the insulating film with metal foil applied to the present invention. This embodiment differs from the previous embodiment in that a metal film 201 is also adhered to the other surface of the insulating film 5. The front and back metal films are electrically connected at the insulating film through hole 14. As a means of connection, there are also a method of connecting by soldering or a method of plating a metal layer by electroplating or the like.

Further, FIGS. 5 and 6 show other modified examples of the present invention, and the cathode electrode or the gate electrode is not necessarily separated into a plurality of pieces on the semiconductor substrate. The present invention is also applicable when one or both of them are connected.

Further, although the nE layer has an elongated shape as an example, it may be rectangular or circular, and can be applied to all switching elements in which either the cathode electrode or the control electrode has a shape that extends in the lateral direction. .

Furthermore, although solder is used for all electrical connections between the electrodes, the connections may be made by metal-to-metal reaction.

〔Effect of the invention〕

According to the present invention, the lateral resistance of the electrode wired on the surface of the semiconductor substrate is reduced to 115 to 1/10 of that of the conventional one, which improves the uniformity of the turn-off operation and enables maximum shutoff of the GTO thyristor. This has the effect of increasing the current by 150-200%.

According to the present invention, since the finely patterned metal foil electrode wired on the surface of the semiconductor substrate can be connected to each external terminal using a thick metal lead or metal block, disconnection due to the difference in thermal expansion coefficient with the encapsulated resin can be achieved. This problem is solved, and the reliability of the semiconductor switching element during long-term use is improved.

According to the present invention, the workability for positioning and adhering foil electrodes to the surface of a semiconductor substrate in a wafer state has been improved several times as much as possible for stain removal and marking.

[Brief explanation of drawings]

FIG. 1 is a plan view and longitudinal cross-sectional view showing one embodiment of the device of the present invention, FIG. 4 is a longitudinal cross-sectional view of a different embodiment of the present invention, and FIGS. 5 and 6 are plan views of modified examples of the present invention. It is a diagram. 1... Semiconductor base, 2, 3.4... Electrode, 5...
Insulating film, 6, 7... Foil electrode, 8, 9. 10.
...Solder layer, 11...Anode side connection electrode, 12.
...Cathode side connection electrode, 15...Gate side connection electrode, 13°16...Through hole, 141, 142.23...
・Solder layer, 17...Alumina insulating plate, 18.19...
・Cathode. Gate, lead, 20, 21. 22...external terminal, 2
4... Heat sink, 25... Resin exterior plate, 26...
resin. 'lt Figure 2 Figure 2 '43 Figure 14 Figure/2 ＼

Claims (1)

[Claims] 1. A first region of one conductivity type, and a second region of the other conductivity type that is adjacent to the first region and forms a first pn junction between the first region and the first region. , a plurality of third regions that are adjacent to the second region, form a second pn junction between the second region, have an elongated shape and are arranged in parallel with a certain regularity, and are electrically conductive. a plurality of first electrodes each in ohmic contact with the surface of the third region; a plurality of first electrodes in ohmic contact with the surface of the second region and arranged to extend along the periphery of the third region; 2 electrodes, one side of each supported on one side of the insulating film, and the other side of the first and second foil electrodes adhered to the first electrode and the second electrode, respectively, and the other side of the insulating film. 1. A semiconductor switching element comprising first and second connection conductors located on one side, penetrating an insulating film and bonded to first and second foil electrodes, respectively.