JPS5896588U - electronic components - Google Patents
electronic componentsInfo
- Publication number
- JPS5896588U JPS5896588U JP19459581U JP19459581U JPS5896588U JP S5896588 U JPS5896588 U JP S5896588U JP 19459581 U JP19459581 U JP 19459581U JP 19459581 U JP19459581 U JP 19459581U JP S5896588 U JPS5896588 U JP S5896588U
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- wiring
- extended
- liquid crystal
- crystal cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図及び第２図は断面図、第３図は斜視図である。
符号、２１：コモンガラス、２２：セグメントガラス、
２３：液晶、２４：透明電極、２５：シール剤、２６：
配線、２７：ＬＳＩ、２８：バンプ、２９：セラミック
パッケージ、３０：ホットメルトタイプ接着剤、３１：
偏光反射板。1 and 2 are cross-sectional views, and FIG. 3 is a perspective view. Code, 21: Common glass, 22: Segment glass,
23: Liquid crystal, 24: Transparent electrode, 25: Sealing agent, 26:
Wiring, 27: LSI, 28: Bump, 29: Ceramic package, 30: Hot melt adhesive, 31:
Polarized reflector.
Claims (1)
ルに表示信号を出力するＬＳＩを取り付けるものに於て
、 上記液晶セルの電極及び上記延長部分の配線を共に酸化
インジュームにより形成する構成とすると共に、上記延
長部分＆ぺ上記ＬＳＩのバンプ部が嵌まり込む凹部であ
ってその側面及び底面が上記配線の一部を構成する酸化
インジューム膜で形成されている所の凹部を設けて、上
記ＬＳＩのバンプ部を上記凹部に嵌め込み該バンプ部を
上記酸化インジューム膜に接触させた状態で固定するこ
とによって、上記ＬＳＩと上記配線間の接続を行う構成
としたことを特徴とする電子部品。[Claims for Utility Model Registration] In a device in which one substrate of a liquid crystal cell is extended and an LSI for outputting a display signal to the liquid crystal cell is attached to the extended part, the electrodes of the liquid crystal cell and the wiring of the extended part are Both of them are formed of indium oxide, and the extended portion & pe are recesses into which the bumps of the LSI are fitted, and the side and bottom surfaces thereof are formed of an indium oxide film constituting a part of the wiring. A configuration in which a connection is made between the LSI and the wiring by providing a recess at a location where the LSI is located, and fitting a bump portion of the LSI into the recess and fixing the bump portion in contact with the indium oxide film. An electronic component characterized by the following.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19459581U JPS5896588U (en) | 1981-12-24 | 1981-12-24 | electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19459581U JPS5896588U (en) | 1981-12-24 | 1981-12-24 | electronic components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5896588U true JPS5896588U (en) | 1983-06-30 |
Family
ID=30107907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19459581U Pending JPS5896588U (en) | 1981-12-24 | 1981-12-24 | electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5896588U (en) |
-
1981
- 1981-12-24 JP JP19459581U patent/JPS5896588U/en active Pending
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