JPS5890826A - Photo trigger type solid-state relay - Google Patents
Photo trigger type solid-state relayInfo
- Publication number
- JPS5890826A JPS5890826A JP56188587A JP18858781A JPS5890826A JP S5890826 A JPS5890826 A JP S5890826A JP 56188587 A JP56188587 A JP 56188587A JP 18858781 A JP18858781 A JP 18858781A JP S5890826 A JPS5890826 A JP S5890826A
- Authority
- JP
- Japan
- Prior art keywords
- photo
- signal
- optical fiber
- state relay
- load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
- H03K17/79—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar semiconductor switches with more than two PN-junctions, or more than three electrodes, or more than one electrode connected to the same conductivity region
Landscapes
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、ソリッドステートリレーの改良に係わり、
％に電磁障害の発生程度の大きい負荷を制御するに適し
た新規なフォトトリガ形ソリッドステートリレーに関す
るものである。[Detailed Description of the Invention] The present invention relates to an improvement of a solid state relay.
This invention relates to a novel photo-trigger type solid-state relay suitable for controlling loads that cause electromagnetic interference to a high degree.
第１図〜第３図に従来のソリッドステートリレーの代表
例を示す、第１図で、１は双方向性゛サイリスタ、２は
信号増幅回路、３は交流電源のゼーボルト検出回路、４
は発光素子４Ａおよび受光素子４Ｂを含む光−電気変換
回路、５＃ ６は抵抗器および；ングンサである。Figures 1 to 3 show typical examples of conventional solid-state relays. In Figure 1, 1 is a bidirectional thyristor, 2 is a signal amplification circuit, 3 is an AC power supply Seevolt detection circuit, and 4
5 is a photo-electric conversion circuit including a light emitting element 4A and a light receiving element 4B, and 5#6 is a resistor and a conductor.
第２図にさらに詳細な回路構成を示す。FIG. 2 shows a more detailed circuit configuration.
双方向性サイリスタフの７ノードをａ、カソードをす、
ゲートをＧ、 とする、抵抗器５＃ コンデンサ６０
直列−路は、Ｗ！Ｉ記ａ、 ６間に接続される。The 7 nodes of the bidirectional thyristuff are a, the cathode is
Gate is G, resistor 5# capacitor 60
The series-path is W! It is connected between I-a and 6.
ダイオづＩＡ〜２Ｄよりなる全波整流回路の反流出力端
子は、前記７ノードーおよびゲートＧ、に接続され、ま
たゲートＧ、およびカソードｂ１Ｍｊには抵抗ｔ！ａ２
Ｇが接続される。全Ｉｌ螢Ｉｔ回路の直流出力端子の内
、正極はサイリスタ２Ｃの７ノードに、また負極はカソ
ードに接続される。サイリスタ２ＥのゲートＧ□とカソ
ード間には抵抗器２Ｆおよびトランジスタ３Ａのコレク
タ、エミッタが共に接続され、一方、ベースは抵抗器３
Ｃおよび３Ｂを介して、サイリスタ２Ｅの７ノードおよ
びカソードに接続される。またこの７ノード、カソード
間には、光−電気質！ｌｌｌｌ１ｇＩ絡４の受光素子４
Ｂ、例えはフォトダイオードか接続される。−万、開光
素子４Ａ、例えばＬＥＤは電流制限用抵抗器８を介して
、制御入力端子ｃ、 ｄに接続される。ダイオードＴ
は発光素子４Ａと逆並列接続の保護ダイオードである。The counter-output terminal of the full-wave rectifier circuit consisting of diodes IA to 2D is connected to the seven nodes and the gate G, and the gate G and the cathode b1Mj are connected to a resistor t! a2
G is connected. Among the DC output terminals of all the Il and It circuits, the positive terminal is connected to the 7th node of the thyristor 2C, and the negative terminal is connected to the cathode. A resistor 2F and the collector and emitter of a transistor 3A are connected between the gate G□ and the cathode of the thyristor 2E, while the base is connected to the resistor 3.
It is connected to the 7 node and cathode of thyristor 2E via C and 3B. Also, between these 7 nodes and the cathode, there is a photo-electric material! llll1gI connection 4 light receiving element 4
B. For example, a photodiode is connected. - 10,000, the light opening element 4A, for example an LED, is connected to the control input terminals c and d via the current limiting resistor 8. Diode T
is a protection diode connected in antiparallel to the light emitting element 4A.
第２図の２．３．４は各々第１図の２．３．４と等鎖部
分である。2.3.4 in FIG. 2 are equivalent chains to 2.3.4 in FIG. 1, respectively.
第３図（ａ）、 （ｂ）は第１図、第２図に示すソリ
ッドステートリレーの外彎図であり、ａ−ｄは前記の電
気出力端子と制御入力端子とを各々示す。FIGS. 3(a) and 3(b) are curvilinear diagrams of the solid state relay shown in FIGS. 1 and 2, and a-d indicate the electrical output terminal and control input terminal, respectively.
第２図に示す回路の動作の詳細は公知故、省略するが、
この回路で、交流電源の電圧の零位相にて、かつ発光素
子４Ａが発光し、受光素子４Ｂを低抵抗状態Ｋしたとき
、サイリスタ２に、従って双方向性サイリスタ１がオン
することは良く知られている。Since the details of the operation of the circuit shown in FIG. 2 are well known, they will be omitted.
It is well known that in this circuit, when the light emitting element 4A emits light and the light receiving element 4B is in a low resistance state K at zero phase of the voltage of the AC power supply, the thyristor 2 and therefore the bidirectional thyristor 1 are turned on. It is being
さて、このソリッドステートリレーは、例えばマイクロ
コンピュータの出力信号をバッフ７回路を介して、その
制御入力信号に用いるのが一般的である０本来、このソ
リッドステートリレーは、双方向性サイリスタ１が制御
する交流側と、マイクロコンピュータ（以下マイコンと
称す）の直流低圧側との絶縁に用いられる。しかし、直
流的には絶縁されても、高周波のパルス性ノイズ等に対
しては発光素子４Ａ、受光素子４Ｂ間の結合＃量や制御
入力端子ｃ、ｄへの電気配線と他の配線との結合により
、交流的に絶縁されず、ノイズによるマイコン側素子の
破損や誤動作の原因となることが間々生じていた。Now, this solid state relay generally uses, for example, an output signal from a microcomputer via a buffer 7 circuit as its control input signal.Originally, this solid state relay is controlled by a bidirectional thyristor 1. It is used to insulate the AC side of a microcomputer (hereinafter referred to as a microcomputer) from the DC low voltage side. However, even though they are insulated in terms of direct current, high-frequency pulse noise, etc. are affected by the amount of coupling between the light emitting element 4A and the light receiving element 4B, and the electrical wiring to the control input terminals c and d and other wiring. Due to the coupling, AC insulation is not achieved, which often causes damage to the microcontroller side elements or malfunction due to noise.
この発明は、上記の欠点を解消することがその目的であ
る。以下、この発明について説明する。The purpose of this invention is to eliminate the above-mentioned drawbacks. This invention will be explained below.
第４図はこの発明の一実施例を示すもので、２０は負荷
、３０は交流電源、１４は、光ファイバ１４Ｃの７フイ
バコネクタ１４Ａを挿入可能な、光ファイバ１４Ｃと受
光素子４Ｂとの結合になる光−電気変換回路、１４Ｂは
その間に介在する可視光カットフィルタである。FIG. 4 shows an embodiment of the present invention, where 20 is a load, 30 is an AC power source, and 14 is a connection between an optical fiber 14C and a light receiving element 4B into which a 7-fiber connector 14A of the optical fiber 14C can be inserted. 14B is a visible light cut filter interposed therebetween.
この構成で、光フフイバ１４Ｃの一端ｅは他のファイバ
コネクタを介して、マイコン等で制御される受光素子（
図示せず）と光学的な結合がなされている。この結果、
マイコンの直流低圧側と負荷２０の交流側とは直流的に
も、また交流的にも完全に絶縁され、ノイズによる素子
破損および誤動作の心配がない、なお、ファイバコネク
タ１４Ａを外した状態で、外光の浸入で受光素子４Ｂが
低抵抗になるのを防止するため、受光素子４Ｂの前面に
図示のように可視光カットフィルタ１４Ｂを設けると効
果的である。この際、発光素子は赤外発光用のＬＥＤを
用いる。In this configuration, one end e of the optical fiber 14C is connected to a light receiving element (
(not shown). As a result,
The DC low voltage side of the microcomputer and the AC side of the load 20 are completely isolated both in terms of DC and AC, so there is no risk of element damage or malfunction due to noise.In addition, with the fiber connector 14A removed, In order to prevent the light receiving element 4B from becoming low in resistance due to penetration of external light, it is effective to provide a visible light cut filter 14B in front of the light receiving element 4B as shown. At this time, an infrared emitting LED is used as the light emitting element.
そして１発光素子として可視光のＬＥＤを用いる場合は
、ファイバコネクタ１４Ａの着脱に応じて開閉可能なシ
ャッタ機構を受光素子４Ｂの前面に設けることが望まし
い、これはファイバコネクタ１４Ａの取りはずし時に自
然光等の外光で、双方向性サイリスタ１が点弧するのを
防止するためである。When a visible light LED is used as one light-emitting element, it is desirable to provide a shutter mechanism in front of the light-receiving element 4B that can be opened and closed in response to the attachment and detachment of the fiber connector 14A. This is to prevent the bidirectional thyristor 1 from igniting due to external light.
第５図はこの発明の他の実施例であり、双方向性サイリ
スタ１で、大容量の負荷２０の開閉が可能な接点１１Ｂ
を持つリレーコイルＩＩＡを駆動するフォトトリガ形ソ
リッドステートリレーを示す。この場合、リレー１１を
内蔵することも可能である。FIG. 5 shows another embodiment of the present invention, in which a bidirectional thyristor 1 has contacts 11B that can open and close a large capacity load 20.
This figure shows a photo-trigger type solid-state relay that drives a relay coil IIA. In this case, it is also possible to incorporate the relay 11.
第６図は第４図の構成の７オトトリガ形ソリツドステー
トリレーを示し、電気出力端子す、 ａと。FIG. 6 shows a seven-way auto-trigger type solid-state relay configured as shown in FIG. 4, with electrical output terminals A and A.
制御用の光入力端子（ファイバコネクタ１４Ａの挿入用
プラグ）を含むケース１００の具体例である。This is a specific example of a case 100 including a control optical input terminal (plug for insertion of fiber connector 14A).
第７図は負荷２０にフンテンサラン形の誘導電動機を用
いる場合、そのランニングコンデンサ９を、このフォト
トリガ形ソリッドステートリレーに内蔵する例を示し、
外観図を第８図に示す。FIG. 7 shows an example in which the running capacitor 9 is built into this photo-trigger type solid state relay when a Funtensaran type induction motor is used as the load 20.
An external view is shown in Figure 8.
この際、電気出力端子はす、 ａおよびランニングコ
ンデンサ９用のｇの３個となる。この構造では装着スペ
ースの減少化および電線の簡素化が図られる。At this time, there are three electrical output terminals, s, a, and g for the running capacitor 9. With this structure, the mounting space can be reduced and the electric wires can be simplified.
第９図はマイコン回路４０を含めた場合の第７図の回路
構成を示す。FIG. 9 shows the circuit configuration of FIG. 7 when the microcomputer circuit 40 is included.
以上説明したように、この発明の７オトトリガ形ソリツ
ドステートリレーは、負荷につながる少なくとも２個の
電気出力増子と、制御用の光入力端子を持ち、マイコン
回路側に設けた発光素子と、フォトトリガ形ンシツドス
テートリレー側の受光素子との間を光ファイバで結合し
たため、ノイズによるマイコン側の素子破損および誤動
作より解放される特徴がある。また可視光カットフィル
タを用いる場合には、万一のファイバコネクタのはずれ
等に際し、外光による双方向性サイリスタの誤動作を防
止できる利点がある。As explained above, the 7-auto-trigger type solid-state relay of the present invention has at least two electrical output terminals connected to the load, an optical input terminal for control, a light-emitting element provided on the microcomputer circuit side, and a photo-optical input terminal. Since it is coupled to the light receiving element on the trigger type side state relay side using an optical fiber, it is free from damage and malfunction of the element on the microcomputer side due to noise. Further, when a visible light cut filter is used, there is an advantage that malfunction of the bidirectional thyristor due to external light can be prevented in the unlikely event that the fiber connector becomes disconnected.
第１図、第２図および第３図（ａ）、 （ｂ）は従来
のソリッドステートリレーを示すもので、第１図はプρ
ツク回路図、第２図は回路構成図、第３図（ａ）、
（ｂ）は外観正面図および外観側面図、第４図はこの発
明の一実施例を示すブロック図、第５図はこの発明の他
の実施例を示すプｐツク図、第６図は第５図の実施例を
示す外観斜視図、第７図はこの発明のさらに他の実施例
を示すブロック図。
第８図は第７図の実施例の外観斜視図、第９図はマイコ
ン回路を含めた場合の第７図の実施例の回路構成図であ
る。
図中、１．は双方向性サイリスタ、２は信号増幅回路、
３はゼロポルト検出Ｎ路、４は光−電気変換回路、４Ａ
は発光素子、４Ｂは受光素子、１はダイオード、１１は
リレー、１４Ａはファイバコネクタ、１４Ｂは可視光カ
ットフィルタ、１４Ｃは光フフイパ、２０は負荷、３ｏ
は交流電源である。なお、図中の同一符号は同一または
相当部分を示す。
代理人 葛 野 信 −（外１名）
第１図
第３図
第４図
３′
０
第５図
第６図
ｅ
第７図
第８図
第９図Figures 1, 2, and 3 (a) and (b) show conventional solid state relays, and Figure 1 shows the
Figure 2 is the circuit configuration diagram, Figure 3 (a),
(b) is an exterior front view and an exterior side view, FIG. 4 is a block diagram showing one embodiment of the present invention, FIG. FIG. 5 is an external perspective view showing the embodiment, and FIG. 7 is a block diagram showing still another embodiment of the present invention. 8 is an external perspective view of the embodiment shown in FIG. 7, and FIG. 9 is a circuit configuration diagram of the embodiment shown in FIG. 7 including a microcomputer circuit. In the figure, 1. is a bidirectional thyristor, 2 is a signal amplification circuit,
3 is zero port detection N path, 4 is optical-electrical conversion circuit, 4A
is a light emitting element, 4B is a light receiving element, 1 is a diode, 11 is a relay, 14A is a fiber connector, 14B is a visible light cut filter, 14C is an optical fiber, 20 is a load, 3o
is an AC power source. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Shin Kuzuno - (1 other person) Figure 1 Figure 3 Figure 4 Figure 3' 0 Figure 5 Figure 6e Figure 7 Figure 8 Figure 9
Claims (1)
を増幅する信号増幅回路と、この信号増幅回路の出力で
トリガされ負荷が接続される少なくとも２個の電気出力
端子を有するスイッチ素子と、光フアイバ信号の前記受
光素子への光入力端子とを共に設けてなるフォトトリガ
形ソリッドステートリレー。[Claims] An optical-to-electrical conversion circuit including an optical fiber and a light receiving element. a circuit for detecting zero voltage of an AC power supply, a signal amplification circuit for amplifying the outputs of both of these circuits, and a switch element having at least two electrical output terminals triggered by the output of the signal amplification circuit and connected to a load; A photo-trigger type solid state relay comprising an optical input terminal for transmitting an optical fiber signal to the light receiving element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56188587A JPS5890826A (en) | 1981-11-25 | 1981-11-25 | Photo trigger type solid-state relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56188587A JPS5890826A (en) | 1981-11-25 | 1981-11-25 | Photo trigger type solid-state relay |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5890826A true JPS5890826A (en) | 1983-05-30 |
Family
ID=16226276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56188587A Pending JPS5890826A (en) | 1981-11-25 | 1981-11-25 | Photo trigger type solid-state relay |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5890826A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6086862A (en) * | 1983-10-19 | 1985-05-16 | Hitachi Ltd | Photo-driven type semiconductor control rectifier |
| JPH02232571A (en) * | 1989-03-07 | 1990-09-14 | Showa Electric Wire & Cable Co Ltd | Monitor for cable and scanner for monitor |
-
1981
- 1981-11-25 JP JP56188587A patent/JPS5890826A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6086862A (en) * | 1983-10-19 | 1985-05-16 | Hitachi Ltd | Photo-driven type semiconductor control rectifier |
| JPH02232571A (en) * | 1989-03-07 | 1990-09-14 | Showa Electric Wire & Cable Co Ltd | Monitor for cable and scanner for monitor |
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