JPS5888932A - Logical integrated circuit - Google Patents

Abstract

PURPOSE:To decrease current consumption, by providing a constant current source controlling means for controlling the current in response to an input signal to a logical circuit consisting of a logical integrated circuit. CONSTITUTION:A constant voltage circuit 22 driving a base of a constant current transistor (TR) is connected to a current switching logic (CML) circuit 21. The circuit 22 is connected to an input terminal 24 via a control section circuit 23. The circuit 23 monitors the presence/absence of input at an input terminal 24 and when no input exists, the circuit 22 is controlled to interrupt the current to the circuit 21. Thus, an integrated circuit subjected to current consumption countermeasure can be attained without external switches and control terminals.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to logic integrated circuits, and more particularly to logic integrated circuits including current switching logic circuits.

Current switching type logic circuits (hereinafter referred to as OML circuits) are widely used as high-speed logic circuits.

As methods for configuring the running current source in this circuit, methods using a resistor and methods using a transistor are known. In devices that use a transistor, the base of the transistor is usually connected to the output of a constant voltage circuit and biased to a specific potential to obtain the constant current necessary to activate the OWL circuit. Due to the design of
Since it is possible to minimize the influence of fluctuations in temperature and power supply voltage on the output logic level of the OWL circuit, it has been used particularly frequently in recent years.

However, as is well known, %OML circuits have the disadvantage of high power consumption, and as integrated circuits have progressed in recent years, the degree of integration of these OML circuits has also increased, allowing for quite large and complex circuits to be integrated on the same chip. As it becomes possible to configure logic circuits, the question of how to reduce the power consumption of the circuits has become an important issue.

Conventionally, measures to reduce power consumption have been taken when the entire logic circuit is composed of individual 0M1 circuits having multiple functions, or when the OMLI circuit has a different function, such as TT.
When other circuits such as L circuits are mixed, only the 0M1 circuit with the necessary functions is activated, and OMIJ! with the unnecessary functions is operated. A method is used to reduce power consumption by not operating the J path.

For example, a frequency divider used in an AM/FM receiver aims to obtain an output by dividing a relatively high frequency FM signal into a low frequency that is easy to handle, and uses an OML@ path. In the case of AM/M reception that does not require a branching unit, it is common practice to turn off the power to the branching unit at the same time using an AM/PM changeover switch.

Furthermore, a method is known in which a terminal for power control is separately prepared and the terminal is logically controlled to reduce the constant current source current of the internal frequency dividing circuit to zero. (49 Kaisho 54-1483
61).

In this method, as shown in FIG. 1, in a 0M41i path using a transistor as a constant power source, the running current value is approximately expressed as (Vs-VBII)/R1 (where %vm;
The output voltage s V of the constant voltage circuit 3 with reference to the lowest potential vlII! II; constant current transistor Qs) base;
Forward voltage between Esetters, R1; Engineering Tsuta resistance. ) This takes advantage of the fact that if Va<Vmx, the constant current source current of the connected 0M1 circuit becomes zero, making the circuit inactive.

2'WA is a block diagram showing an example of a circuit using this. O with constant voltage power supplies 13 and 14 respectively
It is composed of ML circuits 11 and 12, and a constant voltage power supply 14 is connected to a selection control terminal 16 via a control circuit 15. Input signal I.

is directly input to the circuit 11, and the input signal (2) is input to the circuit 11 via the circuit 12, so that an output signal "ON" can be obtained. In this circuit, if the input signal is only III, circuit 12 is not necessary.

In that case, the selection control terminal 16 inputs the input signal ■.

The control circuit 15 is actuated by the control signal 8.1 and controls the output voltage of the constant voltage circuit 14 below VB1 of the constant current transistor as described above. The current source current is reduced to zero and is in an inactive state of 111K. In this way, according to this method, there is no need to provide an external changeover switch, and by selectively applying a control signal to the selection control terminal, any 0M
One circuit (a circuit driven by the same constant voltage circuit) can be rendered inactive. However, when considering integrated circuits, providing an extra terminal for a specific purpose such as one selection control terminal has a drawback in integrated circuits where the number of terminals is severely limited.

It is an object of the present invention to eliminate such drawbacks and to take measures to reduce power consumption by making it possible to control unnecessary logic circuits to an inactive state using only internal circuits without requiring any special external control terminals. Our goal is to provide garbage and logic integrated circuits.

The logic integrated circuit of the present invention is a logic integrated circuit including a plurality of logic circuit groups, wherein at least a part of the logic circuits is provided with a control means for controlling a power supply current of the cough logic circuit, and an input signal is input to the logic circuit. If there is an input signal, a normal power supply current flows, and if there is no input signal, the power supply current is reduced so that the cough logic circuit becomes inactive.

Further, in the circuit of the present invention, the logic circuit includes a current switching type logic circuit.

The present invention will be described in detail below with reference to the drawings.

FIG. 3 is a block diagram showing a circuit according to an embodiment of the present invention. A constant voltage circuit 22 for driving the pace of the first constant current transistor is connected to the OMLU path 21, and the constant voltage circuit 22 is further connected to the input terminal 24 via the control section circuit 23, so that the circuit of this embodiment is completed. ing. OML circuit 2
1 inputs the input signal ■□ from the input terminal 24 and sends out the output signal O□ to the output terminal 25. The control section circuit 23 and the constant voltage circuit 22 constitute a control means for controlling the constant current power supply current depending on the presence or absence of the input signal rtr.

FIG. 4 is a block diagram showing a circuit of a specific embodiment of this control means. A constant voltage circuit 22 and a rectifier circuit 26.
Reference voltage circuit 27. Voltage comparator 28° internal control circuit 29
The controller circuit 23 is composed of a controller circuit 23 consisting of: An input signal such as an FM signal from the input terminal 24 is rectified by the rectifier circuit 26 and becomes a DC voltage for voltage comparison 1528
The output of the result of comparison with the reference voltage from the reference voltage circuit 27 that is applied to one input terminal of the K so that the output is controlled. By the way, in this circuit, the input signal I! .

is given normally, the internal control circuit 29
The output circuit of is turned off, and therefore, the constant voltage circuit 22 to which its input is connected supplies a regular constant voltage to the OML circuit 21 so that the circuit is in a normal operating state, and there is no input signal IN. In this case, the voltage arrangement of each circuit of this control means is designed so that the output circuit of the internal control circuit 29 is turned on, and therefore the input of the constant voltage circuit 22 is short-circuited and its output voltage becomes zero. As a result, this 21
This OML circuit 21 is activated only when there is an input signal, and when there is no input signal, the circuit 21 is automatically rendered inactive by reducing the constant power supply current of the circuit 21 to zero. Become.

FIG. 5 shows a circuit of a more specific embodiment of the control means shown in FIG. 4. In the figure, 31 is a rectifier circuit, 32 is a voltage comparator, 33 is a reference voltage circuit, 34 is an internal control circuit, 35
3 is a constant voltage circuit, 36 is an input terminal of the rectifier circuit 310, and 37 is an output terminal of the constant voltage circuit 35.

First, input signal I3. Explain the behavior when is not given. In this case, the potential at point A is Vs - VD31, which is obtained by subtracting the voltage drop vD31 of the diode DBI from the appropriately applied bias voltage v8.
The reference voltage at point B is higher than the potential at point A by about 0.2 V or more.
(I/C1 close to GND potential) When set, the transistor Qss is turned off and the transistor Qsa is turned on.As a result, the potential at point O is ov(GND, ), and the amplitude at the point is V.
A voltage J is generated.

At this time, the potential at point I is the transistor Q3? Assuming the forward voltage between the base emitters and the VIIIQS master (VBHsy
-VJ) (Actually, it is clamped by the base-emitter forward voltage VBHms of the transistor Q, is.), and the transistor Qss is turned on. Therefore, since the potential at point r is forced to be approximately V1m potential, the output voltage vclI of the constant voltage circuit becomes Ov.

Next, when a sine wave signal such as an FM signal is applied to the input terminal 36 along with the input signal ys+, the (G) side of the sine wave is connected to the diode D1. Since half-wave rectification is performed by the capacitor C1, the potential at point A becomes higher than the reference voltage at point B, transistor Qss is turned on, and transistor Qmi is turned off. As a result, the potential at point I is (V!1IQB7-V
j), and the transistor Qsa is turned off, so that the constant voltage circuit 35 operates normally, and the output voltage VCI having the specified value is output from the output terminal 3. Further, the circuit of this embodiment can easily be integrated on the same chip as the OML circuit. Of course, it is possible to perform the same operation using other types of circuits.

As explained above, according to the circuit of this embodiment, the output voltage of the constant voltage circuit is automatically controlled depending on the presence or absence of an input signal, and the constant current source current of the lloL circuit is reduced to zero only when there is no input signal. The IOL circuit can be rendered inactive. Therefore, if this is applied to a circuit such as a frequency divider used in the aforementioned AM/FM receiver,
Since there is no need for an external changeover switch or a special selection control terminal as in the past, a circuit that can be easily integrated on a single chip can be obtained.

Note that the explanation so far has mainly focused on OML as a logic circuit.
Although the circuit has been described for the case where the number of circuit blocks is one, the gist of the present invention is not limited to this in any way.
, it goes without saying that the present invention can be applied to other logic circuits other than OML circuits and a plurality of logic circuit groups.

As explained in detail above, the logic integrated circuit of the present invention is provided with a means for controlling the constant current source current of the logic circuit, and when there is an input signal to the logic circuit, a normal power supply current is caused to flow, and when the input signal is If not, the power supply current can be reduced to make this logic circuit inactive, so there is no need to provide an external selector switch or a special selection control terminal as in the past. Therefore, it is possible to provide a logic integrated circuit that can be easily integrated and has measures taken to reduce power consumption, which is highly effective.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a typical 0M1 circuit, Figure 2 is a block diagram of an OWL circuit that takes measures to reduce power consumption in a conventional example, and Figure 3 shows measures to reduce power consumption in an embodiment of the company's invention. 4 is a block diagram of the 0M1 circuit that has been applied, FIG. 4 is a block diagram showing an embodiment of the control means in FIG. 3, and FIG. 5 is a circuit diagram showing an embodiment of the more specific circuit of FIG. 4. It is a diagram. 1.17.18, 24.36... Input terminal, 2
゜2', 19, 25.37...''・Output terminal%3
．． 13゜14.22.35... Constant voltage circuit, 1
1,12゜21...0M1 circuit, 15...
...Control circuit, 16...°"° selection control terminal, 23.
...Control section circuit, 26°31... Rectifier circuit s 27.33... Open reference voltage circuit, 28.32...
...Voltage comparator, 29.34...Internal control circuit, Q1~Qs, Q□~Q4゜...Transistor, DI, D1°°°°゛°diode, R.C.
R1,R,,~R4,-...Resistance,]l□~XS
m... constant current source % ass... capacitance, Ill
+ l1ly III + III """ input signal, 011 + 011"'・°°output signal, S, 1...
...Selection control signal, Vll+vcc...
power supply. Koshirae 3 Figure 3 Figure 4

Claims (2)

[Claims] (1) In a logic integrated circuit including a plurality of logic circuit groups, at least a part of the logic circuits is provided with a control means for controlling the power supply current of the logic circuit, and when the logic circuit has an input signal, it is normal. 1. A logic integrated circuit, characterized in that the power supply current is allowed to flow, and the power supply current can be reduced when there is no input signal so that the mosquito logic circuit is rendered inactive. (2) The logic integrated circuit according to claim (1), wherein the logic circuit includes a current switching type logic circuit.