JPS5880716A - Reference voltage circuit - Google Patents

Reference voltage circuit

Info

Publication number
JPS5880716A
JPS5880716A JP17929381A JP17929381A JPS5880716A JP S5880716 A JPS5880716 A JP S5880716A JP 17929381 A JP17929381 A JP 17929381A JP 17929381 A JP17929381 A JP 17929381A JP S5880716 A JPS5880716 A JP S5880716A
Authority
JP
Japan
Prior art keywords
transistor
terminal
voltage
reference voltage
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17929381A
Other languages
Japanese (ja)
Other versions
JPH0461368B2 (en
Inventor
Masashi Shoji
庄司 正志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP17929381A priority Critical patent/JPS5880716A/en
Publication of JPS5880716A publication Critical patent/JPS5880716A/en
Publication of JPH0461368B2 publication Critical patent/JPH0461368B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Abstract

PURPOSE:To ensure the designing flexibility and to obtain the reference voltage of a low noise level, by providing a current supply circuit connected in series to a transistor between a power supply terminal and an earth terminal in addition to a prescribed current supply circuit and therefore setting the reference voltage and the temperature coefficient independently of each other. CONSTITUTION:A power supply terminal 11 is connected to a reference voltage output terminal 14 via a current supply circuit 13, and an end of each of resistances 15 and 16 is connected to the terminal 14. At the same time, the collector of a transistor TR23 is connected to the terminal 14. The other end of the resistance 15 is connected to the collector of a TR17, and the base of the resistance 15 is connected to the base of a TR18. The emitters of the TRs 17 and 18 are connected to an earth terminal 24 directly via a resistance 19 respectively. At the same time, the other end of the resistance 16 is connected to the emitter of the TR18 and to the base of a TR20, and the emitter of the TR20 is connected to the terminal 11 via a current supply circuit 12. Then the base of the TR23 is connected to the joint between a circuit 12 and the TR20 via a resistance R21. The emitter of the TR23 and a resistance 22 connected to a resistance 21 are connected to the terminal 24. Thus the reference voltage and the temperature coefficient are set independently of each other.

Description

【発明の詳細な説明】 本発明は半導体集積回路に用いられる定電圧源として最
適な基準電圧回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reference voltage circuit most suitable as a constant voltage source used in a semiconductor integrated circuit.

従来、半導体集積回路の基準電圧源としては、一般にツ
ェナーダイオードの降伏電圧やダイオードの順方向電圧
を利用している。前者は約5■以上の基準電圧を得るの
に広く用いられていZ〕。しかしこの場合、半導体集積
回路の製造十のプロセスでツェナーダイメートの降伏′
電圧が法定され、このため約5v以下の低電圧の降伏血
圧をもつツェナーダイオードを半導体集積回路に作り込
む場合にはvrたに伺加的な製迅工程か必要となる為に
コストの上列を1わく。しかも、ツェナー劃1jその特
性上ノイズ電圧が太きいなどの次点がtp、2・。
Conventionally, the breakdown voltage of a Zener diode or the forward voltage of a diode is generally used as a reference voltage source for a semiconductor integrated circuit. The former is widely used to obtain a reference voltage of about 5cm or higher. However, in this case, the breakdown of Zener dimer during the manufacturing process of semiconductor integrated circuits is
The voltage is regulated by law, and therefore, when building a Zener diode with a low voltage breakdown voltage of about 5V or less into a semiconductor integrated circuit, an additional manufacturing process is required, which increases the cost. Make 1. Moreover, the runner-up is tp, 2, which has a large noise voltage due to its characteristics.

又、拶者は低電圧¥Lイυるには便;fiIf?:が、
その温度係数は−2/℃〜−47℃と大きい欠小がある
Also, the presenter is a convenience to low voltage ¥L υ; fiIf? :but,
The temperature coefficient is -2/°C to -47°C, which is a large deficiency.

上述した点に鑑み出力′に斤の温度係数を零にL1半導
体集槓回路に適した基準電圧回が15としてバンドギャ
プレギュレークによる定電圧回路が幾つか提案されてい
る。この定電圧回路は電流密度の異なるトランジスタの
ベース・エミッタ間順方向電圧の温度係数が異なること
を利用したものであって、その具体的回路構成の一例を
第1図に示して説明する。
In view of the above points, several constant voltage circuits using a bandgap regulator have been proposed in which the temperature coefficient of output is zero and the reference voltage circuit is set to 15, which is suitable for the L1 semiconductor integrated circuit. This constant voltage circuit utilizes the fact that transistors having different current densities have different temperature coefficients of forward voltages between bases and emitters, and an example of a specific circuit configuration will be described with reference to FIG.

第1図において、電源端子1は電流供給回路2を介して
基準電圧出力端子3へ結合されてお)、基準電圧出力端
子3からは抵抗4および抵抗5のそれぞれの一端と、さ
らにトランジスタ9のコレクタへ各々接続がなされてい
る。抵抗4の他端はトランジスタ6のコレクタとベース
との共通接続点に接続されていると共に、トランジスタ
7のベースへ接続されている。抵抗5の他端はトランジ
スタ7のコレクタへ接続され、さらにトランジスタ9の
ベースへも接続されている。トランジスタ6および9の
エミッタは直接に、トランジスタ7のエミッタは抵抗8
を介して接地端子10へそれぞれ接続されている。ここ
で電流供給回路2は、例えばt流諒あるいは電圧源と抵
抗とで構成される。又、この回路は半導体集積回路で作
られるため、上記各素子は同一の接合温度で動作してお
り、しかも各抵抗4.5および8の抵抗値の相対比は正
確にとりつる。
In FIG. 1, a power supply terminal 1 is coupled to a reference voltage output terminal 3 via a current supply circuit 2), and the reference voltage output terminal 3 is connected to one end of each of a resistor 4 and a resistor 5, and further to a transistor 9. A connection is made to each collector. The other end of the resistor 4 is connected to a common connection point between the collector and base of the transistor 6, and is also connected to the base of the transistor 7. The other end of the resistor 5 is connected to the collector of the transistor 7 and further connected to the base of the transistor 9. The emitters of transistors 6 and 9 are connected directly, and the emitter of transistor 7 is connected directly to resistor 8.
are respectively connected to the ground terminal 10 via. Here, the current supply circuit 2 is composed of, for example, a current or voltage source and a resistor. Further, since this circuit is made of a semiconductor integrated circuit, each of the above elements operates at the same junction temperature, and the relative ratio of the resistance values of the resistors 4.5 and 8 is accurately determined.

この回路によるときは、トランジスタ6とトランジスタ
7の各々のベース・エミッタ間順方向電圧VBE6%V
BE7 cD差’を圧△VBg(=Vngs−VBB7
)を用いて、基準電圧出力端子3の゛′亀圧’btEp
”4俵わすと(1)式となる。
When using this circuit, the base-emitter forward voltage VBE of each of transistor 6 and transistor 7 is 6%V.
BE7 cD difference' is pressure △VBg (=Vngs-VBB7
) to determine the ``torque pressure''btEp of the reference voltage output terminal 3.
``If you add 4 bales, you get equation (1).

ただし R6:抵抗5の抵抗値 R8m抵抗8の抵抗値 ■BE9:トランジスタ9のベース−エミッタ間順方向
電圧 (1)式にて、△VBKの温度係数はトランジスタ6お
よび7に流れる電流■6および17がl5)I7の条件
の下では正となシ、一方VBE9は負の温度係数を有す
るので、VREFの温度係数はs R6/Raを適切に
選ぶことによって零にすることができる。
However, R6: Resistance value of resistor 5 R8m Resistance value of resistor 8 BE9: Base-emitter forward voltage of transistor 9 In equation (1), the temperature coefficient of △VBK is the current flowing through transistors 6 and 7. 17 is positive under the conditions of I5)I7, while VBE9 has a negative temperature coefficient, so the temperature coefficient of VREF can be made zero by appropriately choosing sR6/Ra.

5− しかしながら、この回路では、温度係数が零に々るのは
一定の値の基準電圧値についてのみ〒ある。
5- However, in this circuit, the temperature coefficient approaches zero only for constant reference voltage values.

fLjtば、トランジスタ6.7,9として同じ特性の
トランジスタを使用し、抵抗4の抵抗値R4にΩ =600  、抵抗5の抵抗値Rfi=6  とし、絶
対温度T= 300K  でのVBBgを0.65 V
 、VIIE9の温度係数を−27℃ とした回路につ
いて、抵抗8の抵抗値R8を変えて絶対温度300″に
付近の基準電圧VREF及びその温度係数α■REF/
αTを求めたのが第2図である。
For fLjt, transistors with the same characteristics are used as transistors 6, 7 and 9, the resistance value R4 of resistor 4 is set to Ω = 600, the resistance value of resistor 5 is set to Rfi = 6, and VBBg at absolute temperature T = 300K is set to 0. 65V
, for a circuit where the temperature coefficient of VIIE9 is -27°C, by changing the resistance value R8 of resistor 8, the reference voltage VREF and its temperature coefficient α REF /
Figure 2 shows the calculation of αT.

第2図から明らかなようにR4=600 、VREF”
1.25vではαV RE F、/(Xi’は零となシ
、1.25Vより高い基準電圧については、正の温度係
数s  1.25vよシ低い基準電圧に・ついては負の
温度係数を有している。温度係数が零となる一定の基準
電圧は、半導体集積回路の製造プロセスの違いによジV
BKGおよび、その温度係数が異なるため少しは違って
くるがほぼ12〜1.3vの間の値となる。
As is clear from Figure 2, R4=600, VREF”
At 1.25V, αV RE F,/(Xi' is zero. For reference voltages higher than 1.25V, it has a positive temperature coefficient s. For reference voltages lower than 1.25V, it has a negative temperature coefficient. The constant reference voltage at which the temperature coefficient becomes zero varies depending on the manufacturing process of semiconductor integrated circuits.
Since the BKG and its temperature coefficient are different, the value will be slightly different, but the value will be approximately between 12 and 1.3V.

以上説明したように、従来のバンドギップレギ6− ュレータによれば、温度に対して安定々基準電圧は約1
2〜1.3vと々す、温度依存性のない安定な基準電圧
が広範囲に得られない。この事が設計上大きな制約とな
る欠点があった。
As explained above, according to the conventional bandgap regulator, the reference voltage is stable at about 1 with respect to temperature.
A stable reference voltage of 2 to 1.3 V, which is independent of temperature, cannot be obtained over a wide range. This has the disadvantage of being a major design constraint.

本発明の目的は、上述したような欠点をなくして、広範
囲にわたって安定した基準電圧を供給する半導体集積回
路に適した基準電圧回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a reference voltage circuit suitable for a semiconductor integrated circuit that supplies a stable reference voltage over a wide range, without the above-mentioned drawbacks.

本発明の他の目的は、出力電圧とその温度係数とを任意
に設定できる基準電圧回路を提1(することにある。
Another object of the present invention is to provide a reference voltage circuit that can arbitrarily set the output voltage and its temperature coefficient.

本発明によれば、電源端子と、その電源端子に第1の電
流源を介して結合された出力端子と、その出力端子と接
地端子間に接続された第1の抵抗と定電圧手段との第1
の直列回路と、この第1の直列回路に並列に接続された
第2の抵抗と第1のトランジスタと第2の抵抗との第2
の自効N路と、第2の抵抗と第1のトランジスタとの接
続点にベースが接続され、ニオツタが第2の電流源を介
して電源端子に接続されると共に、第4および第5の抵
抗を介して接地端子に接続さね、コレクタが接地端子に
接続された第2のトランジスタと、第4および第5の抵
抗の接続点にベースが接続1され、コレクタ・エミッタ
電流通路が第1の電流源と接地端子との間に挿入された
第3のトランジスタとを有することを特徴とする基準電
圧回路を得る。
According to the present invention, a power supply terminal, an output terminal coupled to the power supply terminal via the first current source, a first resistor and a constant voltage means connected between the output terminal and the ground terminal. 1st
a series circuit, a second resistor connected in parallel to the first series circuit, a second resistor, a first transistor, and a second resistor.
The base is connected to the self-effect N path and the connection point between the second resistor and the first transistor, and the base is connected to the power supply terminal via the second current source, and the fourth and fifth A second transistor is connected to the ground terminal via a resistor, and the collector is connected to the ground terminal, and the base is connected to the connection point between the fourth and fifth resistors, and the collector-emitter current path is connected to the first transistor. and a third transistor inserted between the current source and the ground terminal.

以下、本発明の実施例につき図面を参照して畦細に説明
する。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第3図は本発明の一実施例を示す基準電圧回路の回路図
である。第3図において、電源端子11は電流・供給回
路13を介して基準電圧出力端子14へ結合されており
、基準電圧出力端子14からは抵抗15および抵抗16
のそれぞれ一端と、さらにトランジスタ23のコレクタ
へ各々接続がなされている。抵抗15の他端はトランジ
スタ17のコレクタとベースとの共通接続点に接続され
て因ると共にトランジスタ18のベースへ接続されてい
る。抵抗16の他端はトランジスタ18のコレクタおよ
びトランジスタ2oのベースへ接続されている。トラン
ジスタ20のエミッタは′に流供給回路12を介して電
源端子11へ接続されると共に直列接続された抵抗21
.22を介して接地端子24へ接続されている。抵抗2
1および22の共通接続点はトランジスタ23のベース
へ接続されておシ、トランジスタ17.23のエミッタ
およびトランジスタ20のコレクタは1自接にトランジ
スタ18のエミッタは抵抗19を介して接地端子24へ
それぞれ接続されている。ここで、xi供給回路12お
よび13は、例えばw、流諒あるいは電圧源と抵抗とで
構成される。メ、この回路は半導体集積回路で作られる
ため、上記%素子は同一の接合温度で動作しておシ、し
かも各抵抗15.16.19.21および22の抵抗値
の相対比は正確にとシうる。
FIG. 3 is a circuit diagram of a reference voltage circuit showing one embodiment of the present invention. In FIG. 3, power supply terminal 11 is coupled to reference voltage output terminal 14 via current/supply circuit 13, and from reference voltage output terminal 14 there are resistors 15 and 16.
are connected to one end of each of the transistors 23 and to the collector of the transistor 23. The other end of the resistor 15 is connected to a common connection point between the collector and base of the transistor 17, and is also connected to the base of the transistor 18. The other end of resistor 16 is connected to the collector of transistor 18 and the base of transistor 2o. The emitter of the transistor 20 is connected to the power supply terminal 11 through the current supply circuit 12 and a resistor 21 connected in series.
.. 22 to a ground terminal 24. resistance 2
The common connection point of transistors 1 and 22 is connected to the base of transistor 23, and the emitters of transistors 17 and 23 and the collector of transistor 20 are connected to the 1 self, and the emitter of transistor 18 is connected to ground terminal 24 through resistor 19, respectively. It is connected. Here, the xi supply circuits 12 and 13 are composed of, for example, a voltage source and a resistor. Me, since this circuit is made with a semiconductor integrated circuit, the above % elements operate at the same junction temperature, and the relative ratio of the resistance values of each resistor 15, 16, 19, 21 and 22 is not accurate. I can do it.

かかる基準電圧回路は上記のような構成となっているた
め、基準電圧端子14の電圧VREFは(2)式のよう
に表わされる。
Since this reference voltage circuit has the above-described configuration, the voltage VREF at the reference voltage terminal 14 is expressed as in equation (2).

ただし 9− Rl6 :抵抗16の抵抗値 R1,:抵抗19の抵抗値 R21: 抵抗21の抵抗値 R22:抵抗22の抵抗値 △VBE  :  )7ンジスタ17のベース・エミッ
タ間順方向電圧とトランジスタ 18のベース・エミッタ間順方向 電圧との差電圧 vng2o;  )ランジスタ20のベース・エミッタ
間順方向電圧 VBE23:  )ランジスタ23のベース・エミッタ
間順方向電圧 ここでトランジスタ20とトランジスタ23とは異極性
のトランジスタのため半導体集積回路上で同一特性とす
るのは紬しい而もあるが、各々のトランジスタのベース
・エミッタ間接合面積を適切に選ぶことにより、各々の
ベース・エミッタ間順方向電圧をほぼ揃えることができ
るので(2)式は次の(8)式の様に近似できる。
However, 9- Rl6 : Resistance value R1 of resistor 16, : Resistance value R21 of resistor 19 : Resistance value R22 of resistor 21 : Resistance value of resistor 22 △VBE : ) 7 Forward voltage between base and emitter of transistor 17 and transistor 18 The difference voltage between the base and emitter forward voltage of transistor 20 is VNG2o; ) The base-emitter forward voltage of transistor 20 is VBE23; ) The base-emitter forward voltage of transistor 23 is Although it is difficult to maintain the same characteristics on a semiconductor integrated circuit due to transistors, by appropriately selecting the base-emitter junction area of each transistor, the forward voltage between each base-emitter can be made almost the same. Therefore, equation (2) can be approximated as shown in equation (8) below.

10− (8)式にて、△VBEの温度係数はトランジスタ17
および18に流れる電流117および118が117〉
118の条件の下では正吉なシ、一方vnE2gは負の
温度係数を有する。
10- In equation (8), the temperature coefficient of △VBE is the transistor 17
and the currents 117 and 118 flowing through 18 are 117〉
Under the condition of 118, it is positive, while vnE2g has a negative temperature coefficient.

この(8)式から、抵抗比R16/R,19および1も
21/R22を適切に設定することによって、基準電圧
出力端子14の電圧VREFの電圧と温度係数とをそれ
ぞれ別々に設定できるととがわかる。
From this equation (8), it is possible to set the voltage and temperature coefficient of the voltage VREF of the reference voltage output terminal 14 separately by appropriately setting the resistance ratios R16/R, 19 and 21/R22. I understand.

すなわち、前述した如く、第1図の基準電、圧v、E 
1?は(1)式で表わされVREFの温度係数は抵抗比
1t5/R9を調整することによシ、ある一定の値の基
f電圧値のみで零となるのに対して、(3)式では、(
8)式および(1)式の右辺の第1項を同等となるよう
設定すれば、第2項の温度係数は負の温度係数をもつV
BE211の抵抗比R2L/kL22倍となt) IL
z l/1jz 2の調整によシ任意の温度係数をイ好
る事が出来る。
That is, as mentioned above, the reference voltage, voltage v, E in FIG.
1? is expressed by equation (1), and the temperature coefficient of VREF becomes zero only at a certain constant value of the base f voltage by adjusting the resistance ratio 1t5/R9, whereas equation (3) So, (
If the first term on the right-hand side of equation (8) and equation (1) are set to be equivalent, the temperature coefficient of the second term is V, which has a negative temperature coefficient.
The resistance ratio of BE211 is R2L/kL22 times) IL
By adjusting zl/1jz2, any temperature coefficient can be preferred.

これは(8)式のVRIEFの温度係数は、抵抗比1′
L21/R22> 1  と設定することによシ負とな
シ、父、抵抗比R21/R22<1 と設定することに
よp正となる。
This means that the temperature coefficient of VRIEF in equation (8) is the resistance ratio 1'
By setting L21/R22>1, it becomes negative, and by setting the resistance ratio R21/R22<1, it becomes positive.

よって、抵抗比)L 2 t/R22を調整する事によ
シ任意の基準電圧においてその温度係数を零とすること
ができる。
Therefore, by adjusting the resistance ratio L2t/R22, the temperature coefficient can be made zero at any reference voltage.

従っで、第3図の基準電圧回路を使用すれば、その温紘
係数を零とする基準電EEは、抵抗比几21/R22”
 1の時1.25 V以上を南し、又、抵抗比1(21
/R22と10時1.25 v以下を有する別電圧回路
を容易に実現できる。このように、温に係数が零となる
基準電圧は促米例に訃い−Cはある一足の基準電圧値に
決壕ってしまうものが、本実施例では任意の基′$電圧
値を得られる。
Therefore, if the reference voltage circuit shown in Fig. 3 is used, the reference voltage EE whose thermal coefficient is zero will have a resistance ratio of 21/R22''.
1, the voltage exceeds 1.25 V, and the resistance ratio is 1 (21
/R22 and a separate voltage circuit having 1.25 V or less at 10 o'clock can be easily realized. In this way, a reference voltage with a temperature coefficient of zero is undesirable in the example, and -C is fixed at a certain reference voltage value, but in this example, an arbitrary base voltage value can be used. can get.

第4図は、R3図の実施例を恭にした出力電圧1■の定
電圧発生回路の実施例である。
FIG. 4 shows an embodiment of a constant voltage generating circuit with an output voltage of 1.times., which is based on the embodiment shown in FIG. R3.

第4図では、第3図の実施例と同一のものは同一符号を
用いておシ、ここでは第3図との相違点についてルLl
lII4する。第4図において、抵抗31.34.37
.38,40,42.ダイオード32.33% トラン
ジスタ35.36%  39.41%43、は定電流源
を構成しておシカトランジスタ39.41.43のコレ
クタよシそれぞれ電流供給される。トランジスタ41の
コレクタはトランジスタ20と抵抗21の共通接続点に
接続され、トランジスタ43のコレクタはトランジスタ
23のコレクタに接続されると共にトランジスタ440
ベースに接続されている。トランジスタ44は、レギュ
レーションを良好にする為に負帰還をかけられた電流増
巾用トランジスタとして作用する。基準電圧出力端子1
4は抵抗15を通してトランジスタ450ベースおよび
トランジスタ48のコレクタに接続されておりトランジ
スタ45のエミッタハトランジスタ39のコレクタおよ
び抵抗46と47の直列回路を通して接地端子24に接
続されている。抵抗46.47の共通接続点にはトラン
ジスタ48および18のベースが接続されておシトラン
ジスタ45のコレクタ、トランジスタ48のエミッタは
接地端子24に接続されている。コンデンサ49は、発
振防止用コンデンサである。
In FIG. 4, parts that are the same as those in the embodiment in FIG. 3 are designated by the same reference numerals.
lII4. In Figure 4, resistance 31.34.37
.. 38, 40, 42. The diode 32.33%, the transistor 35.36%, and the 39.41% 43 constitute a constant current source, and current is supplied to the collectors of the deer transistors 39, 41, and 43, respectively. The collector of the transistor 41 is connected to the common connection point of the transistor 20 and the resistor 21, and the collector of the transistor 43 is connected to the collector of the transistor 23 and the transistor 440.
connected to the base. The transistor 44 acts as a current amplification transistor to which negative feedback is applied in order to improve regulation. Reference voltage output terminal 1
4 is connected to the base of transistor 450 and the collector of transistor 48 through resistor 15, and the emitter of transistor 45 is connected to the ground terminal 24 through the collector of transistor 39 and a series circuit of resistors 46 and 47. The bases of transistors 48 and 18 are connected to the common connection point of resistors 46 and 47, and the collector of transistor 45 and the emitter of transistor 48 are connected to ground terminal 24. Capacitor 49 is an oscillation prevention capacitor.

トランジスタ39の定電流供給通路、トランジスタ45
、抵抗46.47からなる回路は、抵抗15および16
の両端間電圧がほぼ尋しくなる様に動 13− 作点を設定する為に設けられている。
Constant current supply path of transistor 39, transistor 45
, resistors 46, 47, resistors 15 and 16
13- It is provided to set the operating point so that the voltage across the terminal is approximately the same.

かかる定電圧発生回路の基準電圧出力端子14の電圧V
REFは第3図の場合と同等前述した(8)式のように
なる。ここでトランジスタ48およびトランジスタ18
のベース会エミッタ間順方向電圧ジスタ48のベース拳
エミッタ間接合面積に対するトランジスタ17のそれの
割合Nで表わされるから次の(4)式のように表わされ
る。
The voltage V at the reference voltage output terminal 14 of this constant voltage generation circuit
REF is equivalent to the case of FIG. 3 and is expressed by the above-mentioned equation (8). Here, transistor 48 and transistor 18
Since the base-to-emitter forward voltage is expressed as the ratio N of the base-to-emitter junction area of the transistor 17 to the base-to-emitter junction area of the transistor 48, it can be expressed as the following equation (4).

(タタシ、vTは熱電圧でvT−KV′e)ここで第4
図の各抵抗の抵抗値をRの記号の添字に対応して R31=50” Ω Rs 4=Ra 11=R40=R42=100R37
=800゜ R46”421:2kQ R47”’几22=2.5に0 14− J5=6000 )1.16=6krl ■も□ 9 = 7500 とし、又、N22と選定ずれはトランパンスタ23のベ
ース・エミッタ間電圧VBE23の代表的な値は’1’
 = 300°K で0.65 Vであるので(4)式
J:すVIEF=lv となる。叩ぢ、基準電圧出力端子14には温度係数が零
で出力電圧1vの基準電圧が得られる、以上観明したよ
うに、本発明によれば半導体集積回路化に適した回路構
成の基準電圧回路が得られ、基準電圧とその温糺係数を
独立に設定できる利点があるため設置上の自由度を大き
くとれる。
(Tatashi, vT is the thermal voltage vT - KV'e) Here, the fourth
The resistance value of each resistor in the diagram corresponds to the subscript of the R symbol: R31=50" Ω Rs 4=Ra 11=R40=R42=100R37
=800゜R46''421:2kQ R47'''几22 = 2.5 to 0 14- J5 = 6000 ) 1.16 = 6krl ■ Also □ 9 = 7500, and the difference in selection with N22 is the base of Trumpan Star 23. The typical value of emitter voltage VBE23 is '1'
= 0.65 V at 300°K, so the formula (4) is: VIEF=lv. Finally, a reference voltage with a temperature coefficient of zero and an output voltage of 1 V can be obtained at the reference voltage output terminal 14.As has been observed above, the present invention provides a reference voltage circuit with a circuit configuration suitable for semiconductor integrated circuits. This has the advantage that the reference voltage and its thermal coefficient can be set independently, allowing for a greater degree of freedom in installation.

特に、ダイオードの1一方向電圧と同程度あるいはそれ
以下の任意の電圧の高安定な基準電圧回路が得られる。
In particular, a highly stable reference voltage circuit with an arbitrary voltage comparable to or lower than the one-way voltage of the diode can be obtained.

又、ツェナーダイオードを用いないので低雑音の基準電
、圧がイ0られる利点がある。
Furthermore, since no Zener diode is used, there is an advantage that a low-noise reference voltage is eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来のパン)・ギャグレギーレータの1例を
示す回路図、第2凶は第1図の回路の抵抗値R8を変え
た部会の基準電圧とその温度係数を示す特性図、第3図
は本発明の一実施例を示す遁阜知,圧回路図、第4図は
本発明の基準1=、圧N路を応用した定電圧回路図であ
る。 1、1l・・・・・・電源端子、2、12,13・・・
゜゛電流供給回路、3,14・・・・・・基準電圧出力
端子、10、24・・・・・・接地端子、4、5、8、
15、i6,19、21、22、31,34、37,3
8,40,42、46、47・・・・・・抵抗、6, 
 7,  9、1γ、18、20、23、36、35、
39,41,43,44、45、4B・・・・・・トラ
ンジスタ,32、33・・・・・・ダイオード、49・
・・・・・コンデンサ。
Fig. 1 is a circuit diagram showing an example of a conventional pan)/gag regulator, and Fig. 2 is a characteristic diagram showing the reference voltage and its temperature coefficient of the circuit of Fig. 1 with different resistance value R8. FIG. 3 is a constant voltage circuit diagram showing an embodiment of the present invention, and FIG. 4 is a constant voltage circuit diagram applying the standard 1=pressure N path of the present invention. 1, 1l...Power terminal, 2, 12, 13...
゜゛Current supply circuit, 3, 14...Reference voltage output terminal, 10, 24...Ground terminal, 4, 5, 8,
15, i6, 19, 21, 22, 31, 34, 37, 3
8, 40, 42, 46, 47...Resistance, 6,
7, 9, 1γ, 18, 20, 23, 36, 35,
39, 41, 43, 44, 45, 4B...transistor, 32, 33...diode, 49.
...Capacitor.

Claims (2)

【特許請求の範囲】[Claims] (1)第1の電圧端子と、該第1の電圧端子に第1の電
流供給手段を介して結合された出力端子と該出力端子に
第1の抵抗およびダイオード接続された第1のトランジ
スタとを含む第1の直列回路を介して接続された第2の
電圧端子と、該第1のトランジスタのベースにベースが
接続され、コレクタおよびエミッタが第2および第3の
抵抗を介して前日ピ出力端子と前記第2の電圧端子とに
それぞれ接続された第2のトランジスタと、該第2のト
ランジスタのコレクタにベースが接続され、エミッタが
第2の電流供給手段を介して前記第10′亀圧端子に接
続され、コレクタが前記第2の電圧端子に接続された第
3のトランジスタと、直列に接続され、一端が前記第3
のトランジスタのエミッタに他端が前記第2の電圧端子
にそれぞれ接続された第4、第5の抵抗と、該第4、M
5の抵抗の接続点にベースが接続され、コレクタ・エミ
ッタ間の電流通路が前記第1の電流供給手段と前記第2
の電圧端子との101に挿入された第4のトランジスタ
とを含み、前記出力端子と前記第2の゛電圧端子間よシ
基早′屯圧を出力するようにしたことを特徴とする基準
電圧回路。
(1) a first voltage terminal; an output terminal coupled to the first voltage terminal via a first current supply means; a first resistor and a first transistor connected to the output terminal; a second voltage terminal connected to the base of the first transistor through a first series circuit including a second voltage terminal; a second transistor connected to the terminal and the second voltage terminal, respectively; a base is connected to the collector of the second transistor; and an emitter is connected to the 10' voltage via a second current supply means. A third transistor is connected in series with a third transistor whose collector is connected to the second voltage terminal and whose one end is connected to the third voltage terminal.
fourth and fifth resistors whose other ends are respectively connected to the emitter of the transistor and the second voltage terminal;
The base is connected to the connection point of the resistor No. 5, and the collector-emitter current path is connected to the first current supply means and the second current supply means.
a fourth transistor inserted at 101 and a voltage terminal, and is configured to output a fundamental pressure between the output terminal and the second voltage terminal. circuit.
(2)前記第1の抵抗と前記第1のトランジスタのコレ
クタの共通接続点にベースが接続され、エミッタが第3
のt流供給手段を介して前記kIJlの電圧端子に接続
され、コレクタがiσ記第2の電圧端子に接続された第
5のトランジスタと、直列に接続され、一端が前記第5
のトランジスタのエミッタに他端が前記第2の電圧端子
にそれぞれ接続された第6、第7の抵抗と、該第6第7
の抵抗の接続点に前記第1のトランジスタのベースを接
続したことを特徴とする特許H1・1氷の範囲第1項記
載の基準電圧回路。
(2) The base is connected to a common connection point between the first resistor and the collector of the first transistor, and the emitter is connected to the third transistor.
is connected in series with a fifth transistor whose collector is connected to the second voltage terminal of iσ, and one end of which is connected to the voltage terminal of kIJl through the second voltage terminal of iσ.
sixth and seventh resistors whose other ends are respectively connected to the emitter of the transistor and the second voltage terminal;
1. The reference voltage circuit according to item 1 of Patent H1.1, characterized in that the base of the first transistor is connected to the connection point of the resistor.
JP17929381A 1981-11-09 1981-11-09 Reference voltage circuit Granted JPS5880716A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17929381A JPS5880716A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17929381A JPS5880716A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Publications (2)

Publication Number Publication Date
JPS5880716A true JPS5880716A (en) 1983-05-14
JPH0461368B2 JPH0461368B2 (en) 1992-09-30

Family

ID=16063286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17929381A Granted JPS5880716A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Country Status (1)

Country Link
JP (1) JPS5880716A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0450830A2 (en) * 1990-03-30 1991-10-09 Texas Instruments Incorporated Voltage reference having steep temperature coefficient and method of operation
US6710586B2 (en) 2001-11-22 2004-03-23 Denso Corporation Band gap reference voltage circuit for outputting constant output voltage
JP2007514988A (en) * 2003-10-07 2007-06-07 アナログ・デバイシス・インコーポレーテッド Method and apparatus for compensating temperature drift in semiconductor processes and semiconductor circuits

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473254A (en) * 1977-11-25 1979-06-12 Toshiba Corp Constant-voltage circuit
JPS567118A (en) * 1979-06-29 1981-01-24 Hitachi Ltd Stabilizing electric power circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473254A (en) * 1977-11-25 1979-06-12 Toshiba Corp Constant-voltage circuit
JPS567118A (en) * 1979-06-29 1981-01-24 Hitachi Ltd Stabilizing electric power circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0450830A2 (en) * 1990-03-30 1991-10-09 Texas Instruments Incorporated Voltage reference having steep temperature coefficient and method of operation
US6710586B2 (en) 2001-11-22 2004-03-23 Denso Corporation Band gap reference voltage circuit for outputting constant output voltage
JP2007514988A (en) * 2003-10-07 2007-06-07 アナログ・デバイシス・インコーポレーテッド Method and apparatus for compensating temperature drift in semiconductor processes and semiconductor circuits

Also Published As

Publication number Publication date
JPH0461368B2 (en) 1992-09-30

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