JPS5875841A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable to sufficiently set an insulating distance by removing the metal layer of the back surface of a wafer without chemical etching, thereby completely removing part of the metal layer. CONSTITUTION:An etching groove 19 of V-shaped section is formed from the back surface of a wafer base 13 side in the wafer already formed of an N-P-N transistor with a collector layer 14, a base layer 15 and an emitter layer, and the wafer is bonded to a die 24 via an adhesive 23. An insulation protecting elastic member 25 such as silicone rubber or the like is filled in the groove 19, and a separable insulation protective film (such as photosensitive resin) 26 is then formed on the member. Then, a gold layer 27 having good ohmically contacting property is covered on the overall back surface of the wafer. The film 26 is exfoliated by adhering and exfoliating the adhesive tape, and the layer 27 on the film is simultaneously removed. Then, it is broken into individual pellets by a dicer 28 along a boundary line 20.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an inverted mesa semiconductor device in which an element obtained by the planar method, which can protect the element surface well, is shaped into a mesa shape. In the brainer-type semiconductor device fIt, the device surface is covered with a protective film such as an oxide film or nitride film from the stage of forming the PN junction on the wafer, which reduces the reverse leakage current of the PM junction and improves the switching characteristics. On the other hand, it has the disadvantage that its reverse breakdown voltage characteristics are inferior to the mesa type, so there are some improved inverted mesa type transistors as shown below. If the depletion layer 4 is generated near the flefter junction 3 between the KN-type flefter l and the P-type base 2 during reverse bias, the electric field strength will increase because the surface area of the element surface portion 4'' is insufficient. Since this becomes unnecessarily large, and as a result, the reverse breakdown voltage characteristic deteriorates, it is a good idea to form the side surfaces 6 of the individual Q elements 5 into slopes as shown in FIG. 2 to suppress the electric field strength to the permissible range K.

The inverted mesa shape as described above has a large number of elements 5, 5 . . . as shown in FIG.・Way 8 that has already been formed? Back surface 9 provided with metal M8 to obtain ohmic contact.
Etching #110 using a chemical etching solution.
,10. It is common to form the slope 6 by making...

However, when creating the etching grooves 1O110, . It could not be removed even by washing with water; on the contrary, it shortened the insulation distance, resulting in a worse situation in which the reverse voltage characteristics deteriorated. In order to solve this problem, it is possible to change the chemical etching to mechanical etching or to select a material for the metal layer 8 that easily melts in the etching solution, but in this case, the element may be damaged. However, it also has disadvantages such as deterioration of ohmic contact properties, and has little feasibility.

Therefore, this invention is proposed in view of the above circumstances.
A process of narrowing etching grooves along the boundaries between each element on the back surface that has a large number of elements formed thereon to ensure good ohmink contact with the 0-knee, and packing an elastic member for insulation protection into the etching grooves. The first step is to form a removable insulating protective film on the upper surface of the elastic member, and the second step is to form a number of metal layers with good ohmic contact over the entire back surface including the formed protective film. The manufacturing method is characterized by sequentially setting steps of forcibly peeling. This invention will be described in detail below.

4 to 8 are cross-sectional views of each manufacturing process of an NPN silicon power transistor showing an actual example of the present invention, showing individual NPN transistors 12, 12.・
・River・ In the wafer 8 which has already been formed, an N-type collector kp4 is placed on the N-type wafer 8 substrate 13, with NPN transistors 1j2, 12,...
Further, KP type base layer 15, N type emitter layer 16°16
,... are formed respectively. and 1
7 is a collector junction, and 18 is a green emitter junction. Now 1
9 Using a mixed acid etching solution mainly composed of FiHNO3, HP, 0H3000H, etc., the boundaries f/M20.20.・・・・・・ From the back side of the wafer 13 side, emitter N16 and base layer 15
The side walls 21, 21, . . .
..., collector junctions 1 and 7 are fully protruding. 22
is the emitter and base pattern 'f1 of way 811
On the surface where one pole has been formed, the die 24 is inserted through the adhesive 23.
It is pasted to 0. Now, as shown above,
Etched grooves 19, 19.・・・・・・
After forming the etching groove 1, as shown in FIG.
9,19.・・・・・・ Embed silicone rubber 25, 25° as an elastic member for insulation protection.
This silicone rubber25. j15. . . . are the side walls 21, 21 . . . . It covers the upper collector joint 17 and gels appropriately after being embedded to maintain elasticity so as to facilitate the wafer breaking work described below. Next, as shown in FIG. 6, a photosensitive resin 26, 26.26, which has a trade name of KTPR and whose main component is polyvinyl cinnamate, for example. ......, silicone rubber 25. ．． 25.・・・・・・ Layer it on the top surface. In this case, the layering method is similar to the so-called photo-etching technique, in which the photosensitive resins 26, 26, . . .
Pre-baked at a low temperature of about C, and using a UV-opaque mask pattern, silicone rubber 25,25°...
・Only the top part is exposed and cured, and the rest is removed using a developer. Then, as shown in Fig. 7, vacuum evaporation is performed while keeping the wax/%ll in a vacuum atmosphere at about 200°C to form #f
Gold back surface with good ohmic contact FGK2Q, 2R
At this time, the photosensitive resins 26, 26, . ing. After that, adhesive tape was once temporarily attached to the entire back surface of the wafer 8 11, and when it was peeled off, as shown in Fig. 8, B recon rubber! ! , 25. ...and back metal layer 2? .

2? , -... The back side of way/%ll, ie, MPN) transistors 12, 12 .・・・・・・
The back side of the NPN obtained in this way is completed.
The transistors 1jii, 12, . . . are broken into individual pellets by a dicer 28 having a diamond blade.

As mentioned above, in forming the back surface of the wafer 11, first the etching grooves 10, 10, . ...... Silicone rubber 25 , 25 , ..., photosensitive resin 26 , 26 , ...... are provided on the bottom, and the back metal layer 2
If the metal layer on the silicone rubber is removed by steaming 7°27,..., the metal layer can be removed without chemical etching, and therefore no residue will remain due to insufficient dissolution. In addition, etching grooves 19, 19.・・・・・・
・When forming the wafer 8, it is only necessary to directly etch the substrate 13 itself, which simplifies the etching process. In the above example, an adhesive tape was used to remove the metal layer on the silicone rubber. However, in this invention, when breaking with a dicer, a part of the metal layer and the photosensitive resin under it may be scratched and removed without using any other adhesive tape, but in this case, the back side The work must be done carefully so as not to scrape off too much of the metal layer unnecessarily, resulting in a slightly lower workability.

By carrying out this invention, it is possible to completely remove a part of the backside metal layer that should be removed when forming etching grooves on the backside of the wafer, and to set a sufficient distance to achieve desired reverse breakdown voltage characteristics. is obtained. Moreover, the part of the back metal layer to be removed makes the underlying photosensitive resin, which is an insulating protective film, brittle and can be peeled off easily, making it possible to perform mechanical processing and making it easier to automate the process. be effective.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a BiPN planar transistor, Fig. 2 is a cross-sectional view of an NPN planar transistor formed into an inverse mesa, and Fig. 3 is a cross-sectional view of a wafer with etched grooves for forming the inverted mesa. , and FIGS. 4 to 8 are cross-sectional views in each manufacturing process of a wafer in which a y P N @J power transistor according to an embodiment of the present invention is formed. 11... Way 8, 12... Element () transistor), l L-... Enten (groove Q2δ...λ, elastic member (silicon rubber), 26・
...Protection 11 (photosensitive resin), 27...
metal layer.

Claims (1)

[Claims] Each element is placed on the back side of the wafer with many elements formed
a step of providing an etching groove along the i+ boundary line; a step of filling an insulating protection elastic member into the etching groove;
A process of depositing a removable insulating protective film on the elastic member and applying a metal with good hemic contact to the entire back surface including the deposited protective film, and a process of forcibly peeling off the protective film. 1. A method for manufacturing a semiconductor device, comprising sequentially setting the following steps.