JPS5873830A - Electronic thermometer - Google Patents

Abstract

PURPOSE:To enable displaying of a maximum temperature, by a method wherein a reference resistance, constituting a time constant circuit of an oscillator, is switched into a temperature resistance, an oscillating frequency thereof is compared, a temperature value corresponding to an output thereof is latched, and when it exceeds a value latched before, a latch content is renewed. CONSTITUTION:With a FF1 reset and set, a thermister Rx and a reference resistance R are selected. A counter 2 counts an oscillating frequency in which a reference resistance R and a capacitor C form a time constant, and is inputted to a latch circuit 3. Its overflow signal clears counters 2 and 6 through a delay circuit 4, and simultaneously, inverses the FF1. The oscillating frequency, in which the Rx and C form the time constant, is counted by the counter 2, and its output signal is compared with the content of the latch circuit 3 by a comparing circuit 16. If the output signal exceeds the content, the latched content of the latch circuit 3 is renewed via a numerical control circuit 17 by means of a strobe signal of a NOR circuit 20, and a maximum temperature conversion data is normally held to display it in a display unit 31.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic thermometer using a temperature sensing element such as a thermistor.

The present applicant has previously filed an application for an invention already made regarding this electronic thermometer (Japanese Patent Application No. 114005/1983). an oscillator configured to be switchable with a resistor;
Comparing means for switching two types of resistors of the oscillator and comparing their respective oscillation frequencies, and storage means in which a temperature value corresponding to the output of the comparing means is stored in advance, and based on the output of the comparing means temperature value.

However, with such an electronic thermometer, it is not possible to easily determine the maximum temperature within a certain period of time, so there is a disadvantage that it cannot be applied to thermometers that are required to display such a maximum temperature, such as thermometers.

SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic thermometer that can display the maximum temperature without sacrificing size reduction and eliminating such inconveniences.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an electronic thermometer according to an embodiment of the present invention. In the same figure, the thermistor Rx, the reference resistor 1 (one end of which is connected in common, and the power supply of the power supply voltage (
(not shown), and the other end of each is connected to a grounded capacitor C via a switch SW. The switch SW is switched by the NOR output of the output of the flip-flop FFI and the timer 4, which will be described later, that is, the output of the NOR circuit 18. When there is an output from the NOR circuit 18, the switch SW is switched to the thermistor Rx side, and when there is no output, it is switched to the thermistor Rx side. They are configured to switch to the reference resistance R side, respectively. Oscillator l is an oscillator that oscillates at a frequency approximately determined by the time constant of capacitor C and thermistor Rx or reference resistor R, and its output is given to counter 2. The counter 2 is a No-adjustable counter that can count up to a predetermined number of NOs, and its output is given to the latch circuit 3 and comparison circuit 16, and its overflow output is given to the delay circuit 4. On the other hand, the output of a clock oscillator 5 which oscillates at a predetermined clock frequency fc is given to a counter 6. The output of the counter 6 is applied to a latch circuit 7 and a comparison circuit 8. The clock oscillator 5, the counter 6, the latch circuit 7, and the comparator circuit 8 constitute a time measuring means for measuring the time until the counter 2 overflows. This is a count value holding circuit which uses the AND output with the FFIQ) Q output, that is, the output of the ant circuit 21, as a strobe signal, and its output is given to the comparison -1 path 8. The comparison circuit 8 compares these two types of input signals, and generates an output when the meat inputs match. The output is given to delay circuit 9 and further to inverter 19. The outputs of the delay circuits 4 and 9 are given to the flip-flop FFI as a reset signal and a set signal, and the OR output is taken by the OR circuit 1O and given as a clear signal to the counter 2.6.
Reference numeral 6 compares the input signal from the counter 2 and the input signal from the latch circuit 3, and generates an output when the meat inputs match. Its output is a flip-flop l″F1
Numerical history through NAND circuit 30 under the condition of 4 outputs,
・11111・: Provided to the cut-off control circuit 17, as will be described in detail later, is output to the NOR circuit 20 based on the output from the delay circuit 9, and from the NOR output with the output of the inverter 19, the first,
'Notch 1 (! 1 path 3 strobe 1.1
The timer 14 is a timer that counts the output of the clock oscillator 5, and its output is taken as a NOR output by a NOR circuit 18 to control the switch SW.

The output of the latch circuit 8 is sent to the decoder 11. Furthermore, it is applied to a read-only memory ROM. Read only memo IJRO
M is a memory in which the temperature value corresponding to the input is stored, and the temperature information output is displayed on the display 18 via the driver 12. FIG. 2 shows the numerical update control circuit 1.
7 is a circuit diagram.

The numerical update control circuit 17 includes an AND circuit 8 as shown in the figure.
0's AND output as a data input, the oscillation output of the oscillator 5 as a clock input, and a flip-flop FF5 that uses the Q output of this flip-flop FF4 as a set input and the output of the delay circuit 9 as a reset input. The output of the flip-flop FF& is applied to the NOR circuit 20 as the output of the numerical update control circuit 17.

In the above configuration, the temperature sensitive resistor constituting the present invention is the thermistor Rx, and the comparing means is the counter 2.6, the latch circuit 7, the clock oscillator 5, the delay circuit 4.9, the comparison circuit 8, and other gate circuits. However, the latch means is the latch circuit 3, the storage means is the ROM, and the update means is the comparison circuit 1.
6 and numerical update control circuit 17, respectively.

Next, the operation of this electronic thermometer will be explained.

Assume now that the output of the timer 14 is not output.

At this time, flip-flop FI! ” 1 indicates that the set is in the reset state. If it is reset, the thermistor Rx is selected and the circuit configures the measurement mode, and if it is set, the reference resistor R is selected and the circuit configures the reference mode. .

Suppose the circuit is in reference mode.

In this case, counter 2 counts the oscillation frequency with reference resistor R and capacitor C as time constants, and the count value is NO.
When this is reached, the contents of the counter 6, which was simultaneously counting and scooting at the oscillation frequency fc, are latched into the latch circuit 7. Historically, the overflow signal of the counter 2 is delayed by the delay circuit 4 to clear the output counter 2.6 (this inverts the flip-flop Ii'l''1 to enter the measurement mode 5, ie, the counter 2.6). At the same time as 6 is cleared, counter 2 counts the oscillation frequency using thermistor Rx and capacitor C as time constants,
A counter 6 counts the oscillation frequency fc. In this mode, the count value of the oscillation frequency fc in the reference mode has already been latched in the latch circuit 7, so when this value matches the value of the counter 6 currently counting (in the measurement mode), the comparison circuit 8 is applied to a NOR circuit 20 via an inverter 19. Further, this comparison output is delayed by the delay circuit 9 to clear the counter 2.6, and at the same time inverts the flip-flop FFl to shift to the reference mode again.

On the other hand, in the above measurement mode, if the contents of the counter 2 match the contents of the latch circuit 3, the comparison circuit 16
The output of is sent to the numerical update control circuit 17 via the AND circuit 30.
Set the flip-flop FF4 to 7', and then set the flip-flop FF5.

In this case) Freelough float node 1+' 5 o) Q output becomes 'LOW', and as mentioned above, since the output of inverter 9 is also 'LOW', a strobe signal is sent to latch circuit 3. Latch The circuit 8 takes in the count value of the counter 2 at the timing of receiving this strobe signal, and
It is sent to the Tecoator 11 as temperature value conversion data.

The fact that the value taken into the latch circuit 3 by the above operation is correlated with the temperature value measured by the thermistor Rx was explained in detail in the above-mentioned Japanese Patent Application No. 114005/1982. That is, since the temperature T is expressed by the following equation, the temperature T can be obtained by measuring the count value Nx (7) of the counter 2 latched in the measurement mode.

However, To...supply temperature B...Boltzmano constant Ro...thermistor resistance value at -To By the way, now,
In the measurement mode, if the comparison circuit 16σ) does not come out before the output of the comparison circuit 8 comes out, that is,
Considering the operation when the temperature value conversion data is smaller than the current measurement mode (temperature value conversion data or latched L), the output of the inverter 19 is 'LO~
The output of the AND circuit 80 does not come out at the timing when V# is 0.
Consequently, the count value at that time, that is, the temperature value conversion data, which is output by the strobe signal from the NOR circuit 20, is not taken into the latch circuit 3. Therefore, the contents of the border circuit 3 are not updated.

Next, in the measurement mode, if the output of the comparison circuit 16 is output before the output of the comparison circuit 8 is output, that is, the temperature value conversion data in the current measurement mode is Considering the operation when the temperature value conversion data I) is large, at the timing when the output of the inverter 19 is "LOW", the output of the AND circuit 30 is already output and becomes 0.
Therefore, since the output of the numerical update control circuit 17 is in the 'LOW' state, the NOR circuit No. 20 forms a strobe signal at the same timing, and the count value at that time is 14j.
Then, the temperature value conversion data is taken into the latch circuit 3. Therefore,
The contents of latch circuit 3 are updated.

As described above, update control is performed so that the latch circuit 3 always holds the largest temperature value conversion data, and the display 13 can always display the highest temperature up to the present.

Note that the timer 14 forcibly sets the output of the NOR circuit 18 to ``LOW'' for a certain period of time after the power is turned on, and also selects the reference resistance R in the measurement mode and outputs the output according to the reference resistance R for the certain period of time. This gives you a period of time during which you can test whether the displayed temperature is correct.

As described in detail above, according to the present invention, the entire circuit including the latch means and the update means can be easily configured with one chip of LSI, which makes it possible to reduce the size and weight of the C-chip.
By using MO8LSI, it is possible to obtain an electronic thermometer for displaying the maximum temperature, which can significantly reduce power consumption.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an electronic thermometer which is an embodiment of the present invention, and FIG. 2 is a circuit diagram of a numerical update control circuit of the same thermometer. ■...Oscillator, 3...Latch circuit, 17...
Numerical update control circuit, R...Reference resistance, Rx...
・Thermistor. Applicant Tateishi Electric Co., Ltd. Agent Patent Attorney Hisao Komori

Claims (1)

[Claims] 1. An oscillator configured such that the resistance constituting the time constant circuit can be switched between a reference resistance and a temperature-sensitive resistance, a comparison means for comparing the respective oscillation frequencies by switching the two types of resistance of the oscillator, and this comparison false means for latching the output of the means by a strobe signal; storage means for storing in advance a temperature value corresponding to the output of the comparison means; An electronic thermometer comprising updating means for forming the strobe signal when the output (I) is also small and updating the false content to the output.