JPS5873237A - Logical circuit - Google Patents

Abstract

PURPOSE:To reduce power consumption and to speed up a titled circuit, by connecting a parallel circuit of a resistor and a capacitor or a diode, between a collector of a current driving transistor (TR) and a base of an off buffer TR. CONSTITUTION:In a TTL tri-state logical circuit, a parallel circuit consisting of a capacitor 21 and a resistor 20 or of a Schottky diode and a resistor is connected between a collector of a current drive TR7 and a base of an off buffer TR9. Thus, when the TR7 is switched off from on or inversly, since the current of interruption and conduction is increased, the switching speed of the TR9 can be quickened. Further, the circuit current when a tristate control input electrode 4 is 0 level is reduced, allowing to decrease the power consumption.

Description

[Detailed description of the invention] The present invention is transistor transistor logic.

(Transistor, Transistor,
Logic (hereinafter abbreviated as TTL) type logic circuit, and particularly relates to a three-state logic circuit.

In general, the output of a 3-state logic circuit with 'i', 'l' and L threads only switches to one of the following states: low level, tube level, or pan impedance, depending on the state of the inputs -via and e. 0 In the 3-state NAN (NANi) U path, when blood pressure above a predetermined level is applied to the 3-state control input electrode, when a voltage above the Fir constant level is applied to the input electrode, the interstitial drive mechanism tAc is supplied to the output transistor, making it conductive.-The cut-off buffer transistor is driven to cut off, and the output becomes the one-pole Fi'o level. Conversely, when a voltage of a predetermined level is applied to the input electrode, the output transistor goes into a low state, and the off-buffer transistor becomes conductive, so that the output electrode goes to level 116. When an input voltage below a predetermined level is applied to the 3-state control input electrode, both the output transistor and the off-buffer transistor are driven to be cut off, and the output electrode #i enters a high impedance state.

In general, it is desirable for a straight path to have low power consumption and still be able to perform high-speed switching operations.

Figure @1 is a circuit connection diagram showing an example of a conventional 'l''1' L thread 3-state logic circuit, in which the cathodes of the input electrodes 1 and 2 are and their anodes are both connected to a current drive transistor 70 pace.

An input gate circuit is composed of third diodes 12 and 11 and a resistor 15. The emitter of the current drive transistor 7 is connected to the base of the output transistor 8, and the emitter of the output transistor 8 is connected to a reference potential point. The collector of the current drive transistor 7 is connected to the base of the off-buffer transistor 9, the emitter of the off-buffer transistor 9 is connected to the base of the off-buffer transistor 10, and the emitter of the off-buffer transistor 10 is connected to the output electrode 3 together with the collector of the output transistor 8. has been done. Load resistors 15 and 16 are connected between the base and collector of the current drive transistor and the power supply electrode 50, respectively.
A resistor 19 is connected between the collectors of off-buffer transistors 9 and 10 and power supply voltage &5. The emitters of the current drive transistor 7 and the off-buffer transistor 9 are connected via resistors 17 and 18, respectively. Furthermore, the base of current drive transistor 70 and the base of off-buffer transistor 9 are connected to tri-state control input 'kk4 via Schottky diodes 13 and 14, respectively. The operation of this (b) path is as follows.

3-state system (up to) Input 1jL When a voltage higher than a predetermined level (approximately 1.2 V) is applied to all input electrodes 1 and 2 while a high level is applied to pole 4, the resistance A current of 15 flows through current drive transistor 70, driving it conductive.

The emitter of the current drive transistor 7 (base current collector current) drives the eight output transistors f11 and is shunted to the resistor 17. - power, the puffer transistors 9 and 10 are driven by 8m. Therefore, the output -, pole 3 becomes a low level ("0" level).

On the contrary, when a voltage below the n level is applied to any input electrode with a distance of 1 m or more, the resistor 15's resistance ηL passes through the try key diode, and the current peaks out from the input electrode.The electric transistor 7 has a base current. It goes into a shut-off state.

In this state, there is no longer any current supplied from the current motor transistor 7, and the output transistor 8 is in a disconnected state. When the transistor 7 made of the current section is turned off and the collector potential is increased by the resistor 6, a current is supplied to the base of the off-buffer transistor 90, and the off-buffer transistor 9 becomes conductive. At the same time, the off-buffer transistor 10 becomes conductive and supplies current to the output electrode 3VC and the connected external load. Therefore, the potential of the output electrode 3 rises to 11 levels in positive logic.

Next, the off-buffer transistors 9 and 10 are connected to the serial output '3 in the state where 11 levels appear at the WL pole 3.
A predetermined level (approximately 0.8 V) is applied to the state control input electrode 4.
) When the following voltage is applied, the current flowing through the resistor 16 flows out from the input electrode 4 through the diode 14, and the off-buffer transistor 90 pace current disappears, so the off-buffer transistors 9 and 10 are disconnected. At this time, the output transistor 8 is not inverted, and the output '-
&3 is the impedance state, that is, 1 even at 11 level.
It becomes @3 state (3 state) which is not 0 level.

Next, when the output transistor 8 is turned off and the buffer transistors 9 and 10 are connected and the output electrode is in the 10 level state, when a voltage below a predetermined level is applied to the input IL pole 4, the resistor 15 The current flowing through the resistor 16 flows through the diode 13, and the current flowing through the base of the current drive transistor 7 disappears, so that the transistor is in a state where the output transistor 8 is also blocked. Since there is no current supplied to the base of off-buffer transistor 9, off-buffer transistor 9 and lO are also in a disconnected state.Therefore, output electrode 3 is still in an impedance state, that is, a third state (3-state).

In other words, when a voltage higher than 3-state voltage (approximately 4.5 V) is applied to the 3-state input 'kL pole 4, this circuit will
It is a two-man powered NAND gate circuit with 1 input gate and 3 state system, and a predetermined level (approximately 0.
When a voltage of 8V or lower is applied, the output electrode 3 enters a high impedance state (3-state) regardless of the input boot state. In this conventional three-state logic circuit, Fi
When the three-state control input electrode is at Ig level, the magnitude of the current flowing through diode 14 is determined by the resistance value of resistor 16. Generally, resistor 16 is used with a small value to increase the switching speed of the logic circuit.
The current flowing through 6 is large. Therefore, since the current flowing out from the time electrode of the three-state control human powered power ram 4 is large, the power consumption increases.

However, there is a drawback that the drive circuit connected to the electrode needs to have a large capacity.

SUMMARY OF THE INVENTION An object of the present invention is to provide a TTL 3-state logic circuit with low power consumption and high-speed switching.

Features of the present invention! l [II'i resistor and a silent conductor are connected between the collector of the current drive transistor and the pace of the off-buffer transistor, and when the 11 current drive transistor switches from the 24-way state to the 24-way state or vice versa, the sewing # A large flow hole is provided for the rotation and conduction drive wJ', and the switching speed of the off-buffer transistor is increased, and the 3-stage divided input electrode reduces the circuit wave current by 1g times at the IO level, resulting in high-speed switching with low power consumption. It is the one that attends On 1st Path.

Below is the truth 1! Figure 2 is a circuit connection diagram of an embodiment of the present invention, in which a resistor 20 and a capacitor 21 are arranged in parallel. 7 collector and off-buffer transistor 9
Connected between 0 bases. The operation of the circuit is as follows.

If 3-state braking input 11 pole 4 is 11 levels, when a voltage of 11 lbs is applied to human power tortoise 1ikl and 2, tf
The L drive transistor 7 and the output transistor 8 become conductive. The pace power of the off-buffer transistor 9 is rapidly released through the capacitor 21 and the resistor 20, and as a result, the off-buffer transistor 9 and lO are turned off, and the output of the output tiL pole 3 is rapidly switched to 10 levels. . Conversely, when either input '*mi or 2 reaches the 10@ level, the current drive transistor and output transistor 8rih are turned off, and the off-buffer transistor 90 is turned off.
The base capacitor is rapidly charged through the capacitor 21 and the resistor 20, and as a result, the off-no(transistors 9 and 10 become conductive, and the output electrode rapidly switches to the Ill level.) Next, the 3-state control input electrode 4 When a level of 106 is applied to 1, the off-buffer transistor 90 pace potential becomes 1.
is lowered to the sum of the 00-level of the pole and the forward voltage of the diode 14, and the off-no(Zuffa transistors 9 and 1)
0 becomes a cut-off state and becomes a higher impedance state than the output electrode 3t. Note that the current flowing out from the 3-state control input electrode 4 is limited by the series connection circuit of the resistor 16 and the resistor 20, and can be kept small.In this way, the capacitor and resistor are turned off. Drive transition, x, pt.

By connecting between the collectors, it is possible to quickly conduct and cut off the transistor (a), and it is possible to perform high-speed switching operation or OJ function of the industrial circuit.
% current flows to the capacitor 21 only when the 111L current rolling transistor 7 is in the disconnected state or in the opposite direction due to Teramichi's fall, and in the constant 16 state, the current is limited by the resistor 20. , f')'r There is no undesirable increase in power consumption.

FIG. 3 shows another embodiment of the cooking circuit according to the invention, in which the capacitor 21 is replaced by 7. , when the current-driven trunk stub is cut off by the junction capacitance of the keyhole diode 22, the off-buffer transistor 9 is rapidly turned on, and conversely, when the current-driven transistor 7 or 4 is turned on, the diode 22 in one direction = The off-buffer transistors 9 are rapidly driven by the enemy. This allows high-speed logic circuits to be used.
As described above, according to the present invention, the 3 stages of the rl'L thread @ logic circuit can be turned off by connecting a parallel circuit of a resistor and a capacitor or diode. ``It is possible to obtain a small and high-speed cooking circuit, and the effect is great.

[Brief explanation of the drawing]

Figure 1 is a circuit connection diagram showing a conventional three-state logic circuit.
FIG. 2 and FIG. rJ43 are circuit connection diagrams showing an integrated example and other embodiments of the three smart logic circuits of the present invention, respectively. 1.2...Pole at input', 3...Output%
Pole, 4...3-step control human power JwL Pole, 5.
...... (source pole, 6... reference potential point, 7,
8,9.10...transistor, 11,12,
13, 14.22... shi, toyata "iod% 15, 16, 17, 18, 19゜20...
・Resistance, 21..., -1...Capacitor. Figure 1A Figure 24

Claims (1)

[Claims] In a three-state logic circuit consisting of an input gate circuit, an output transistor, a current side transistor that supplies current to the output transistor, and an off-buffer transistor, there is a connection between the collector of the current drive transistor and the base of the off-buffer transistor. A logic circuit characterized by having a parallel circuit of connected resistors and capacitors or diodes.