JPS5871775A - Level stabilizing circuit - Google Patents

Abstract

PURPOSE:To ensure the accurate stabilization of levels and to simplify the constitution of a level stabilizing circuit, by inserting reference signals having the reference levels corresponding to black and white levels into a TV signal and controlling these reference signals with a common circuit so that they are set at a constant level. CONSTITUTION:The reference signals S1 and S2 are set at a reference level E1 corresponding to a black level and at a reference level E2 higher than the level E1 by DELTAE. A TV signal SV to which the signals S1 and S2 are inserted is supplied to a video output circuit 40 via an AGC circuit 20 and a control circuit 30 for DC bias. A part of the video output is supplied to a level control circuit 60 to perform the control so that the level difference between signals S1 and S2 is always constant. Furthermore a level control circuit 70 performs the control so that a beam current IK flowing to a CRT 50 when the signal E2 is inserted is set at a constant level. Therefore the level difference DELTAE is set constant by the circuit 60, and the level E2 is set constant by the circuit 70. As a result, both black and white levels are controlled at one time and can be stabilized.

Description

[Detailed Description of the Invention] In conventional television receivers, particularly television receivers for monitors used in stations, the black level and white level of the television signal were stabilized independently. Therefore, the circuit configuration becomes complicated, and since there is no level to be used as a reference for adjustment to the own level (white peak level) k, there is a drawback that the adjustment accuracy is low.

Therefore, in the present invention, a standard having reference levels corresponding to the black level and the white level is inserted into a single signal T-television signal, and a common circuit is used to control these reference levels so that they are constant. This simplifies the circuit configuration and allows accurate level stabilization.

The present invention will be described in detail below with reference to the drawings.

In this invention, first and second reference signals having a 1x1 and a second reference level for level adjustment are inserted into a television signal in a television receiver. That is, it is inserted into two horizontal scanning periods which are vertical blanking periods other than the vertical blanking period and in which no reference signal such as VIR8 is inserted.

- If the direct return elimination period is 700μ5eeQ degrees, the example of 5KC as shown in JI2 diagram AiC, 13H011
The reference signal S1 of the c-iris 1 is inserted, and the reference signal S2 of the iris 2 is inserted at the 14th H.

The first reference signal S1 is determined to be a reference L/Kfi corresponding to the black level, and s2
The reference signal S2 is a second signal higher than the reference level E1 by ΔE.
is kept constant at the reference level E2. Note that this second reference level E2 is arbitrary as long as it is higher than the first reference level E1.

The first diagram shows such first and second reference signals 81.8
2 and these inserted reference signals 8x, S
Adjust the level of the television signal S■ based on zK,
1 shows an example of a level stabilizing circuit according to the present invention.

The figure shows the stabilization circuit for one of the R, G, and B channels, and the television signal (primary color signal) after video amplification supplied to terminal (1) is the reference signal insertion circuit. Supplied by CIIK. This insertion circuit αQ
As shown in the figure, has a switching circuit (2) with three terminal inputs, the terminal aK is supplied with the television signal Si, and the terminal blc is connected to the first voltage source (3) and set to the first reference level El. A reference signal S1 of Atsushi 1 with
K is connected to a second voltage source (4) and supplied with a second reference signal S2 having a second reference level B2.

Then, the television signal 8i is supplied to a synchronization separation circuit (5) to separate horizontal and vertical synchronization pulses, and these synchronization pulses are supplied to a switching pulse forming circuit (6)K, where the switching pulses SpK and In each field (D 13 Hth VC 111 child), the terminal C is selected for a period of tH in the 14th Hth, and the terminal a is selected for the other 9 periods.

1st and! The television signal Sv into which the reference signals 81 and 82 of No. 2 have been inserted passes through the AGC circuit (7) and the DC bias adjustment circuit (to) and is supplied to the video output circuit 10, and then to the corresponding grid of the cathode ray tube. Supplied as a drive signal.

A part of the video output is supplied to all level control circuits -K, and is controlled by 51C so that the level difference ΔE between the first and second reference signals Sl and 82 is always constant. Therefore, a part of the video output is divided by a pair of resistors Ra and kk, and then the divided output is passed through a capacitor C to a clamp circuit I
l). This clamp circuit Ill has first and second transistors Ql and Q2 as shown in the figure, and
A power supply 1 for clamp voltage is connected to the transistor (J), and the clamp pulse Cps (tJc2 shown in FIG. EcK is clamped at a predetermined level (any level may be used) determined by EcK.

Then, after the second reference signal S2 after the clamp operation is gated by the gate pulse CP2 (FIG. 2C) supplied to the second transistor Q2K, the second reference signal S2 of the second transistor Q2 is gated.
and clamp voltage YC are supplied to a voltage comparator circuit, and this clamp voltage EC and a second reference level E after clamping are
2 (= EC + ΔE), and the comparison output is supplied as a voltage for gain control to the above-mentioned AGC circuit (2) via the integrating circuit (2).

Note that the Norms width of the gate pulse Cp2 is selected to be approximately 30 μm. The reason why the gate period is increased in this way is that since the gate operation is performed only once per field, if the pulse width is shortened, a sufficient integral output cannot be obtained.

By configuring such a closed loop, the KAGC circuit (a) is controlled so that the comparison output is always ΔE. Therefore, the first level control circuit controls the level difference between the reference level El of medicine 1 and the reference level E2 of 1g2 to be the level difference ΔE when the reference signal is inserted.

In this invention, in addition to these configurations, in order to keep the black level and white level constant, a beam current (cando current) IK flowing through the polar ray tube group when inserting the second reference signal is made constant. 2 level control circuit +7 (1 is provided).

Therefore, the cathode ray tube's cando KK, a pair of resistors R1 and R2 are connected, and the cathode current I[-4 corresponding to the beam current is detected. This voltage conversion output is gated by the third transistor Q3 only for the second reference signal insertion period, and the gated voltage conversion output is supplied to the voltage comparator decoy. The reason why the voltage conversion output is gated using the gate pulse CP2tl- only in the second reference signal insertion period is that almost no beam current flows due to the first reference signal SIK, and therefore, in this signal insertion period, the cathode current IK
This is because it cannot be detected.

A predetermined reference voltage is supplied from the reference voltage 11 [(7υ) to the voltage comparator σ3, and the comparison output between this reference voltage and the voltage conversion output is sent to the DC bias adjustment circuit C via the integrating circuit σ3.
31) Supplied as K bias control voltage.

Since the voltage conversion output is based on the cathode current IKK that flows when the second reference signal S2 is supplied to the cathode ray tube, if the second reference level E2 after clamping changes, the voltage conversion output also changes. , the DC bias adjustment circuit is controlled so that the comparison output of the voltage comparator Q is kept constant at normal pressure.

Therefore, because the reference level E2 of the second reference signal S2 is kept constant by the control operation of the second level control circuit qQ, the reference level E1 of the first reference signal Sl is also always lower than this reference level E2 by ΔE. becomes constant. This means that the black level of the television signal 8V, that is, the cut-off level of the cathode ray tube, is always constant. Further, since the white level of the ten vision signal Sv is set based on the black level, the fact that the black level is controlled to be constant means that the white level is also always controlled to a predetermined level.

In this way, the first level control circuit controls the first and second reference levels E1. The level difference of Ex is always controlled by the set value ΔEK, and the second level control circuit CI (lI)
If the reference level E2 is controlled so as not to fluctuate, both the black level and the white level are simultaneously controlled to a specified value based on these level control operations, and the black level and white level are stabilized.

Note that by varying the voltage source συ, the value of the white peak level and the background of the cathode ray tube can be adjusted according to the value. In addition, in a cathode ray tube, when the cathode K deteriorates, the amount of electron beam radiation decreases, resulting in so-called emission reduction, which changes the color tone. If the voltage is controlled to be constant, the cathode voltage fl I will increase due to deterioration of the cathode.
Even if K decreases, this Ipel control operation is performed, so
Changes in color tone can be suppressed.

As explained above, in this invention, the reference levels El, E
2'4I: Because the level is adjusted using Since 5K is commonly used, compared to the case where the black level and white level are configured to be controlled independently,
The circuit configuration can be greatly simplified.

Note that in the above embodiment, the reference signal S1. Although the insertion of S2 is for the entire period during monitoring, the insertion period may be set as a certain period after the power is turned on. However, in this case, a control circuit is required to fix the position of the switching circuit (2) at terminal aK during periods other than the insertion period.

Also, DC bias tone! As one circuit (total), a bias circuit of the video output circuit may be used.

[Brief explanation of the drawing]

FIG. 1 is a system diagram showing an example of a level stabilizing circuit related to this IjIIIC, and FIG. 2 is a waveform diagram for explaining its operation. a[ is an insertion circuit for the first and second reference signals 81 and 82, (4) is an AQC circuit, trowel is a cathode ray tube, and -9 decoy is a first and second level control circuit.

Claims (1)

[Claims] a reference signal of building 1 having a first reference level related to the cut-off level of the cathode ray tube within the vertical retrace period;
A television signal into which a reference signal of rattan 2 having a second reference level different from the reference level of 2 is inserted is supplied to the cathode ray tube via the AGC circuit, and the above television signal supplied to the cathode ray tube is The AGC circuit is controlled so that the level difference between the reference level of IIEl and the second reference level becomes constant, and the beam current of the cathode ray tube during the horizontal period in which the reference level of II2 is inserted is controlled. A level stabilizing circuit that stabilizes the black level and white level of the television signal by controlling the reference level of the second part so as to be constant.