JPS5871690A - Multiplexing structure for printed board - Google Patents
Multiplexing structure for printed boardInfo
- Publication number
- JPS5871690A JPS5871690A JP16982881A JP16982881A JPS5871690A JP S5871690 A JPS5871690 A JP S5871690A JP 16982881 A JP16982881 A JP 16982881A JP 16982881 A JP16982881 A JP 16982881A JP S5871690 A JPS5871690 A JP S5871690A
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- printed
- wiring
- printed board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明扛、情報処理装置’ｔ’ｓ成するパッケージ構造
に関し、特にプリント基板を多重化したパッケージ構造
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a package structure for an information processing device, and particularly to a package structure in which printed circuit boards are multiplexed.
従来、この種のパッケージ構造は第１−に示すように、
１枚のプリント板３上に多数の電子部品１，２，４．６
等な搭載した構造をとってい几〇
しかし、電子部品の大規模集積化、高速化にともない高
密度実装が行なわれているため、プリント板の配線技術
が追随できず、電子部品の機能を充分発揮できる配線お
よび実装の設計をすることが困難になってきた。つｔり
、実装密度を上げれば配線量が増加し、一定の実装領域
内で集積化すれば、当然配線容量が不足してしまう。Conventionally, this type of package structure has the following structure as shown in 1-.
Many electronic components 1, 2, 4.6 on one printed board 3
㇠〇 However, due to the large-scale integration and high speed of electronic components, high-density mounting is being carried out, and the wiring technology for printed circuit boards cannot keep up, making it difficult to fully utilize the functions of electronic components. It has become difficult to design wiring and mounting that can take advantage of these technologies. In other words, if the packaging density is increased, the amount of wiring increases, and if devices are integrated within a certain packaging area, the wiring capacity will naturally become insufficient.
この１うな問題を解決するために、複数のパッケージに
配線可能な部品数となるように、実装分割して配線する
か、あるいはプリント板の信号層を増加して配＊ｔ’収
容するなどの方法がとられていた。In order to solve this problem, it is necessary to divide the mounting and wiring so that the number of parts can be wired to multiple packages, or increase the signal layer of the printed circuit board to accommodate the wiring. A method was taken.
しかし、前者の場合扛分割屓による信号の遅延時間の増
加あるいはパッケージの実装領域、プリント板の増加ｔ
−まねき、後者の場合はプリント板の価格が上昇し、製
造期間も延長されるうえ、改造性が悪化するなどの欠点
があった。However, in the former case, the signal delay time increases due to splitting, or the mounting area of the package and the printed circuit board increase.
In the latter case, the price of the printed circuit board increases, the manufacturing period is extended, and the ease of modification is impaired.
本発明の目的は、パッケージ上にさらにｊＩ２のプリン
ト板を搭載することにより、高密度実装化を可能にした
プリント基板の多重化パック−ジ構造を提供することに
ある。An object of the present invention is to provide a multiplex package structure of printed circuit boards that enables high-density packaging by further mounting a jI2 printed circuit board on the package.
前記目的を達成する沈めに、本発明によるプリント基板
の多重化構造は、電子部品を搭載した第１のプリント板
と、前記プリント板の電子部品搭載ｉｌＩ！ｌに配置さ
れ、前記電子部品または、前記第１のプリント板の配線
に接続さｎるプリント配線を有する第２のプリント板と
を含み、電子部品搭載み込んで接続ン行なうように構成
されている。In order to achieve the above object, the multiplexed printed circuit board structure according to the present invention includes a first printed board on which electronic components are mounted, and a first printed board on which electronic components are mounted on the first printed board! and a second printed board having printed wiring arranged on the first printed board and connected to the electronic component or the wiring of the first printed board, and configured to mount and connect the electronic component. There is.
上記構成に工れば本発明の目的は完全に達成される。With the above structure, the object of the present invention can be completely achieved.
次忙本発明について図面を参照して詳細に説明する。The present invention will be described in detail with reference to the drawings.
第２図、第３図は本発明によるプリント基板の多重化構
造の第１の実施例を示す斜視図および側面図である。FIGS. 2 and 3 are a perspective view and a side view showing a first embodiment of a multiplexed printed circuit board structure according to the present invention.
＃１１のプリント基板３には％コネク月、２および大規
模集積化路４が実装されている。大規模集積回路４に扛
第１のプリント基板３に接続される接続端子４ａが下向
きに設けられ後述する第２のプリント基板５に接続され
る接続端子７が上向きに設けられている。第１のプリン
ト基板３の電子部品を搭載し次１ＩｌｌＶｃは、電子部
品を挾むように第２のプリント基板５が配置され、第１
のプリント基板３に収容しきれないプリント配線が施こ
されている。第２のプリント基板５には受痛子５ａか設
けられており、大規模集積化ｗＩ４の上軸の接続端子７
がこの受端子５ａＫ接続されている。On the printed circuit board 3 of #11, a % connect connector 2 and a large-scale integration path 4 are mounted. A connecting terminal 4a connected to a first printed circuit board 3 on the large-scale integrated circuit 4 is provided facing downward, and a connecting terminal 7 connected to a second printed circuit board 5, which will be described later, is provided facing upward. After mounting the electronic components on the first printed circuit board 3, the second printed circuit board 5 is arranged so as to sandwich the electronic components, and the first
There is more printed wiring than can be accommodated on the printed circuit board 3. A pain receiving element 5a is provided on the second printed circuit board 5, and a connection terminal 7 on the upper axis of the large-scale integration wI4 is provided.
is connected to this receiving terminal 5aK.
このようにして、未結線になっていた配＊’を第２の７
リント基板Ｓに収容することにより高密度実装が実現さ
れている。In this way, the unconnected wiring *' is transferred to the second 7
High-density packaging is achieved by accommodating it on the lint board S.
第４図、第５図は本発明による多重化構造の第２の実施
例を示す斜視図および側面図である。4 and 5 are a perspective view and a side view showing a second embodiment of the multiplexing structure according to the present invention.
＃！２の実施例で扛大規模集積回路４の接続端子４ａは
一万側に設けられているだけであり、大規模集積回路４
は第１のプリント基板３側に実装されている。そして、
第１のプリント基板３上の大規模集積回路４、または集
積回路６等の実装されていない部分Ｋ１１ｌの１りント
基板３の配線に接続されている接線用端子９が設けられ
、第２のプリント基板５に設けられた受端子８を介して
、第２のプリント基板５上のプリント配線に接続されて
いる。#! In the second embodiment, the connection terminal 4a of the large-scale integrated circuit 4 is only provided on the 10,000 side, and the large-scale integrated circuit 4
is mounted on the first printed circuit board 3 side. and,
A tangential terminal 9 is provided which is connected to the wiring of the first printed circuit board 3 on the large-scale integrated circuit 4 on the first printed circuit board 3 or the part K11l where the integrated circuit 6 or the like is not mounted. It is connected to printed wiring on the second printed circuit board 5 via a receiving terminal 8 provided on the printed circuit board 5 .
ＷＸ６図は本発明による構造の第３の実施例を示した側
面図である。１ｉｔ１！３の実施例においても片側に接
続端子４１奮有する大規模集積回路が用いられており、
第２のプリント基板５には、第１のプリント基板３に対
向する側にプリント配線に接続された接触用熾子座が設
けられ、接続用ばねな有する接続端子１１により第１お
よび第２のプリント基板３．５の配線が接続され、ねじ
１０等で各プリント基板３．５が固定されている。Figure WX6 is a side view showing a third embodiment of the structure according to the invention. The 1it1!3 embodiment also uses a large-scale integrated circuit with 41 connection terminals on one side.
The second printed circuit board 5 is provided with a contact base connected to the printed wiring on the side opposite to the first printed circuit board 3, and a connecting terminal 11 having a connecting spring connects the first and second The wiring of the printed circuit boards 3.5 is connected, and each printed circuit board 3.5 is fixed with screws 10 or the like.
以上説明した！！施例では、第２のプリント基板を１枚
設けるような構造を示しているが、多数枚実装してもか
まわない。I explained it above! ! Although the embodiment shows a structure in which one second printed circuit board is provided, a plurality of second printed circuit boards may be mounted.
本発明は以上説明し友ように、プリント基板上に電子部
品を搭載したパッケージの上に第２のプリント基板を搭
載することにより、配線の収容量を拡大し、大規模集積
化、および高速化に耐えるプリント基板の多重化パッケ
ージ構造を実現することができる。As described above, the present invention expands the wiring capacity by mounting a second printed circuit board on top of a package in which electronic components are mounted on the printed circuit board, thereby achieving large-scale integration and speeding up. It is possible to realize a multiplexed package structure of a printed circuit board that can withstand high temperatures.
第１図は従来のプリント基板の基本的構成を示す真面図
、第２因、第３図は本発明によるプリント基板の多重化
構造の第１の寮施Ｎｙｔ示す斜視図および側面図、第４
図、＃！５図に本発明による構造のＮ２０笑施例を示す
斜視図およびｌ！１１面幽、第６図は本発明による構造
の第３の実施例を示す側面図である。
８０．１
１．２ ／コネクタ ３．５用プリント基版４・・・
大規模集積回路 ６・・・集積″回路５ａ、８・・・受
端子 ７，９．１１−接線用端子１０・・・ねじ
特許出願人 日本電気株式会社
代理人 弁理士 井ノロ 壽
２１−
第２凶
第３図
才４図
才５図
オ・６図FIG. 1 is a front view showing the basic structure of a conventional printed circuit board, and FIG. 4
figure,#! Fig. 5 is a perspective view showing an N20 embodiment of the structure according to the present invention, and l! FIG. 6 is a side view showing a third embodiment of the structure according to the present invention. 80.1 1.2 / Connector 3.5 printed base plate 4...
Large-scale integrated circuit 6...Integrated'' circuit 5a, 8...Receiving terminal 7,9.11-Tangential terminal 10...Screw patent applicant NEC Corporation representative Patent attorney Hisashi Inoro 21- No. 2nd figure 3rd figure 4th figure 5th figure O/6th figure
Claims (1)
板の電子部品搭載側に配置され、前記電子部品または、
前記第１のプリント板の配線に接続される１りント配線
な有する第２のプリント板とを含み、電子部品を挾み込
んで接続を行なうように構成したこと′１に：特徴とす
るプリント基板の多重化構造。a first printed board on which an electronic component is mounted; a first printed board disposed on the electronic component mounting side of the printed board;
and a second printed board having single-lint wiring connected to the wiring of the first printed board, and configured so that electronic components are sandwiched therein for connection. Multiplexed structure of substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16982881A JPS5871690A (en) | 1981-10-23 | 1981-10-23 | Multiplexing structure for printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16982881A JPS5871690A (en) | 1981-10-23 | 1981-10-23 | Multiplexing structure for printed board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5871690A true JPS5871690A (en) | 1983-04-28 |
Family
ID=15893656
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16982881A Pending JPS5871690A (en) | 1981-10-23 | 1981-10-23 | Multiplexing structure for printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5871690A (en) |
-
1981
- 1981-10-23 JP JP16982881A patent/JPS5871690A/en active Pending
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