JPS5870675A - Surge protecting system - Google Patents

Surge protecting system

Info

Publication number
JPS5870675A
JPS5870675A JP56169677A JP16967781A JPS5870675A JP S5870675 A JPS5870675 A JP S5870675A JP 56169677 A JP56169677 A JP 56169677A JP 16967781 A JP16967781 A JP 16967781A JP S5870675 A JPS5870675 A JP S5870675A
Authority
JP
Japan
Prior art keywords
surge
unit
subscriber
circuit
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56169677A
Other languages
Japanese (ja)
Other versions
JPH0252920B2 (en
Inventor
Haruyuki Yoshino
吉野 春幸
Takao Ueno
隆男 上野
Norio Kobayashi
則夫 小林
Masamichi Imai
今井 正道
Shinichi Iribe
真一 入部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP56169677A priority Critical patent/JPS5870675A/en
Publication of JPS5870675A publication Critical patent/JPS5870675A/en
Publication of JPH0252920B2 publication Critical patent/JPH0252920B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/18Automatic or semi-automatic exchanges with means for reducing interference or noise; with means for reducing effects due to line faults with means for protecting lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

PURPOSE:To economically perform the protection against surge current and voltage incoming to a subscriber circuit unit, by connecting the units with a DC balanced transmission circuit and a common mode choke. CONSTITUTION:A surge incoming to a subscriber line is absorbed with a surge absorbing circuit in the 1st unit and that mounted in an MDF installed in an exchange station to avoid the surge from being applied to each circuit of the 1st unit. In order to prevent the surge from being applied to various circuits in the 2nd and succeeding units and devices via a pair of signal lines 15 being an interface with the 2nd unit, when the surge appears at the output of an amplifier 16, the surge energy is absorbed with a choke coil 17 to improve the surge- resistance between both the units.

Description

【発明の詳細な説明】 本発明はディジタル交換機の集線装置における雷サージ
等の保護方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for protecting against lightning surges and the like in a concentrator of a digital exchange.

従来の機械接点を用いた集線装置は加入者線と各種制御
装置類は電気的に絶縁されていたため加入者線に誘導さ
れた雷サージ等の影響を受けることはなかった。しかし
乍ら近年のLSI技彷の進歩によシ登場したディジタル
交換機の集被装置においては前述の電気的絶縁性は確保
できない状況にある。従って、何らかのサージ保護方式
を導入することが該集線装置にとり必須と力ってきた。
In conventional line concentrators using mechanical contacts, subscriber lines and various control devices were electrically insulated, so they were not affected by lightning surges induced in subscriber lines. However, the above-mentioned electrical insulation cannot be ensured in the concentrator devices of digital exchanges that have appeared due to the recent advances in LSI technology. Therefore, it has become essential for the line concentrator to introduce some kind of surge protection method.

完全な手段としては光結合素子によシ加入者線および加
入者個別に設けた加入者回路と集線部を接続することが
考えられるが皺素子の応答速度、信頼度、経済性の面で
各々難点を有しているa本発明の目的は電源・アース系
をユニット屑に設けることによシ合理的に所期の目的で
あるサージ保at−実現する方式を提供するにある。
As a perfect means, it is conceivable to connect the subscriber line and the subscriber circuit provided individually for each subscriber to the concentrator using an optical coupling element, but each has its own advantages in terms of response speed, reliability, and economic efficiency of the wrinkle element. However, it is an object of the present invention to provide a system that reasonably achieves the intended purpose of surge protection by providing a power supply/earth system in the unit waste.

上記目的を達成するため本発明は経済性も考慮し前記集
線装置を21!購のユニットに分割し、加入者個別に設
置た加入者回路Nヶおよび該Nヶの回路に対し設けた1
ケのインタフェース回路からなる第1のユニット、該第
1のユニットロケと接続され(NXm=)M加入者に対
して集線・多重化を実行する第2のユニットとする。サ
ージ侵入による被害が@2のユニットまで及ばないよう
に電源・アース系を前記第1.第2のユニット別に設け
、かつ両ユニット間を直流平衡伝送回路とコモンモード
チョークとで接続するようにしたものである。
In order to achieve the above object, the present invention takes economic efficiency into consideration and uses the line concentrator 21! N subscriber circuits are divided into purchasing units and installed individually for each subscriber, and one circuit is installed for each of the N circuits.
A first unit is made up of two interface circuits, and a second unit is connected to the location of the first unit and performs line concentration and multiplexing for (NXm=)M subscribers. In order to prevent damage caused by surge intrusion from reaching the @2 unit, the power supply/ground system is connected to the first unit. The second unit is provided separately, and both units are connected by a DC balanced transmission circuit and a common mode choke.

以下9図面によって本発明の実施例を詳細に説明する。Embodiments of the present invention will be described in detail below with reference to nine drawings.

第1図は集線装置でToFt 1a前記第1のユニット
、2は前記N加入者分の加入者回路、3は該回路に対し
1ヶ設けた前記インタフェース回路、4゜5、6.7.
8は第1のユニットで用いる各種電源及びアースあシ、
4は一43v (加入者線を介して端末に供給される第
1の電源)である。9は該第1の電源から第2の電源(
アナログ用+5v)。
FIG. 1 shows a line concentrator, ToFt 1a, the first unit, 2 the subscriber circuit for the N subscribers, 3 the interface circuit provided for the circuit, 4°5, 6.7.
8 is various power supply and ground foot used in the first unit;
4 is -43v (first power supply supplied to the terminal via the subscriber line). 9 is a connection from the first power source to the second power source (
+5v for analog).

第3の電源(アナpグ用−3v)、第4の電源(ディジ
タル+SV)を作成する第1の電源部、5〜7は該第2
〜第4の電源であり8は第1のユニットが用いる第1の
アースである。10は前記第2のユニツ)、11は前記
4から第5の電源(ディジタル+5V)を作成する第2
の電源部、12は第20ユニツトが用いる第2のアース
である。
The first power supply part creates the third power supply (-3V for analog PG) and the fourth power supply (digital +SV), and 5 to 7 are the second power supply part.
˜4th power supply, and 8 is the first ground used by the first unit. 10 is the second unit), 11 is a second unit that creates the fifth power supply (digital +5V) from the 4
12 is a second ground used by the 20th unit.

なる28類の電源・アース系に接続される。15紘両ユ
ニット間で授受される信号線を示す。
It is connected to the power supply/earth system of Class 28. 15 shows the signal lines exchanged between the units.

落2図は第1図での3.10.15の関係(信号インタ
フェース手法)の詳細を示すユニット間接続回路を示す
。16は不平衡・平衡変換回路、17はコモンモードチ
ョーク、18は平衡・不平衡変換回路、19.20は整
合用抵抗を示す。
Figure 2 shows an inter-unit connection circuit showing details of the relationship 3.10.15 (signal interface method) in Figure 1. 16 is an unbalanced/balanced conversion circuit, 17 is a common mode choke, 18 is a balanced/unbalanced conversion circuit, and 19.20 is a matching resistor.

加入者線に侵入してくるサージは第1ユニツト内でのサ
ージ吸収回路ならびに交換局に設置したMDFに実装し
たサージ吸収回路により吸収し第1のユニット内の各回
路に印加されないようにすることは当然ながら第2のユ
ニットとのインタフェース点である1対の信号線15を
介して第2のユニット及び後続のユ二ッ゛ト、装置内の
各種回路に印加されないように第2図の!111!形式
によシ保護している。
Surges entering the subscriber line are absorbed by the surge absorption circuit in the first unit and the surge absorption circuit mounted on the MDF installed in the exchange, so that they are not applied to each circuit in the first unit. Of course, the signal line 15 shown in FIG. 111! Protected by format.

すなわち、16の出力にサージが現われた際には17の
チョークコイルによシ吸収しサージエネルギを軽減する
ことにより両ユニット間での耐サージ性を向上させるこ
とが可能となる。勿論チト一りのインダクタンスの値は
本来の信号伝送に影智を及はさないように選択する必要
がある。又インダクタンスの値を大きくする程前述のユ
ニ4ット間での耐サージ性は向上する。
That is, when a surge appears in the output of unit 16, it is absorbed by choke coil 17 and the surge energy is reduced, thereby making it possible to improve the surge resistance between both units. Of course, the value of each inductance must be selected so as not to affect the original signal transmission. Further, as the inductance value increases, the surge resistance between the four units described above improves.

第2図は第1のユニットから送出し第2のユニットで受
信する場合の信号線に対する接続形式について説明して
いるが、第2のユニットから送出し第1のユニットで受
信する場合の信号線についても第2図と同様に対応可能
である。
Figure 2 explains the connection format for the signal line when sending from the first unit and receiving from the second unit, but the signal line when sending from the second unit and receiving from the first unit This can also be handled in the same way as in FIG.

本発明によれば加入者回路ユニットに侵入したサージ電
流および電圧の保護、さらに蚊加入者回路で発生したサ
ージ電流、および電圧が集線多重化ユニットに侵入する
のを保護することが経済的に可能となる。
According to the invention, it is economically possible to protect against surge currents and voltages entering the subscriber circuit unit, and also against surge currents and voltages generated in the mosquito subscriber circuit entering the concentrator multiplexing unit. becomes.

【図面の簡単な説明】[Brief explanation of drawings]

第1図社集線装置での電源・アース系の系統を示す概略
図、第2図はユニット間での信号#接続形式を説明する
図である。 l  ・・・・・・・・・・・第1のユニット2 ・・
・・・・・・・・・・N加入者分の加入者回路3 ・・
・・・・・・・・・(7タ7工−ス回路4〜8・・・・
・・・・・各種電源及びアース9 ・・・・・・・・・
・・第10電源部10  ・・・・・・・・・・・・ 
集線多重化を実行するljg2のユニット11 ・・・
・・・・・・・・・第2の電源部12 ・・・・・・・
・・・・・第2のアース  13 ・・・・・・・・・
・・・第2のユニット本体部16 ・・・・・・・・・
・・不平衡平衡変換回路17  ・・・・・・・・・・
・・コモンモードチョーク1B ・・・・・・・・・・
・・平衡不平衡変換回路Z 9120  ・・・・・・
整合用抵抗第1頁の続き ■出 願 人 日本電気株式会社 東京都港区芝五丁目33番1号 ■出 願 人 株式会社日立製作所 東京都千代田区丸の内−丁目 番1号
Figure 1 is a schematic diagram showing the power supply/earth system in the line concentrator, and Figure 2 is a diagram illustrating the signal # connection format between units. l ・・・・・・・・・・First unit 2・・・・
......Subscriber circuit 3 for N subscribers...
・・・・・・・・・(7 terminals 7 terminals circuits 4 to 8...
・・・・・・Various power supplies and grounding 9 ・・・・・・・・・
・・10th power supply section 10 ・・・・・・・・・・・・
Unit 11 of ljg2 that executes concentrating multiplexing...
...... Second power supply section 12 ......
...Second Earth 13 ......
...Second unit main body part 16 ......
...Unbalanced balance conversion circuit 17 ......
・・Common mode choke 1B ・・・・・・・・・・・・
・・Balanced unbalanced conversion circuit Z 9120 ・・・・・
Matching resistor Continued from page 1 ■Applicant: NEC Corporation, 5-33-1 Shiba, Minato-ku, Tokyo ■Applicant: Hitachi, Ltd., No. 1 Marunouchi-chome, Chiyoda-ku, Tokyo

Claims (1)

【特許請求の範囲】 加入者線に誘導されたサージ電圧およびサージ電流の侵
入を保護するサージ保護方式において。 加入者線対応に設置したNヶ<N:2以上の整数)の加
入者回路と該Nヶの加入者回路に対し設けた1ケのイン
タフェース回路なi:s−ニットとし、該二二ッ)mヶ
(m;2以上の整数)から加入者回路ユニット群を構成
し、かつmケの該ユニットとインタフェースする集線・
多重化ユニットを設け。 該加入者回路ユニット内は同一の第一の電源・アース系
で構成しかつ集線・多重化工ニットは前記電源・アース
系とは興なる第20電源・アース系で構成し両ユニット
間を直流平衡伝送回路とコモンモードチョークとによシ
接続することを特徴とするサージ保護方式。
[Claims] In a surge protection method for protecting against intrusion of surge voltage and surge current induced in a subscriber line. N subscriber circuits installed to correspond to subscriber lines (N < N: an integer of 2 or more) and one interface circuit installed for the N subscriber circuits. ) A subscriber circuit unit group is composed of m (m: an integer of 2 or more), and a line concentrator/concentrator that interfaces with the m units.
A multiplexing unit is provided. The subscriber circuit unit is composed of the same first power supply/earth system, and the concentrator/multiplex chemical unit is composed of a 20th power supply/earth system which is different from the power supply/earth system, and DC balance is established between both units. A surge protection method characterized by a connection between a transmission circuit and a common mode choke.
JP56169677A 1981-10-23 1981-10-23 Surge protecting system Granted JPS5870675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56169677A JPS5870675A (en) 1981-10-23 1981-10-23 Surge protecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56169677A JPS5870675A (en) 1981-10-23 1981-10-23 Surge protecting system

Publications (2)

Publication Number Publication Date
JPS5870675A true JPS5870675A (en) 1983-04-27
JPH0252920B2 JPH0252920B2 (en) 1990-11-15

Family

ID=15890854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56169677A Granted JPS5870675A (en) 1981-10-23 1981-10-23 Surge protecting system

Country Status (1)

Country Link
JP (1) JPS5870675A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123733U (en) * 1984-07-17 1986-02-12 日本電子株式会社 transistor switching circuit
EP2384095A1 (en) * 2009-01-29 2011-11-02 Panasonic Corporation Differential transmission circuit and electronic device provided with the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123733U (en) * 1984-07-17 1986-02-12 日本電子株式会社 transistor switching circuit
EP2384095A1 (en) * 2009-01-29 2011-11-02 Panasonic Corporation Differential transmission circuit and electronic device provided with the same
EP2384095A4 (en) * 2009-01-29 2013-04-03 Panasonic Corp Differential transmission circuit and electronic device provided with the same
US8693151B2 (en) 2009-01-29 2014-04-08 Panasonic Corporation Differential transmission circuit and electronic device provided with the same

Also Published As

Publication number Publication date
JPH0252920B2 (en) 1990-11-15

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