JPS5868349A - High-precision double balanced modulator - Google Patents
High-precision double balanced modulatorInfo
- Publication number
- JPS5868349A JPS5868349A JP16573581A JP16573581A JPS5868349A JP S5868349 A JPS5868349 A JP S5868349A JP 16573581 A JP16573581 A JP 16573581A JP 16573581 A JP16573581 A JP 16573581A JP S5868349 A JPS5868349 A JP S5868349A
- Authority
- JP
- Japan
- Prior art keywords
- switching circuit
- circuit
- carrier
- output
- wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
- H04L27/04—Modulator circuits; Transmitter circuits
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplitude Modulation (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、モノリシックIC化が容易な高精度の二重平
衡変調器に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high-precision double-balanced modulator that can be easily fabricated into a monolithic IC.
無線通信において、信号の乗積、周波数変換などの操作
を行なうために二重平衡変調器が広く用いられている。Double-balanced modulators are widely used in wireless communications to perform operations such as signal multiplication and frequency conversion.
無線機器の小形化をはかるためには回路部品のモノリシ
ックIC化が有効であるが、二重平衡変調器として従来
用いられてきたリング変調器はコイルを用いているので
、モノリシックIC化は困難であった。この点を改善し
たディジタル回路素子による二重平衡変調器の従来の構
成例を図1に示す。図1において1は変調信号入力端子
、2は搬送波入力端子、3はD/A変換器、4は変調用
切替回路、5は変調波出力端子である。Making circuit components monolithic is an effective way to downsize wireless devices, but ring modulators, which have traditionally been used as double-balanced modulators, use coils, so making them monolithic is difficult. there were. An example of a conventional configuration of a double-balanced modulator using digital circuit elements that has improved this point is shown in FIG. In FIG. 1, 1 is a modulated signal input terminal, 2 is a carrier wave input terminal, 3 is a D/A converter, 4 is a modulation switching circuit, and 5 is a modulated wave output terminal.
この回路を動作させるには入力端子1に変調入力信号C
(t)をディジタル信号データとして加え、搬送波入力
端子2に搬送波cosω。tを加える。To operate this circuit, the modulated input signal C is input to input terminal 1.
(t) is added as digital signal data, and a carrier wave cosω is input to the carrier wave input terminal 2. Add t.
D/A変換器4はアナログ信号出力として、第1アナロ
グ出力Cとこれと相補的な第2アナログ出力Cとをもち
、それぞれC(t) 、 −C(t)が出力されるもの
とする。この2つのアナログ出力は入力端子2から得ら
れる搬送波で制御される変調用切替回路4によって交互
に選択されて出力される。この結果、出力端子5にはC
(t)・ωSωct を基本波成分とする平衡変調波が
得られる。It is assumed that the D/A converter 4 has a first analog output C and a complementary second analog output C as analog signal outputs, and outputs C(t) and −C(t), respectively. . These two analog outputs are alternately selected and output by a modulation switching circuit 4 controlled by the carrier wave obtained from the input terminal 2. As a result, the output terminal 5 has a C
A balanced modulated wave having a fundamental wave component of (t)·ωSωct is obtained.
しかしながら、実際の回路ではD/A変換器302つの
アナログ出力間に直流オフセット電圧が発生し、そのた
め変調波に搬送波成分が重畳される。特に直交変調器で
定包絡線の角度変調を行なう場合、変調波に搬送波成分
が重畳されると、包絡線変動が起こる。これを飽和形の
増幅器に通すと帯域外スペクトルを発生し、隣接チャネ
ルに妨害を与えるので問題となる。However, in an actual circuit, a DC offset voltage occurs between the two analog outputs of the D/A converter 30, and therefore a carrier wave component is superimposed on the modulated wave. In particular, when performing angle modulation with a constant envelope using a quadrature modulator, when a carrier component is superimposed on a modulated wave, envelope fluctuation occurs. If this signal is passed through a saturation type amplifier, it will generate an out-of-band spectrum and cause interference to adjacent channels, which is a problem.
この搬送波成分の重畳を防ぐためには、D/A変換器の
出力端子C1C間のオフセット電圧を零にする必要があ
り、このため高精度のD/A変換器を用いるか、あるい
は調整によってオフセット電圧を零にしなければならな
いという欠点があった。In order to prevent this carrier wave component from being superimposed, it is necessary to make the offset voltage between the output terminals C1 and C of the D/A converter zero. Therefore, a high-precision D/A converter must be used, or the offset voltage can be reduced by adjusting the The disadvantage was that it had to be reduced to zero.
本発明はこのような欠点を改善するため、平衡変調器の
出力に重畳した搬送波成分が正相となるモード■と逆相
となるモード■を設け、この2つのモードを交互に使用
することによって搬送波成分を平均化して消去したもの
で、その目的は無調整でモノリシックIC化の容易な二
重平衡変調器を提供することにある。In order to improve these drawbacks, the present invention provides a mode (■) in which the carrier wave component superimposed on the output of the balanced modulator is in positive phase and a mode (2) in which it is in negative phase, and by using these two modes alternately. The carrier wave components are averaged and canceled, and the purpose is to provide a double-balanced modulator that requires no adjustment and can be easily fabricated into a monolithic IC.
第2図に本発明による二重平衡変調器の実施例を示す。FIG. 2 shows an embodiment of a double-balanced modulator according to the invention.
この回路は第1図の回路にクロック入力端子6と、ディ
ジタル信号切替回路7と補数回路8と、搬送波切替回路
9と、インバータ10を付加えたものである。This circuit is obtained by adding a clock input terminal 6, a digital signal switching circuit 7, a complement circuit 8, a carrier switching circuit 9, and an inverter 10 to the circuit shown in FIG.
この回路では入力端子1にディジタル信号データとして
加えられた変調入力信号C(t)は2つに分岐され、一
方はそのままディジタル信号切替回路7へ入力され、も
う一方は入力されたデータの2の補数を出力する補数回
路8によって−c (t)のデータに変換された後、デ
ィジタル信号切替回路7へ入力される。また、入力端子
2に加えられた搬送波cosω。tも分岐され、一方は
そのまま搬送波切替回路9へ入力され、もう一方はイン
バータ10によって位相が反転された後切替回崎9へ入
力される。一方、クロック入力端子6には基底帯域信号
の最高周波数のn倍(n≧2)の周波数のクロックを入
力し、これによってディジタル信号切替回路7及び搬送
波切替回路9を制御する。これら2つの切替回路は同期
して動作し、以下に示す2つのモードをクロック毎に交
互に切替る。In this circuit, the modulated input signal C(t) applied to the input terminal 1 as digital signal data is branched into two parts, one of which is input as is to the digital signal switching circuit 7, and the other is the two parts of the input data. After being converted into -c (t) data by the complement circuit 8 which outputs the complement, the data is input to the digital signal switching circuit 7. Also, a carrier wave cosω applied to input terminal 2. t is also branched, one is inputted as is to the carrier wave switching circuit 9, and the other is inputted to the switching circuit 9 after its phase is inverted by the inverter 10. On the other hand, a clock having a frequency n times (n≧2) the highest frequency of the baseband signal is input to the clock input terminal 6, thereby controlling the digital signal switching circuit 7 and the carrier wave switching circuit 9. These two switching circuits operate synchronously and alternately switch between the two modes shown below every clock.
モードI:入力端子A、Eが選択される。Mode I: Input terminals A and E are selected.
モード■:入力端子A、Eが選択される。Mode ■: Input terminals A and E are selected.
ディジタル信号切替回路7の出力端子Cかも得たデータ
及び搬送波切替回路9の出力端子Gかも得た搬送波は、
D/A変換器3と切替回路4とからなる従来の二重平衡
変調器に入力されて平衡変調された後、帯域通過フィル
タ11を介して出力端子5に出力される。The data obtained from the output terminal C of the digital signal switching circuit 7 and the carrier wave obtained from the output terminal G of the carrier switching circuit 9 are
The signal is inputted to a conventional double-balanced modulator consisting of a D/A converter 3 and a switching circuit 4, subjected to balanced modulation, and then outputted to an output terminal 5 via a bandpass filter 11.
切替回路がモード■のとき、この回路は、第1図の回路
とまったく同様の動作をする。このときD/A変換器3
のアナログ出方端子Cと0間のオフセット電圧差をδと
すれば、出力される変調波vI(t)は
V■(t) = C(t) ・cosωct+δ−co
sω。t−(+1となる。上式の第2項は搬送波成分を
表している。When the switching circuit is in mode (2), this circuit operates exactly like the circuit of FIG. At this time, D/A converter 3
If the offset voltage difference between the analog output terminal C and 0 of is δ, the output modulated wave vI(t) is V■(t) = C(t) ・cosωct+δ−co
sω. t-(+1.The second term in the above equation represents the carrier wave component.
一方モード■のときの変調波VH(t)はVII(tl
= (−Qt)) ・(−ωsωc t )十δ(−
CO5(IJct)=12)となり、式(1)に対して
平衡変調波成分は同相であるが、搬送波成分については
逆相となる。そこでモードIとモード■を交互に使用し
、出方を平均化すれば搬送波成分が打消され、理想的な
平衡変調波が得られる。帯域通過フィルタ11は出方を
平均化する働きをもっており、その中心周波数は搬送波
周波数に等しく、帯域幅はモードIとHの切替周波数の
2倍以下とする必要がある。On the other hand, the modulated wave VH(t) in mode ■ is VII(tl
= (-Qt)) ・(-ωsωc t ) ten δ(-
CO5(IJct)=12), and the balanced modulation wave component is in phase with respect to equation (1), but the carrier wave component is in opposite phase. Therefore, if Mode I and Mode ■ are used alternately and the outputs are averaged, the carrier wave component is canceled and an ideal balanced modulated wave can be obtained. The bandpass filter 11 has the function of averaging the output, and its center frequency must be equal to the carrier wave frequency, and its bandwidth must be less than twice the mode I and H switching frequency.
このようにして搬送波成分を平均化して消去しているの
で、D/A変換器の精度がよ(ない場合にも、無調整で
モノリシックIC化に適した高精度の二重平衡変調器を
実現することができる。Since the carrier wave components are averaged and eliminated in this way, the accuracy of the D/A converter is improved (even if there is no adjustment, a high-precision double-balanced modulator suitable for monolithic ICs can be realized without adjustment). can do.
本発明による二重平衡変調器を直交変調器に適用した場
合の実施例を第3図に示す。図において1及び12は変
調信号入力端子、2は搬送波入力端子、6はクロック入
力端子、13は90°移相器である。7及び14はディ
ジタル信号切替回路、8及び15は補数回路、3及び1
6はD/A変換器、4及び17は変調用切替回路、9及
び18は搬送波切替回路、10及び19はインバータで
あり、このうち第2図と同じ番号を付した8 、 7
、3 、4 、9 、10が同相成分用の高精度二重平
衡変調器を構成し、残りの15 、14 、16 、1
7 、18 、19が直交成分用の高精度二重平衡変調
器を構成する。加は同相成分と直交成分を重畳する合成
器、11は帯域通過フィルタ、21は変調波出力端子で
ある。直交形変調器は角度変調方式一般に有効であるが
、以下では問題点及びこの発明の特徴を具体的に述べる
ため、定包絡線の位相変調波を発生させる場合について
説明する。FIG. 3 shows an embodiment in which the double-balanced modulator according to the present invention is applied to a quadrature modulator. In the figure, 1 and 12 are modulation signal input terminals, 2 is a carrier wave input terminal, 6 is a clock input terminal, and 13 is a 90° phase shifter. 7 and 14 are digital signal switching circuits, 8 and 15 are complement circuits, 3 and 1
6 is a D/A converter, 4 and 17 are modulation switching circuits, 9 and 18 are carrier wave switching circuits, and 10 and 19 are inverters, among which 8 and 7 are given the same numbers as in FIG.
, 3 , 4 , 9 , 10 constitute a high-precision double-balanced modulator for the in-phase component, and the remaining 15 , 14 , 16 , 1
7, 18, and 19 constitute a high-precision double-balanced modulator for quadrature components. 11 is a band pass filter, and 21 is a modulated wave output terminal. The orthogonal modulator is generally effective for angle modulation systems, but in order to specifically describe the problems and features of the present invention, a case will be described below in which a phase modulated wave with a constant envelope is generated.
第3図の回路を動作させるためには、入力端子1及び1
2にそれぞれcosφ(tL−sinφ(1)なる変調
入力信号データを入力し、入力端子2及び6にはそれぞ
れ第2図の回路と同様の搬送波及びクロックを入力する
。入力端子■にディジタル信号データとして加えられた
変調入力信号cosφI)と、入力端子2に加えられた
同相搬送波cosω。tは、同相成分用の高精度二重平
衡変調器によって乗積され、合成器加の入力端子1に入
力される。同様に入力端子12にディジタル信号データ
として加えられた変調入力信号−5inφ(1)と、搬
送波を90°移相器13に通して得られた直交搬送波s
inωQ1は、直交成分用の高精度二重平衡変調器によ
って乗積され、合成器加の入力端子Qに入力される。入
力端子I、Qに加えられた2つの信号は合成器加で重畳
された後、帯域通過フィルタ11を介して出力端子21
に出力され・位相変調波cos (ωct+φ(t))
が得られる。In order to operate the circuit shown in Figure 3, input terminals 1 and 1 are required.
The modulated input signal data of cosφ(tL-sinφ(1)) is input to input terminals 2 and 2, respectively, and the carrier wave and clock similar to the circuit in FIG. 2 are input to input terminals 2 and 6. Digital signal data is input to input terminal A modulated input signal cosφI) applied as a modulated input signal cosφI) and an in-phase carrier wave cosω applied to input terminal 2. t is multiplied by a high-precision double-balanced modulator for the in-phase component and is input to input terminal 1 of the combiner. Similarly, the modulated input signal -5inφ(1) applied as digital signal data to the input terminal 12 and the orthogonal carrier wave s obtained by passing the carrier wave through the 90° phase shifter 13
inωQ1 is multiplied by a high-precision double-balanced modulator for orthogonal components and input to the input terminal Q of the combiner. The two signals applied to input terminals I and Q are superimposed by a synthesizer and then passed through a bandpass filter 11 to an output terminal 21.
Phase modulated wave cos (ωct+φ(t))
is obtained.
この回路では切替回路7,14,9.18が入力端子6
に入力されたクロックに同期して、以下の2つのモード
を交互に切替え、第2図の場合と同様にして搬送波成分
を平均化して消却している。In this circuit, switching circuits 7, 14, 9.18 are connected to input terminal 6.
The following two modes are alternately switched in synchronization with the clock input to the carrier wave component, and the carrier wave components are averaged and canceled in the same manner as in the case of FIG.
モードI:入力端子A、B、E、Fが選択される。Mode I: Input terminals A, B, E, and F are selected.
モード■:入力端子A、B、E、Fが選択される。Mode ■: Input terminals A, B, E, and F are selected.
今、D/A変換器3の出力端子C9C間のオフセット電
圧をδr、D/A変換器16の出力端子S、S間のオフ
セット電圧をδQとすれば、モード■の場合の変調波の
振幅と位相のベクトル軌跡は第4図の(a)に示すよう
に搬送波成分のため中心のずれた円となり、包絡線変動
が起こる。一方モード■の場合のベクトル軌跡は第4図
(b)となり、モードIとモード■を交互に使用し、出
力を平均すると搬他
送成分が打消合い、同図の破線(C)で示される理想的
な変調波が得られる。Now, if the offset voltage between the output terminals C9C of the D/A converter 3 is δr, and the offset voltage between the output terminals S and S of the D/A converter 16 is δQ, then the amplitude of the modulated wave in mode ■ As shown in FIG. 4(a), the vector locus of and phase becomes a circle whose center is shifted due to the carrier wave component, and envelope fluctuation occurs. On the other hand, the vector trajectory in the case of mode ■ is shown in Figure 4 (b), and when mode I and mode ■ are used alternately and the outputs are averaged, the transport and transport components cancel each other out, as shown by the broken line (C) in the figure. An ideal modulated wave can be obtained.
このようにしてD/A変換器の精度力tよくない場合に
も無調整で高精度の直交形変調器を実現することかでき
る。In this way, even if the accuracy of the D/A converter is not good, a highly accurate quadrature modulator can be realized without adjustment.
以上説明したように、本発明によれば無調整でモノリシ
ックIC化の容易な高精度の二重平衡変調器を実現する
ことができるので、直交変調器等に用いた場合、無線機
器の小形化・経済化に太き(寄与することができる。As explained above, according to the present invention, it is possible to realize a high-precision double-balanced modulator that can be easily fabricated into a monolithic IC without adjustment, so when used in a quadrature modulator etc., it is possible to reduce the size of wireless equipment.・It can make a significant contribution to economicization.
第1図は従来の二重平衡変調器の構成例、第2図は本発
明の第1の実施例による変調器の構成例、第3図は本発
明の第2の実施例による変調器の構成例、第4図は第3
図の回路におけるベクトル軌跡の例である。
1及びJ2・・・変調信号入力端子、
2・・・搬送波入力端子、
3及び16・・・D/A変換器、
4及び17・・・変調用切替回路、5・・・変調波出力
端子、6・・・クロック入力端子、
7及び14・・・ディジタル信号切替回路、8及び15
・・・補数回路、
9及び18・・・搬送波切替回路、
10及び19・・・インバータ、11・・・帯域通過フ
ィルタ、13・・・900移相器、20・・・合成器、
21・・・変調波出力端子。
特許出願人 日本電信電話公社FIG. 1 is a configuration example of a conventional double-balanced modulator, FIG. 2 is a configuration example of a modulator according to a first embodiment of the present invention, and FIG. 3 is a configuration example of a modulator according to a second embodiment of the present invention. Configuration example, Figure 4 is the 3rd
This is an example of a vector locus in the circuit shown in the figure. 1 and J2...Modulation signal input terminal, 2...Carrier wave input terminal, 3 and 16...D/A converter, 4 and 17...Modulation switching circuit, 5...Modulation wave output terminal , 6... Clock input terminal, 7 and 14... Digital signal switching circuit, 8 and 15
...Complement circuit, 9 and 18...Carrier switching circuit, 10 and 19...Inverter, 11...Band pass filter, 13...900 phase shifter, 20...Synthesizer,
21...Modulated wave output terminal. Patent applicant Nippon Telegraph and Telephone Corporation
Claims (1)
入力端子と、該変調入力信号及びその2の補数とを交互
に選択するディジタル信号切替回路と、該切替回路の出
力をアナログ信号に変換し相互に相補的な関係にある1
組のアナログ出力を発生するディジタル・アナログ変換
器と、搬送波を受容する搬送波入力端子と、該搬送波及
びその逆相関係にある波形を交互に選択する搬送波切替
回路と、前記ディジタル・アナログ変換器の1組の出力
を搬送波切替回路の出力に従って半周期毎に交互に切換
えて平衡変調波出力とする変調用切替回路と、該回路の
出力に接続され帯域外不要波を除去するフィルタ及びそ
の出力に接続される変調波出力端子と、前記ディジタル
信号切替回路及び前記搬送波切換回路の切替制御を行う
クロック信号手段とを有し、変調入力信号と入力搬送波
を用いて変調を行う第1モードと、変調入力信号の2の
補数と入力搬送波の逆相波を用いて変調を行う第2モー
ドとが前記クロック信号手段により周期的に交互に切替
えられることを特徴とする高精度二重平衡変調器。A modulation signal input terminal that receives a digital signal as a modulation input signal, a digital signal switching circuit that alternately selects the modulation input signal and its two's complement, and a digital signal switching circuit that converts the output of the switching circuit into an analog signal and mutually 1 in a complementary relationship
a digital-to-analog converter that generates a set of analog outputs; a carrier-wave input terminal for receiving a carrier wave; a carrier-wave switching circuit that alternately selects the carrier wave and a waveform having an opposite phase relationship thereto; A modulation switching circuit that alternately switches one set of outputs every half cycle according to the output of the carrier switching circuit to output a balanced modulated wave; a filter connected to the output of the circuit that removes unnecessary waves outside the band; a modulated wave output terminal connected to the modulated wave output terminal, and a clock signal means for controlling switching of the digital signal switching circuit and the carrier wave switching circuit; A high-precision double-balanced modulator, characterized in that a second mode in which modulation is performed using a two's complement of an input signal and a negative phase wave of an input carrier wave is periodically and alternately switched by the clock signal means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16573581A JPS5868349A (en) | 1981-10-19 | 1981-10-19 | High-precision double balanced modulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16573581A JPS5868349A (en) | 1981-10-19 | 1981-10-19 | High-precision double balanced modulator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5868349A true JPS5868349A (en) | 1983-04-23 |
JPS6333825B2 JPS6333825B2 (en) | 1988-07-07 |
Family
ID=15818075
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16573581A Granted JPS5868349A (en) | 1981-10-19 | 1981-10-19 | High-precision double balanced modulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5868349A (en) |
-
1981
- 1981-10-19 JP JP16573581A patent/JPS5868349A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6333825B2 (en) | 1988-07-07 |
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