JPS5868048U - 発光ダイオ−ドの取付構造 - Google Patents

発光ダイオ−ドの取付構造

Info

Publication number
JPS5868048U
JPS5868048U JP16238081U JP16238081U JPS5868048U JP S5868048 U JPS5868048 U JP S5868048U JP 16238081 U JP16238081 U JP 16238081U JP 16238081 U JP16238081 U JP 16238081U JP S5868048 U JPS5868048 U JP S5868048U
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
mounting structure
diode mounting
optical fiber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16238081U
Other languages
English (en)
Other versions
JPS6236309Y2 (ja
Inventor
中矢 富夫
Original Assignee
スタンレー電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by スタンレー電気株式会社 filed Critical スタンレー電気株式会社
Priority to JP16238081U priority Critical patent/JPS5868048U/ja
Publication of JPS5868048U publication Critical patent/JPS5868048U/ja
Application granted granted Critical
Publication of JPS6236309Y2 publication Critical patent/JPS6236309Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は従来例の説明図、第2図は本考案の一実施例を
示す要部の断面図、第3図はその背面図、第4図及び第
5図は本考案の他の実施例をそれぞれ示す発光ダイオー
ドの側面図である。 1・・・光ファイバー、2・・・取付部材、2b、  
’lc・・・ガイド溝、3・・・発光ダイオード、3a
、  3b・・・リードフレーム、3C・・・発光体、
3e・・・発光部、4゜5・・・突起、6・・・光軸、
7・・・軸線。

Claims (1)

    【実用新案登録請求の範囲】
  1. 光ファイバーの端面に発光ダイオードの発光部を臨ませ
    て取付ける場合において、発光ダイオードフレームに位
    置決め用の突起を設け、−この突部を光ファイバーの取
    付部材に形成したガイド溝に嵌合する′ことにより、発
    光ダイオードの光軸と光ファイバーの軸線とを合致させ
    たことを特徴とする発光ダイオードの取付構造。
JP16238081U 1981-10-30 1981-10-30 発光ダイオ−ドの取付構造 Granted JPS5868048U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16238081U JPS5868048U (ja) 1981-10-30 1981-10-30 発光ダイオ−ドの取付構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16238081U JPS5868048U (ja) 1981-10-30 1981-10-30 発光ダイオ−ドの取付構造

Publications (2)

Publication Number Publication Date
JPS5868048U true JPS5868048U (ja) 1983-05-09
JPS6236309Y2 JPS6236309Y2 (ja) 1987-09-16

Family

ID=29954695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16238081U Granted JPS5868048U (ja) 1981-10-30 1981-10-30 発光ダイオ−ドの取付構造

Country Status (1)

Country Link
JP (1) JPS5868048U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0371665U (ja) * 1989-11-15 1991-07-19

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147887A (ja) * 1974-05-17 1975-11-27
JPS55121212U (ja) * 1979-02-21 1980-08-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50147887A (ja) * 1974-05-17 1975-11-27
JPS55121212U (ja) * 1979-02-21 1980-08-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0371665U (ja) * 1989-11-15 1991-07-19

Also Published As

Publication number Publication date
JPS6236309Y2 (ja) 1987-09-16

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