JPS5866104A - Controller - Google Patents

Abstract

PURPOSE:To make the bumpless switching possible, by allowing a holding system to track a main system with a certain time delay and allowing the holding system to track the main system, which is normal still, when the main system is switched to the holding system. CONSTITUTION:When a CPU9 is the main system, the CPU9 performs such operation that the speed of a turbine 1 is a set value, and a signal 9a is transmitted. During this time, a CPU10 leads a signal 31a of a counter 31 into a controller to track the CPU9. The signal 9a is selected in a driving circuit 26 and is inputted to a substractor 22. Signals 28a and 32a of converters 28 and 32 are compared with each other in a comparator 29, and the counter 31 is counted up (or down) when the signal 28a is larger (or smaller) than the signal 32a, and the signal 31a is converted to the analog signal 32a and is inutted to the comparator 29. By this operation, the signal 31a is not changed to the signal 9a rapidly but tracks it with a certain time delay and is supplied as to a signal 27b to the CPU10.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device with a redundant configuration that switches to a standby system and continues control if an abnormality occurs in the main system during operation.

Conventionally, there has been a device of this type as shown in FIG.

In FIG. 1, 1 is a turbine driven by steam, 2 is a valve that controls the flow rate of steam supplied to the turbine 1, and 3 is a valve 2.
4.5 is a pickup that generates an electrical pulse signal according to the rotation of the turbine 1; 6;
is a control device that controls the rotation speed of the turbine 10.

In the block of the control device 6, 7.8 is a pick-up
It inputs the pulse signals of channels 4 and 5, calculates the rotational speed of the turbine 1, and outputs the results as signals 7a and 9a.The speed channel consists of program input/output (PIO), and 9 and 10 are speed channels.・Central processing unit (C
(referred to as PU), 11.12 is the signal 9a of CPU9.10
Analog output (AO) inputting s10a, 13°14
is the signal 11. of the analog output 11.12. Signal 13a is the analog input (AI) that inputs a and j2a.

14a is supplied at cpul 0.91tC. 15 is a switch for selecting one of the signals 11a and 12a of the analog outputs 11 and 12, and 16 is a drive circuit that drives the valve 2 according to the output of the switch 15 and the signal 38 of the detector 3. Motsu.

FIG. 2 is a block diagram showing the functions of the CPU 9 shown in FIG. 1. The arithmetic circuit 11 calculates the set speed of the turbine 1, and sends the result to the subtracter 18 using a signal 17a.
Enter. The subtracter 18 calculates the deviation between the signal 7a of the speed channel 7 and the signal 17a of the arithmetic circuit 17,
A signal 18a is supplied to the controller 19. The controller 19 calculates a set value for the opening degree of the valve 2 from the signal 18a of the subtractor 18 and outputs it as a signal 19a. The function 20 corrects the signal 192 according to the flow rate vs. lift characteristic of the valve 2 and outputs the signal 9a as the opening setting value. Function 21 is the corresponding C
When PU9 is in the standby system, it is used as the main CPU in one game.
The IQ signal 14a is input and the function 20 is inversely corrected to obtain a signal 21a, which is input to the controller 19.

FIG. 3 is a block diagram showing the circuit configuration of the drive circuit 160. The subtracter 22 connects the output of the switch 15 and the detection circuit 2.
The deviation from the output of No. 3 is calculated and supplied to the controller 24 as a signal 22a. The controller 24 is the subtractor 22
A valve opening/closing signal is calculated from the signal 22a, and is supplied to the valve 2 via the buffer 25 to drive the valve 2. The opening degree of the valve 2 is detected by the detector 3 and inputted to the detection circuit 23 as a signal 3a.

Next, the operation will be described when the switch 15 is in the position shown, the CPU 9 is the main system, and the CPU is the standby system. The CPU 9 uses the function shown in FIG. 2 to calculate a setting value for increasing the rotational speed of the turbine 10 to be equal to the setting value of the calculation circuit 17, and outputs it as a degree signal 9a. The signal 9a is converted into an analog signal 11a by the analog output 11, and is sent to the drive circuit 1 via the switch 15.
6 is input. The drive circuit 16 drives the valve 2 according to the human power. The opening degree of the valve 2 is converted into a signal 3a by the detector 3, which is input to the subtractor 22&C via the detection circuit 23.
Here, the deviation from the output of the switch 15 is calculated. valve 2
When the opening degree of is equal to the set value given from switch 15, the output of subtractor 24.

That is, the deviation becomes 0, and the drive circuit 16 stops the valve 20 from moving.

Steam is supplied to the turbine 1Vc through the valve 2 whose opening degree is set in this way, and the turbine 1 rotates in proportion to the flow rate of the supplied steam. Ten revolutions of the turbine are detected by the pickup 4.5 and become signals 4a, 5a, which are input into the speed channel 7.8. From this K, the speed channel 1.8 outputs a signal 7as8a indicating the rotational speed of the turbine 10, and inputs it to the CPUs 9 and 10.

The CPU 9 calculates the aforementioned setting value from the signal 7a and outputs it as a signal 9a. On the other hand, the CPU 1o&t, as a standby system, introduces the signal 11a of the analog output 11 of the main system via the analog human power 13, and tracks the main system.

Therefore, even if the switch 15 is switched, as long as there is no abnormality in the main system, the stability of the control loop is maintained, and so-called bumpless switching is possible. The operation when the switch 15 is in the opposite position to that shown is also the speed channel 8,
CPU10 and analog output 12 are speed channel 7
, the CPU 5 and the analog output 11, and have the same configuration, so the explanation is the same as that described above.

Since the conventional control device is configured as described above,
Even if the main system becomes abnormal pressure and switches to the standby system, at that point the standby system is already tracking the abnormal main system, so the control loop cannot be stabilized immediately and a trap cannot be obtained, making bumpless switching impossible. There were drawbacks.

This invention was made in order to eliminate the above-mentioned drawbacks of the conventional system, and it tracks the standby system with a certain time delay with respect to the main system, and prevents switching to the standby system due to an abnormality in the main system. However, at that point, the standby system was still tracking the normal main system.
Therefore, it is an object of the present invention to provide a control device that can switch from a main system to a standby system in a quick manner.

An embodiment of the present invention will be described below with reference to the drawings. Fourth
The figure is a block diagram of the present invention, and the same reference numerals as in FIG. 1 indicate the same parts. In Figure 4,
Reference numeral 26 denotes a drive circuit which introduces signals 9a and IQa from the CPU 9 and IQ and controls the opening degree of the valve 2 according to these signals and the signal 3a from the detector 3, and is constructed as shown in FIG.

In the drive circuit 26 shown in FIG.
is introduced through the so-called input and output channels. 28 is a digital-to-analog converter (hereinafter referred to as a converter) that converts the signal 27a of the bus interface circuit 27 into an analog signal and outputs it as a signal 28a, and 29 is a controller that compares the signal 28a and the signal 32a (described later). Kureta, 30
A switch 31 selects the signal 29a of the comparator 29 or the MS signal input from the outside. 31 is an amplifier down-counter (hereinafter referred to as "down-counter") that counts up when the output of the switch 30 is positive and counts down when the output of the switch 30 is negative. , a counter), 32 is a digital-to-analog converter (hereinafter referred to as a converter) that converts the signal 31a, which is the count output of the counter 31, into an analog signal and outputs it as a signal 32a, and 33 is a signal indicating a manual request from the outside. It is a relay that is energized when MR is input, and when it is energized, both switches 30 and 34 are set to the opposite positions from those shown in the figure. The switch 34 receives the signal 28a of the converter 28 or the signal 3 of the converter 32.
2a to select it and supply it to the subtractor 22.

FIG. 6 shows the functions of the CPU 9.10 using equivalent circuit blocks, and has the same configuration as FIG. 2 except for some differences in the correspondence between input and output signals.

Next, the operation will be explained. The device operates in the following three ways.

(al CPU 9 is the main system %crtrlO is the standby system, (b) CPU 9 is the standby system, CPol 0
is the main system, (C1 signal MR is supplied and the device is
ie, when operating according to signal MRK.

First (in the case of aJ), the CPU 9 outputs the signal 19a from the controller 19 so that the rotational speed of the turbine 1 becomes equal to the signal 17aK of the arithmetic circuit 11, and
The signal 19a is corrected with 0 and the signal 9a is sent to the drive circuit 26. During this time, the CPU I O is operating as a standby system, inputting the signal 31a of the counter 31 to the controller 19 via the bus interface circuit 2T and the function 21 as a signal 21a, and tracking the CPU 9.

In the drive circuit 26, the signal 9a from the main CPU 9 is selected and applied to the subtracter 22 via the bus interface circuit 21.degree. converter 28 and switch 34.

Signal 28a of converter 28 is input to comparator 29 and compared with signal 32a of converter 32.

The comparator 29 makes the signal 29a negative to cause the counter 31 to count up when the signal 28a>signal 32a, and causes the counter 31 to count down when the opposite is true. The signal 31a of the counter 31 is converted into an analog signal 32a by the converter 32 and input to the comparator 29. Through these operations, the signal 31a of the counter 31 follows the signal 9a of the CPU 9 with a certain time delay without suddenly changing, and is supplied to the CPU 10 via the bus interface 27 as a signal 27b. In other words, CPolG is connected to CP through signal 2Tb.
Follow or track the UI O.

The operation in case (b) is as follows: (CPU5 in case of al)
This is the inverse of the 1°10 relationship, and is clear from the above explanation.

(The operation in case of C1 will be explained. In this case, the switches 30 and 34 are in the opposite position to that shown in the figure.

Signals 9a-10a of cpty9.10 are both blocked. During this time, the CPUs 9 and 10 track the signal 27bK supplied from the bus interface 27 and are in a standby state. The counter 31 counts up or down according to the signal MS, and the resulting signal 3
1a is connected to the subtracter 22 via a converter 32 and a switch 34.
is input.

The subtracter 22 calculates the deviation between the output of the switch 34 and the output of the detection circuit 23, and sends this to the controller 2 with a signal 22a.
Supply to 4. The controller 24 controls the opening and closing of the valve 2 via the buffer 25 so that the signal 22a becomes zero. The opening degree of the valve 2 is detected by the detector 3 as a signal 3a, and the detection circuit 23 further becomes a signal 23a. Therefore, the opening degree of the valve 2 corresponds to the count of the counter 31,
The turbine 1 is driven according to the opening degree. turbine 1
0 revolutions is detected by detector 4.5 and speed channel 7.8
I can input OK to CPU9 through , but CPU9
．． 10 performs the operations described above.

Thereafter, the switches 30, 34 are returned to the positions shown,
And when CPU9 is returned to the main system, CPU10 is (a
), perform the tracking described in the case of

In addition, in the above embodiment, the case where the control device controls a turbine has been described, but the controlled object may be a boiler or the like.

As described above, according to this invention, the standby system is configured to track the main system with a certain delay without sudden changes, so even if an abnormality occurs in the main system, this will not immediately propagate to the standby system. First, stable control can be easily obtained even when switching from the main system to the standby system due to an abnormality in the main system.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional control device, Fig. 2 is a functional block diagram of the CPU shown in Fig. 1, Fig. 3 is a circuit diagram of the drive circuit shown in Fig. 1, and Fig. 4 is a control according to the present invention. FIG. 5 is a block diagram showing one embodiment of the device, FIG. 5 is a block diagram of the drive circuit shown in FIG. 4, and FIG. 6 is a functional block diagram of the CPU shown in FIG. 4. DESCRIPTION OF SYMBOLS 1... Turbine, 2... Valve, 3, 4, 5... Detector, 6... Control device, 9, 10... CPU, 1
5゜30.34...Switch, 16.26...Drive circuit %31...Counter. In addition, in the figures, the same reference numerals indicate the same parts. sz diagram Figure 3

Claims (1)

[Claims] A main system and a standby system having the same required control functions are provided, and if an abnormality occurs in the main system when the control target is controlled by the main system, the system switches to the standby system and controls the control target. In a control device configured to continue,
A bus-interface circuit commonly connected to the main system and the standby system K/(), a first switch for selecting either an output signal of this interface circuit or an input signal for manual control, and this first switch. a counter that counts up or down according to the output of the switch No. 1 and supplies the counted result to the standby system via the interface circuit; 1st
A control device comprising: a second switch that is selected in conjunction with the switch; and a controller that controls the control target based on the output of the second switch.