JPS5864822A - Frequency voltage converting circuit - Google Patents

Frequency voltage converting circuit

Info

Publication number
JPS5864822A
JPS5864822A JP16264881A JP16264881A JPS5864822A JP S5864822 A JPS5864822 A JP S5864822A JP 16264881 A JP16264881 A JP 16264881A JP 16264881 A JP16264881 A JP 16264881A JP S5864822 A JPS5864822 A JP S5864822A
Authority
JP
Japan
Prior art keywords
frequency
power supply
signal
voltage
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16264881A
Other languages
Japanese (ja)
Inventor
Yoshimi Sakurai
桜井 芳美
Kohei Yabuno
薮野 光平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16264881A priority Critical patent/JPS5864822A/en
Publication of JPS5864822A publication Critical patent/JPS5864822A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K9/00Demodulating pulses which have been modulated with a continuously-variable signal
    • H03K9/06Demodulating pulses which have been modulated with a continuously-variable signal of frequency- or rate-modulated pulses

Abstract

PURPOSE:To output a voltage with less ripple in response to the frequency change of an AC power supply system through increased pulse number at one period of the AC power supply, by increasing the oscillating frequency of pulsive signals and decreasing the period with a voltage controlled oscillator. CONSTITUTION:An oscillating frequency f2 of a voltage controlled oscillator 8 is selected as (n) times an oscillating frequency f1, where the f1 is the frequency of an AC power supply system with the period T1 of a zero point detection signal (e) determined by the frequency of the AC power supply, then a period of an output signal (h) of the oscillator 8 becomes T1/n and the number of pulses in one period of the AC power supply is increased. The pulsive output signal (h) is taken as an input signal of a monostable multivibrator 9, and a rectangular wave signal (i) having a prescribed pulse width determined with the monostable multivibrator 9 passes through an integration circuit 10 to become an output voltage V'0. Thus, the oscillating frequency of the pulsive signal (h) is increased and the period is decreased, allowing to increase the number of pulses of one period of the AC power source. Thus, the ripple of the output voltage V'0 is less and the output voltage becomes a voltage in response to the frequency change of the AC power source.

Description

【発明の詳細な説明】 本発明は電力変換装置に係り、特に、交流電源系統の周
波数変化に応じた電圧を出力する周波数電圧変換回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power conversion device, and particularly to a frequency-voltage conversion circuit that outputs a voltage according to frequency changes in an AC power system.

藏動発電機の交流電源系統に接続された電力変換装置に
おいて、この電力変換装置の制御装置を発電機の交流電
源系統の周波数変化に応じた電圧で制御するために設け
る周波数電圧変換回路の一列を第1図に示す。第1図に
おいて、U、V、Wは、交流電源系統に接続された同期
電源用変圧器5によって得られた相電圧、1は各相電源
零点検出回路11,12.13によって構成する同期電
源零点検出回路、21はICの論理和回路、3は単安定
マルチバイブレータ、4は演算増幅器によって構成した
積分回路である。
In a power conversion device connected to the AC power supply system of the Kurodo generator, a row of frequency-voltage conversion circuits provided to control the control device of the power conversion device with a voltage corresponding to frequency changes of the AC power supply system of the generator. is shown in Figure 1. In FIG. 1, U, V, and W are phase voltages obtained by a synchronous power supply transformer 5 connected to an AC power system, and 1 is a synchronous power supply configured by each phase power supply zero point detection circuit 11, 12, and 13. A zero point detection circuit, 21 is an OR circuit of ICs, 3 is a monostable multivibrator, and 4 is an integration circuit constituted by an operational amplifier.

第2図は、第1図に示す周波数電圧変換回路の動作を説
明するためのタイムチャートである。
FIG. 2 is a time chart for explaining the operation of the frequency-voltage conversion circuit shown in FIG. 1.

a)は相電圧波形s b)m ”)s d)はU相、■
相、W相電源電圧の零点を相電源零点検出回路11.1
2.13によって検出した零点検出信号、e)はb)、
c)、d)の零点検出信号をIC21でオアをとった信
号、f)は単安定マルチバイブレータ3でパルス幅tと
した方形波信号、g)は積分回路4の出力波形でろ之。
a) is the phase voltage waveform s b) m ”) s d) is the U phase, ■
Phase and W phase power supply voltage zero point detection circuit 11.1
The zero point detection signal detected by 2.13, e) is b),
A signal obtained by ORing the zero point detection signals of c) and d) with the IC 21, f) is a square wave signal with a pulse width t from the monostable multivibrator 3, and g) is the output waveform of the integrating circuit 4.

第2図を用いて、第1図の周波数電圧変換回路の動作を
説明する。電動発電機の交流電源系統に接続した同期電
源用変圧器5を介して得られる各相電源電圧U、V、W
をそれぞれの相電源零点検出回路11.12.13に入
力すると、各U、V。
The operation of the frequency-voltage conversion circuit shown in FIG. 1 will be explained using FIG. 2. Each phase power supply voltage U, V, W obtained through the synchronous power supply transformer 5 connected to the AC power supply system of the motor generator
When inputting to each phase power supply zero point detection circuit 11, 12, 13, each U, V.

W相電源の零点と同期した零点検出信号b)sCLd)
が検出される。これらb)、c)、d)の信号を論理和
回路2でオアをとった信号e)を単安定マルチバイブレ
ータ30入力信号とすると、この単安定マルチバイブレ
ータの定数によって決まる一定のパルス幅tの方形波信
号f)が出力され、この方形波信号f)を積分回路4を
通してg)に示すような出力電圧V。が得られる。
Zero point detection signal b)sCLd) synchronized with the zero point of the W-phase power supply
is detected. If the signal e) obtained by ORing these signals b), c), and d) with the OR circuit 2 is used as the input signal to the monostable multivibrator 30, the pulse width t determined by the constant of this monostable multivibrator is A square wave signal f) is output, and this square wave signal f) is passed through an integrating circuit 4 to an output voltage V as shown in g). is obtained.

ここで、f)に示す方形波信号のパルス幅tは単安定マ
ルチバイブレータ3によって決まるために交流電源系統
の周波数が変化しても、この周波数変化に関係なく一定
であるが、周期Tは周波数変化に応じて変化する。以上
のことから、出力電圧■。は次のような関係がある。
Here, the pulse width t of the square wave signal shown in f) is determined by the monostable multivibrator 3, so even if the frequency of the AC power supply system changes, it remains constant regardless of this frequency change, but the period T is determined by the monostable multivibrator 3. Change according to change. From the above, the output voltage ■. has the following relationship.

Vo   E・−・・・・・・・・・(1)ここで、 
  ’o  (fo  :交流電源系統の周波数)であ
るから vo  、fo       ・・・・・・・・・(2
)となる。すなわち1.積分回路4.の出力電圧V。は
(2)式で示されるように、交流電源系統の周波数に比
例した値が出力されることになる。ここで、積分回路4
の出力電圧V。は、積分回路の定数1(、i、l(、f
、(:’fのよって決まる時定数で、充放電を繰り返す
ことになるために1図示のようにリップルが含まれるこ
とになり、このリップルが大きいと問題となる。例えば
、核融合装置のコイル電源のサイリスタ変換装置は、電
動発電機の交流電源系統に接続されるため、その周波数
が大巾に変動する。そこで、前述した周波数電圧変換回
路で変換した電圧を用いて変換装置の位相制御装置を制
御することが考えられている。しかし、この場合、周波
数電圧変換回路の出力電圧のりツプルが問題となり、リ
ップルの小さな電圧が必要となる。この出力電圧v0の
リップルを小さくする方法として、積分回路4の時定数
τ=l’ji−Cfを大きくすることがあるが、このτ
を大きくすると周波数電圧変換回路の出力電圧■。の周
波数変化時の応答時間が遅くなるという問題がある。そ
こで、第3図に示すような方法がある。
Vo E・-・・・・・・・・・・・・(1) Here,
'o (fo: frequency of the AC power system), so vo, fo......(2
). That is, 1. Integrating circuit 4. The output voltage V. As shown in equation (2), a value proportional to the frequency of the AC power system is output. Here, the integrating circuit 4
The output voltage V. is the constant 1(,i,l(,f
, (:' Since charging and discharging are repeated with the time constant determined by f, ripples are included as shown in Figure 1. If this ripple is large, it becomes a problem.For example, when the coil of a nuclear fusion device Since the thyristor conversion device of the power supply is connected to the AC power supply system of the motor generator, its frequency fluctuates widely. Therefore, the phase control device of the conversion device uses the voltage converted by the frequency-voltage conversion circuit described above. However, in this case, the output voltage ripple of the frequency-voltage conversion circuit becomes a problem, and a voltage with small ripple is required.As a method to reduce the ripple of this output voltage v0, integration Although the time constant τ=l'ji−Cf of circuit 4 may be increased, this τ
If you increase , the output voltage of the frequency-voltage conversion circuit■. There is a problem that the response time when the frequency changes is slow. Therefore, there is a method as shown in FIG.

第3図において%1,6は各相電源零点検出回路11〜
13.61〜63で構成した同期電源零点検出回路、2
はIC21〜23で構成した論理和回路、3は単安定マ
ルチバイブレータ、4は積分回路、5,7は同期電源用
変圧器で、この同期電源用変圧器5,7によって得られ
る相電圧U。
In Fig. 3, %1 and 6 are each phase power supply zero point detection circuit 11~
13. Synchronous power supply zero point detection circuit composed of 61 to 63, 2
3 is a monostable multivibrator, 4 is an integrating circuit, 5 and 7 are synchronous power supply transformers, and phase voltage U obtained by the synchronous power supply transformers 5 and 7.

V、Wとtr/ 、 v/ 、 w/とは30度の位相
差がある。したがって、各相同期電源の零点を検出した
零点検出信号の論理和をとつに信号e)は、第1図の場
合に比して交流電源1周期中の・くルス数が多くなり周
期Tが1/2となる。そのために、単安定マルチバイブ
レータ3によって決まるノぐルス幅tも第1図の場合に
比べて狭くする必要があるが、その比率t/Tを一定と
すれば積分回路4の出力電圧V。のリップルを小さくす
ることが可能である。すなわち、リップルを小さくする
ために、単安定マルチバイブレータ3の入力信号のパル
ス数を多くしてその周期Tを短くすれば良いtとがわか
る。しかし、第3図のような方法で単安定マルチバイブ
レータ3の入力信号e)のパルス数を多くするためには
、ある位相差、例えば交流電源1周期に12パルスとす
る場合には、同期電源用変圧器が2組でその位相差30
度、24パルスの場合は4組で位相差15度のように同
期電源用変圧器を設ける必要がるる。そのために、この
ような方法で交流電源1周期中のパルス数を多くするこ
とは装置も大きくなり容易ではない。
There is a phase difference of 30 degrees between V and W and tr/, v/, and w/. Therefore, by calculating the logical sum of the zero point detection signals that detect the zero point of each phase synchronous power source, the signal e) has a larger number of pulses in one cycle of the AC power source than in the case of Fig. 1, and the period T becomes 1/2. Therefore, the noggle width t determined by the monostable multivibrator 3 also needs to be narrower than in the case of FIG. 1, but if the ratio t/T is constant, the output voltage V of the integrating circuit 4. It is possible to reduce the ripple. That is, it can be seen that in order to reduce the ripple, it is sufficient to increase the number of pulses of the input signal of the monostable multivibrator 3 and shorten the period T thereof. However, in order to increase the number of pulses of the input signal e) of the monostable multivibrator 3 using the method shown in FIG. There are two sets of transformers and their phase difference is 30
In the case of 24 pulses, it is necessary to provide four sets of synchronous power transformers with a phase difference of 15 degrees. Therefore, it is not easy to increase the number of pulses in one cycle of the AC power supply using this method because the device becomes larger.

本発明の目的は、交流電源系統の周波数変化に応じたリ
ップルの小さな電圧を出力する周波数電圧変換回路を提
供するにある。
An object of the present invention is to provide a frequency-voltage conversion circuit that outputs a voltage with small ripples in response to frequency changes in an AC power supply system.

交流電源系統の周波数変化に応じたりツプルの小さな電
圧を出力する周波数電圧変換回路を実現するには、積分
回路の入力信号となる繰返し方形波信号の周期が短かけ
れば養い。周期の短い方形波信号を単安定マルチバイブ
レータ等で作る場合は、この方形波信号の基準となる入
力信号のパルス数を多くして周期を短くする必要がある
。そこで、本発明は上述したパルス数を多くして周期を
短くするという考え方に基づいているJ・以下、本発明
の一実施例を第4図に示す。相電圧U、V、W及びU/
 、V/ 、W/を得る同期電源用変圧器は省略してい
る。第4図中、8は電圧制御発振器、9は単安定マルチ
バイブレータ、。
In order to realize a frequency-voltage conversion circuit that responds to frequency changes in an AC power supply system and outputs a voltage with a small tipple, it is necessary to shorten the period of the repetitive square wave signal that serves as the input signal to the integrating circuit. When creating a square wave signal with a short period using a monostable multivibrator or the like, it is necessary to shorten the period by increasing the number of pulses of the input signal that serves as a reference for this square wave signal. Therefore, the present invention is based on the above-mentioned concept of increasing the number of pulses and shortening the cycle.An embodiment of the present invention is shown in FIG. 4 below. Phase voltages U, V, W and U/
, V/, and W/ are omitted. In FIG. 4, 8 is a voltage controlled oscillator, and 9 is a monostable multivibrator.

10は積分回路であり、最終的な出力電圧はv′。10 is an integrating circuit, and the final output voltage is v'.

となる。becomes.

第5図は、第4図に示す本発明の実施例の動作を説明す
るだめのタイムチャートである。e)は各相の零点検出
信号を論理和回路2でオアをとった信号、f)は単安定
マルチバイブレータ3でパルス幅t、とした方形波信号
、g)は積分回路4の出力、h)は電圧制御発振器8の
出力信号、i)は単安定マルチバイブレータ9でパルス
幅ttとした方形波信号、j)は積分回路10の出力波
形でろる。
FIG. 5 is a time chart for explaining the operation of the embodiment of the present invention shown in FIG. e) is a signal obtained by ORing the zero point detection signal of each phase with OR circuit 2, f) is a square wave signal with pulse width t from monostable multivibrator 3, g) is the output of integrating circuit 4, h ) is the output signal of the voltage controlled oscillator 8, i) is a square wave signal with pulse width tt from the monostable multivibrator 9, and j) is the output waveform of the integrating circuit 10.

第4図の動作を第5図を用いて以下説明する。The operation shown in FIG. 4 will be explained below using FIG. 5.

第4図において、A以前の構成は第3図と同様である。In FIG. 4, the configuration before A is the same as that in FIG. 3.

すなわち、交流電源系統に接続された同期電源用変圧器
5,7で得た相電圧U、。79w及びU/ 、V/ 、
W/を同期電源零点検出回路1,6に入力し、これらの
相電圧の零点に同期した零点検出信号を検出し、これら
の各信号を論理和回路2でオアをとり出力信号e)とな
る。次に、との゛信号e)を単安定マルチバイブレータ
3でパルス幅t1の方形波信号を出力口、積分回路4で
第5図g)に示す電圧v0を出力する。次に、電圧制御
発振器8は、入力電圧の大きさに比例した周波数のパル
ス状の信号を発生する発振器である。そこで1本回路構
成では、積分回路4の出力電圧voに応じた周波数で発
振し、第5図h)に示すような信号を発振する。
That is, the phase voltage U obtained by the synchronous power transformers 5 and 7 connected to the AC power system. 79w and U/, V/,
W/ is input to the synchronous power supply zero point detection circuits 1 and 6, the zero point detection signals synchronized with the zero points of these phase voltages are detected, and each of these signals is ORed by the OR circuit 2 to become the output signal e). . Next, the monostable multivibrator 3 outputs the signal e) as a square wave signal with a pulse width t1, and the integrating circuit 4 outputs the voltage v0 shown in FIG. 5g). Next, the voltage controlled oscillator 8 is an oscillator that generates a pulse-like signal with a frequency proportional to the magnitude of the input voltage. Therefore, in a single circuit configuration, it oscillates at a frequency corresponding to the output voltage vo of the integrating circuit 4, and oscillates a signal as shown in FIG. 5h).

ここで、交流電源系統の周波数によって決まる零点検出
信号e)の周期をT、とした場合の周波数f□に対し、
電圧制御発振器8の発振周波数をf、とし、f8のn倍
の発振周波数となるような定数にしておくと、電圧制御
発振器8の出力信号h)の周期T、はT 1 / nと
なり、交流電源1周期中のパルス数が多くなる。このパ
ルス状の出力信号h)を単安定マルチバイブレータ9の
入力信号とし、この単安定マルチバイブレータ9で決ま
るパルス幅t2の方形波信号i)とし積分回路10を通
してj)に示す出力電圧V。′が出力される。このよう
に、電圧制御発振器8によって。
Here, for the frequency f□ when the period of the zero point detection signal e) determined by the frequency of the AC power supply system is T,
Let f be the oscillation frequency of the voltage controlled oscillator 8, and set it to a constant so that the oscillation frequency is n times f8, then the period T of the output signal h) of the voltage controlled oscillator 8 becomes T1/n, and the AC The number of pulses in one cycle of power supply increases. This pulsed output signal h) is used as an input signal to a monostable multivibrator 9, and is made into a square wave signal i) with a pulse width t2 determined by this monostable multivibrator 9, and is passed through an integrating circuit 10 to produce an output voltage V shown in j). ' is output. Thus, by the voltage controlled oscillator 8.

最終出力V。′に寄結するパルス状の信号h)の発振周
波数を高くして周期を短くすることにより、交流電源1
周期のパルス数を多くすることができる。これによって
、積分回路10の出力電圧v0′のリップルは小さくな
り場合によってはほとんどなくなり、さらに、交流電源
系統の周波数変化に応じた電圧となる。
Final output V. By increasing the oscillation frequency and shortening the period of the pulse-like signal h) connected to AC power source 1,
The number of pulses per cycle can be increased. As a result, the ripple in the output voltage v0' of the integrating circuit 10 becomes small, almost eliminated in some cases, and the voltage becomes responsive to the frequency change of the AC power supply system.

第6図は、本発明の他の実施例を示す。第6図では、第
4図のA以降の構成を示す。第6図において、11はフ
リップ・フロップ回路、4.10は積分回路、12は電
圧−周波数変換器、13は分周回路である。ここで、電
圧−周波数変換器12は入力電圧の大きさに応じた周波
数(周期)の繰返し方形波信号を発生するものである。
FIG. 6 shows another embodiment of the invention. FIG. 6 shows the configuration after A in FIG. 4. In FIG. 6, 11 is a flip-flop circuit, 4.10 is an integrating circuit, 12 is a voltage-frequency converter, and 13 is a frequency dividing circuit. Here, the voltage-frequency converter 12 generates a repetitive square wave signal with a frequency (period) depending on the magnitude of the input voltage.

第6図の動作を以下説明する。The operation of FIG. 6 will be explained below.

第6図において、フリップ・フロップ回路11はs e
)の零点検出信号をセット信号とし、分周回路13の出
力信号n)をリセット信号とすることで、フリップ・フ
ロップ回路11の出力信号k)は繰返しの方形波信号と
なる。この信号k)を積分回路4に入力して出力電圧v
0を得る。次に、この電圧■。を電圧−周波数変換器の
入力電圧とすると、とのvoに対応した周期T、の繰返
し方形波信号m)が出力信号として得られる。ここで、
この繰返し方形波信号m)の周期T2は。
In FIG. 6, the flip-flop circuit 11 is s e
) is used as a set signal, and the output signal n) of the frequency divider circuit 13 is used as a reset signal, so that the output signal k) of the flip-flop circuit 11 becomes a repetitive square wave signal. This signal k) is input to the integrating circuit 4 and the output voltage v
Get 0. Next, this voltage ■. When is the input voltage of the voltage-frequency converter, a repetitive square wave signal m) with a period T corresponding to vo is obtained as an output signal. here,
The period T2 of this repetitive square wave signal m) is:

零点検出信号e)の周期T1のl / nとなるように
設定しておく。したがって、積分回路10の入力信号m
)は、零点検出信号e)に比べ周期が短くな2ている。
The period is set to l/n of the period T1 of the zero point detection signal e). Therefore, the input signal m of the integrating circuit 10
) has a shorter period than the zero point detection signal e).

これにより、積分回路10の出力電圧v0′のリップル
は小さくなり場合によってはほとんどなくなり、さらに
、交流電源系統の周波数置化に応じた電圧を得ることが
できる。なお、方形波信号m)は積分回路100人力と
なる一方、分周回路13の入力信号とし、この分周回路
13で零点検出信号e)の周期T1相当の信号であるn
)を出力し、フリップ・フロップ回路11のリセット信
号としている。すなわち、零点検出信号e)の周期T、
に周波数f1とすると、電圧−周波数変換器12の出力
信号m)の周期T2、発振周波数f2はflのn倍とな
るように設定しているので、分周回路13はf 2 /
 nの発振周波数になるように分周することになる。
As a result, the ripple in the output voltage v0' of the integrating circuit 10 becomes small and, in some cases, almost eliminated, and furthermore, it is possible to obtain a voltage that corresponds to the frequency variation of the AC power supply system. In addition, the square wave signal m) becomes an input signal of the integrating circuit 100, and is used as an input signal of the frequency dividing circuit 13, and this frequency dividing circuit 13 converts n, which is a signal corresponding to the period T1 of the zero point detection signal e).
) is output as a reset signal for the flip-flop circuit 11. That is, the period T of the zero point detection signal e),
Assuming that the frequency is f1, the period T2 of the output signal m) of the voltage-frequency converter 12 and the oscillation frequency f2 are set to be n times fl.
The frequency is divided so that the oscillation frequency becomes n.

本実施例では同期電源用変圧器を2組用いた場合につい
て説明しているが、同期電源用変圧器が1組の場合も当
然適用できる。
Although this embodiment describes the case where two sets of synchronous power transformers are used, the present invention can also be applied to a case where only one set of synchronous power transformers is used.

本発明によれば、交流電源系統の周波数変化に応じたリ
ップルの小さな電圧を得ることができる。
According to the present invention, it is possible to obtain a voltage with small ripples that corresponds to frequency changes in an AC power supply system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は周波数電圧変換回路図、第2図は第1図の動作
図、第3図は周波数電圧変換回路(g、第4図は本発明
の実施例のブロック図、第5図は第すブロック図である
Figure 1 is a diagram of the frequency-voltage conversion circuit, Figure 2 is an operational diagram of Figure 1, Figure 3 is the frequency-voltage conversion circuit (g, Figure 4 is a block diagram of an embodiment of the present invention, and Figure 5 is a FIG.

Claims (1)

【特許請求の範囲】 1、交流電源系統に接続された同期電源用変圧器。 この変圧器によって得られる相電圧の零点を検出、。 する同期電源零点検出回路、この同期電源零点検出回路
の零点検出信号のオアをとる論理和回路、この論理和回
路からの信号を基に方形波信号を出力する単安定マルチ
バイブレータ、この単安定マルチバイブレータの出力信
号を積分する積分回路を基本構成として交流電源系統の
周波数変化に応じた電圧を出力する周波数電圧変換回路
において、前記同期電源零点検出回路から得られる前記
零点検出信号の周期を基に、前記零点検出信号の周期よ
り短い周期の信号を発生し、前記交流電源1周期中のパ
ルス数を多くする手段を具備したことを特徴とする周波
数電圧変換回路。
[Claims] 1. A synchronous power supply transformer connected to an AC power system. Detect the zero point of the phase voltage, obtained by this transformer. a synchronous power supply zero point detection circuit, an OR circuit that ORs the zero point detection signal of this synchronous power supply zero point detection circuit, a monostable multivibrator that outputs a square wave signal based on the signal from this OR circuit, and a monostable multivibrator that outputs a square wave signal based on the signal from this OR circuit. In a frequency-voltage conversion circuit that has an integral circuit that integrates an output signal of a vibrator as its basic structure and outputs a voltage according to a frequency change of an AC power supply system, the frequency-voltage conversion circuit is configured based on the period of the zero-point detection signal obtained from the synchronous power supply zero-point detection circuit. . A frequency-voltage conversion circuit, comprising means for generating a signal having a cycle shorter than the cycle of the zero point detection signal and increasing the number of pulses in one cycle of the AC power supply.
JP16264881A 1981-10-14 1981-10-14 Frequency voltage converting circuit Pending JPS5864822A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16264881A JPS5864822A (en) 1981-10-14 1981-10-14 Frequency voltage converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16264881A JPS5864822A (en) 1981-10-14 1981-10-14 Frequency voltage converting circuit

Publications (1)

Publication Number Publication Date
JPS5864822A true JPS5864822A (en) 1983-04-18

Family

ID=15758610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16264881A Pending JPS5864822A (en) 1981-10-14 1981-10-14 Frequency voltage converting circuit

Country Status (1)

Country Link
JP (1) JPS5864822A (en)

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