JPS5864512A - Controller - Google Patents

Abstract

PURPOSE:To make a smooth connection while reducing the amount of disturbance, by applying a frequency control loop with a specific voltage generator output voltage up to the detection range of a frequency detector, or with a phase control loop output voltage beyond the detection range, and thus controlling the frequency. CONSTITUTION:When a disk is started, a synchronizing signal frequency is lower than a desired value, so a switching circuit 15 connects a switch 14 to a voltage source 13. Then, a frequency control loop increases a voltage applied to a disk motor 12 while a voltage from a voltage source 13 is added and when the synchronizing signal frequency enters into the range of detection, the circuit 15 connects the switch 14 to the output terminal of a phase comparator 10. Consequently, a phase comparison loop operates to coincide the output with the synchronizing signal frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a signal reproduction speed 1 of a recording medium on which a synchronization signal is recorded.
This invention relates to a control device that controls the temperature.

Figure 1 shows an example of a signal playback speed control system for a PCM disc player. In Figure 1, 1 is a PCM digital audio disc, and in order to increase the recording density, signals are recorded regardless of the position on the inner or outer periphery of the disc. CL V (Con5tant Line) whose linear velocity is constant
r Velocity) method is adopted. Therefore, it is necessary to change the rotation speed of the motor 12 depending on the read position of the disk.

Reference numeral 2 denotes a synchronization signal detection and reproducing circuit, which detects a synchronization signal contained in a signal read from the disk and outputs only a synchronization signal pulse.

Reference numeral 3 denotes a frequency-voltage converter (hereinafter abbreviated as an F-V converter), which generates a voltage according to the output frequency of the synchronization signal detection and regeneration circuit 2. 4 is an LPF (low frequency wave filter), and 5 is an error amplifier. The error amplifier 5 amplifies the difference between the voltage input via the LPF 4 and the reference voltage 6 and outputs the amplified difference. 7 is a drive amplifier for the disk motor 12, and the output of the drive amplifier 7 is fed back to the disk motor 12 to reduce rotational speed errors. Generally 1°2.5, 4,5,
6, 7. The loop composed of 12 is called a frequency control loop (
It is called the P-loop (hereinafter referred to as P-loop) and functions to reduce rotational speed unevenness. Although the rotation speed is determined by the reference voltage 6, phase control is performed to ensure the accuracy and stability of the synchronization signal.

That is, 1. 2. 16. 8. 9. 10, 1
The absolute value of the rotational speed is matched by a phase control loop composed of 1.7°12. This loop is generally called 1 loop.

The signal output from the reference frequency oscillator 8 is passed through the Zo2 frequency divider 9 with a duty cycle of 50g6, and the frequency signal output from the Zo2 frequency divider 9 and the synchronization signal pulse from the synchronization signal detection and regeneration circuit 2 are sent to the divider 16. A signal having the same frequency as the output of the 1/2 frequency divider 9 and the same duty cycle of 50% is inputted to the phase comparator 10 through the phase comparator 10, which outputs a voltage according to the phase difference between the two signals. The phase comparator 10 is constituted by an exclusive OR circuit as shown in FIG.

In the case of 180°, the output 10 is as shown in Figure 2 (a) (b) (
As shown in c), in the case of 900, the duty cycle of 10 outputs is 50%. By passing the output 10 through the LPFll, a voltage corresponding to the phase difference is output as shown in FIG. 2(d). When the phase difference is 90°, the voltage is V2, and when the phase difference is between 0° and 90°, the voltage 9 is o - V/2.
When the angle is 0' to 180°, a voltage of V2 to V is generated18
00~360'' is 0''~180° and the opposite slope is 0~0.
The potential changes, and the above characteristics are repeated every 360 degrees.

The output of the phase comparator 10 is added to the frequency control loop by the amplifier 7 via the amplifier 11, and is applied to the disk motor 12 as a drive signal, so the rotation speed is fixed at the reference frequency of the reference frequency oscillator 8. . In the system shown in FIG. 1, if we consider the case where the disk is started from a stopped state, the synchronization signal frequency of the synchronization signal detection and reproduction circuit 2 is lower than the normal frequency, so F - V
The converter 3 outputs a low voltage, and the error amplifier 5 outputs a positive voltage to try to accelerate the motor of the disk motor 12. At this time, the output frequency of the divider 16 is
Since the frequency is different from that of
The output of the phase comparator 10 randomly generates positive and negative voltages. Since the output of 11 is random, the time average is almost 0, but if the gain of the loop is high, the output of 11 added to amplifier 7 will be P
This causes a loose disturbance, which delays the stabilization time of the thread.
In extreme cases, this may cause oscillation.An object of the present invention is to eliminate the above-described drawbacks of the prior art and to provide a control device that operates stably even when the disk motor is started.

For this reason, the present invention turns off the phase comparator output of the loop until the rotation of the disk motor approaches the normal rotation speed, so that the first loop does not adversely affect the P looseness when starting the disk motor. The purpose is to apply a specific voltage instead of an output, detect that the rotation of the disk motor is close to normal, and turn on the I-loop.

FIG. 3 shows an embodiment of the present invention. In Figure 3, 1
3 is a specific voltage source υ, 14 is a changeover switch between the output of the phase comparator 10 and the voltage source 13, 15 counts the synchronizing signal frequency, and when the synchronizing signal frequency is within a certain range, the switch 14 This is a frequency detection circuit that is connected to the phase comparator 10 side, and when it is outside a certain range, is connected to the specific voltage source 13 side. Here, the phase comparator 1 of the frequency detection circuit 15
The operation center of the 0 phase comparator 10, which detects whether or not 0 is a frequency within the range of operation from 0 to 180° (or 180° to 360°), is set at the center of operation during steady rotation to ensure a wide dynamic range. 50 cycles, that is, a phase difference of 9
The angle is set to 0° (the state shown in FIG. 2(b)).

The voltage of the specific voltage source 13 is set to V2, which is 50 tlb of the pulse voltage V output from the phase comparator 10. In the circuit shown in FIG. 3, when the disk is started, the switching circuit 15 connects the switch 14 to the voltage source 15 because the synchronizing signal frequency is lower than the target value. The P loop increases the voltage applied to the disk motor 12 while adding the voltage source 13, and when the synchronizing signal frequency falls within the detection range of the frequency detection circuit 15, the switching circuit 15 switches the switch 14 to the phase comparator 1.
0 output, and the phase comparison loop operates to match the synchronization signal frequency to the target frequency. Under steady-state operating conditions,
The duty cycle of the output of the phase comparator 10 is 50%, and the voltage from the loop added to the amplifier 7 matches the voltage of the voltage source 13.As described above, in the circuit shown in FIG. It is possible to stably transition to a steady state in a short time without adversely affecting the P loop as a disturbance caused by one loop when the disk is started.

As described above, according to the present invention, in a frequency control system consisting of the P-loop and the ■-loop, the ■-loop is not added as a disturbance to the P-loop until the control frequency approaches the target frequency. Since the P loop converges to the target frequency and the ■ loop is set to the target voltage, it is possible to connect smoothly with little disturbance even during loop addition.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the signal playback speed control system of a P(,M disc player). FIG. 2 is a diagram of the principle of exclusive-OR phase comparison. FIG. 6 is a block diagram of an embodiment of the present invention. 10. ... Phase comparator 13 ... Specific voltage source 14 ... Switch 15 ... Frequency detection circuit Patent attorney Susuki 1) Toshiyuki

Claims (1)

[Claims] 1. Equipped with a frequency control loop, a phase control loop having a phase comparator, a frequency detector, a switching device, and a specific voltage generator, the switching device is driven by the output of the frequency detector, and the frequency The frequency is controlled by adding the output voltage of the specific voltage generator to the frequency control loop until it reaches the detection range of the frequency detector, and adding the output voltage of the phase control loop outside the detection range of the frequency detector to the frequency control loop. A control device characterized by: