JPS5864149U

JPS5864149U - echo canceller

Info

Publication number: JPS5864149U
Application number: JP15637381U
Authority: JP
Inventors: 青柳　勝
Original assignee: 日本電気株式会社
Priority date: 1981-10-22
Filing date: 1981-10-22
Publication date: 1983-04-30

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来のエコーキャンセラを一般の電話回線に挿
入した状態を示す接続図、第２図は従来のエコーキャン
セラを会議電話回線に適用した状態を示す接続図、第３
図は本考案の一実施例を示す接続図、第４図は本考案の
他の実施例を示す接続図である。図において、１・・・２線式端末、２・・・ハイブリッ
ド弓イル、３・・・４線式回線の受信側回線、４・・・
４線式回線の送信側回線、５・・・エコーキャンセラ、
６・・・分岐増幅器、５１・・・制御回路、５２・・・
信号処理回路、５３・・・加算回路、５４〜５６・・・
時分割面路。Figure 1 is a connection diagram showing a conventional echo canceller inserted into a general telephone line, Figure 2 is a connection diagram showing a conventional echo canceller applied to a conference telephone line, and Figure 3 is a connection diagram showing a conventional echo canceller applied to a conference telephone line.
The figure is a connection diagram showing one embodiment of the present invention, and FIG. 4 is a connection diagram showing another embodiment of the present invention. In the figure, 1...2-wire terminal, 2...Hybrid cable, 3...Receiving side line of 4-wire line, 4...
4-wire line transmitter line, 5... echo canceller,
6... Branch amplifier, 51... Control circuit, 52...
Signal processing circuit, 53... Addition circuit, 54-56...
Time division plane road.

Claims

[Scope of utility model registration request]

(1) Connected between the receiving line and the transmitting line of a 4-wire line, and outputs a signal that cancels the signal from the receiving line that goes around to the transmitting line via the hybrid coil on the terminal side. a signal processing circuit that adds the output of the signal processing circuit to the transmission side line; and a signal processing circuit that compares the signal of the reception side line and the output signal of the addition circuit to minimize the output signal of the addition circuit. In the echo canceller, the echo canceller is provided with a control circuit for controlling the signal processing circuit so that the signal processing circuit and the addition circuit are respectively provided for a plurality of four-wire lines, and the control circuit controls the signal processing circuit so that the An echo canceller characterized by controlling multiple signal processing circuits.

(2) Utility Model Registration Scope of the Claims The echo canceller according to claim 1, further comprising a time division circuit for time division connection of the control circuit to the transmitting side, the receiving side, and the signal processing circuit of the plurality of four-wire lines. Something that is characterized by something.