JPS5862976A - Video signal processing system - Google Patents

Video signal processing system

Info

Publication number
JPS5862976A
JPS5862976A JP56160171A JP16017181A JPS5862976A JP S5862976 A JPS5862976 A JP S5862976A JP 56160171 A JP56160171 A JP 56160171A JP 16017181 A JP16017181 A JP 16017181A JP S5862976 A JPS5862976 A JP S5862976A
Authority
JP
Japan
Prior art keywords
picture elements
information
circuit
adjacent
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56160171A
Other languages
Japanese (ja)
Other versions
JPH0244188B2 (en
Inventor
Tetsuzo Tanimoto
谷本 哲三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56160171A priority Critical patent/JPS5862976A/en
Publication of JPS5862976A publication Critical patent/JPS5862976A/en
Publication of JPH0244188B2 publication Critical patent/JPH0244188B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To obtain illumination information with high accuracy from optical information, by approximating the change in a video signal between picture elements with a straight line tied with the video information of adjacent picture elements, and assigning a plurality of sets of information on the straight line for the part between the picture elements. CONSTITUTION:An image sensor 1 receives information of light (a) and outputs serially a video signal (b) in synchronizing with a clock (g) from a clock generator 2. This signal (b) is converted into a digital signal with an A/D converter 3 at each picture element and stored in a storage circuit 5. Digital signals for adjacent picture elements' share are read out to two registers 7, 8 sequentially from the circuit 5. In an operation circuit 10, the difference of data of the adjacent two picture elements is calculated, this difference is proportionally shared for the picture elements, to assign a plurality of digital data.

Description

【発明の詳細な説明】 本発明は、イメージセンサにおける隣り合う一票間の映
像情11を、それぞれの画素が持つ映儂情報から求める
ようになした映導信号爲壇方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video signal processing system in which video information 11 between adjacent votes in an image sensor is obtained from video information possessed by each pixel.

イメージセン!は、微小面積のフォトエレメント(−索
)を一定のピッチで配醸し、各−巣が検出する光重!電
気量に変換して、谷爾累罎にデータを直列に送出する索
子である。イメージセンサにはライン虚とエリア屋があ
り、11#はlll1素を直−状に並べた−ので光を一
次元的に検出し、後者は画素をS盤目状に遍べたもので
光を平面的(二次元的)K検出する゛。
Image center! The photo element (-cable) with a small area is arranged at a constant pitch, and the light weight detected by each nest is measured! It is a cable that converts the data into electrical quantity and sends the data serially to the terminal. There are two types of image sensors: line imaginary and area ya. 11# has 11 pixels arranged in a straight line, so it detects light one-dimensionally, and the latter has pixels arranged in an S grid pattern, which detects light. Planar (two-dimensional) K detection.

今、Mllのようにイメーザセν!1の両頭n −S 
、 n −2,・−の定量方向f K (d vて、破
dIαに示すような照度分布の光を入射すると、各画素
n−5,n−2・・・はその受光面での平場的な照度を
検出するので、イメージセンt1は階段状の快晴信号−
を出力する。ここで、どの画素の出力にも一致しないレ
ベルC−瀘)Cを設定し、このレベル゛0を与える画素
を見いだそうとした場合、従来は、レベルCに対し大小
の、n*が逆となる挟摩偏号出力d、−を持り互いに隣
り合うm索ル、s+1のうち一方のIII素な1゜求め
るIdi索としてい友。しかし、この方法は。
Now, like Mll, image ν! 1 double-headed n −S
, n -2, . . . When light with an illuminance distribution as shown in dIα is incident, each pixel n-5, n-2, . . . Since the image center t1 detects the brightness of the brightness, the image center t1 has a step-like clear sky signal -
Output. Here, if you set a level C-C that does not match the output of any pixel and try to find a pixel that gives this level 0, conventionally, n* of magnitude is opposite to level C. Let's use it as an Idi index to find one III prime 1° of the adjacent m indexes, s+1, which have pincer polarization outputs d and -. But this method.

光αの情報によって画素1のピッチに4当する寸法にし
かパターンの位置を分解することができないので、より
高槽度の位置決めが必要な装置のパターン位置−繊手段
として応用するには。
Since the position of the pattern can only be resolved into a dimension corresponding to 4 pitches of pixels 1 based on the information of the light α, this method can be applied as a pattern positioning means for a device that requires a higher degree of positioning.

検出精度上問題がある。このような不都合t−解決する
方法として、より画素ピッチの小さいイメージセンナを
選ぶ方法、あるいはイメージ七ンtK像を結像させる光
学系の倍率を大きくする方法が考えられるが、イメージ
七ン!の製造上の制限、検出範囲の制約により解決は困
−であった。
There is a problem with detection accuracy. Possible ways to solve this inconvenience include choosing an image sensor with a smaller pixel pitch, or increasing the magnification of the optical system that forms the image. It has been difficult to solve this problem due to manufacturing limitations and limitations on the detection range.

本発明の目的は、上記した従来fft術の欠点ななくシ
、イメージ七ンtにおいて照度の慣出分$1!lを媚め
、位W債出の高精度化を考慮した映儂偏号処理方式を提
供するにある。
The purpose of the present invention is to eliminate the drawbacks of the conventional FFT method described above, and reduce the amount of illumination adjustment by $1 in seven images! The purpose of the present invention is to provide a video decoding processing method that takes into account the high accuracy of IW debts and flatters I.

本!i明は、上記目的連成のため、イメージセンサから
[!I得ることのできない画素間の映像信号の変化な、
149合うll1i系がMする映像情報を直線で結ぶこ
とにより近似し、直巌上の複数個の情報を1#索関に―
り付ける′:′ようになし几ことを特徴とする。
Book! Due to the above-mentioned purpose coupling, the i-light is [!] from the image sensor. Changes in video signals between pixels that cannot be obtained
Approximate the video information of the 149 matching ll1i system by connecting it with a straight line, and combine multiple pieces of information on Naogan into a 1# index -
It is characterized by the fact that it does not attach like ':'.

以下、本発明を第2図、第S図により説明する。sl図
は本発明の一実S例のグロック図。
The present invention will be explained below with reference to FIG. 2 and FIG. The sl diagram is a Glock diagram of an S example of the present invention.

譲3図は@2図の要部の出力波形−でるる。Figure 3 shows the output waveform of the main part of Figure @2.

JIII2#IAにおいて、1はイメージ七ン−1F−
,2はりayり発生器、5は4’D変換器、5.11は
それヤれ箒1及びJII2の記憶回路、4はアドレスカ
ウンタ、6はタイミング回路、7,8はそれぞれ1IE
1及びJl#I2のレジスタ、9は演算回路。
In JIII2#IA, 1 is image seven-1F-
, 2 is a beam generator, 5 is a 4'D converter, 5.11 is a memory circuit for Yarehouki 1 and JII 2, 4 is an address counter, 6 is a timing circuit, 7 and 8 are each 1IE
1 and Jl#I2 registers, and 9 is an arithmetic circuit.

10は設定データ入力端子である。10 is a setting data input terminal.

次に@2図、第51に従って本発明の前作を。Next, the previous work of the present invention according to @2 Figure 51.

IF顧に説明する。イメージセンサ1は光6な検出し、
各IdiitAが検出する元aの照度の情報t。
Explain to the IF consultant. Image sensor 1 detects light 6,
Information t on the illuminance of element a detected by each IdiitA.

りaツク発生42からのりaツク!に1!11 M し
て直列に映11M号出力kを出力する。イメージセンサ
1がライン緘であれば、第1虜系から2イン方向に」一
次11f報が転送されてゆき、エリア型であればテレビ
の走嚢巌のごとく上のラインからlII素IIに順次情
報が一通される。仲、連続するl1ilA(宿った光G
が曲daのような照度分布を呈しているものとすると、
その部分を定食して得られる映yR11号は各画素が平
均的照度を検出、するものであるから、〃のような階I
R波となる。このよう和して画素4VC直列にイメージ
センサ1から繰り出される映像11!r号出力A@、ル
の変換器3によりll1i索毎にデジタル信号r(%−
5)°。
Nori a Tsuk occurred from 42! 1!11M and outputs the video 11M output k in series. If the image sensor 1 is a line type, the primary 11f report will be transferred from the 1st prisoner system to the 2nd direction, and if it is an area type, it will be transferred sequentially from the upper line to the 12th element II, like a TV running system. Information will be sent to you once. Naka, continuous l1ilA (dwelling light G
Assuming that exhibits an illuminance distribution like the curve da,
Since each pixel of the image yR11 obtained by eating that part detects the average illuminance, the floor I
This becomes an R wave. Image 11 is summed in this way and output from the image sensor 1 with 4 VC pixels in series! r output A @, digital signal r(%-
5) °.

F(s−2)・・・・・・に変換し、j911の記憶回
路5に記憶する。イメージセンサ1は、りaツク発生6
2から優られるクロックy母#Cl1li素の情報を送
り出すものであるから、このりaツク!i′Jk、vl
I用しルΦ変fs器5に変換開始の指令を与え、アドレ
スカウンタ4t#更新して記憶tg11I&5にアドレ
ス情@iを与えれば、デジタル信号r(%−3)。
F(s-2)... and stored in the storage circuit 5 of j911. Image sensor 1 detects leakage 6
This is a! i'Jk, vl
If a command to start conversion is given to the I filter fs converter 5, the address counter 4t# is updated, and address information @i is given to the memory tg11I&5, a digital signal r(%-3) is generated.

V(ルー2)・・・・・・は記憶回路5に優き込まれる
ととくなる。ここでルは画素の着号を示す叔であり、1
からN(全11i素a)の連続した整数値をとる。
V (Rue 2)... becomes when it is transferred to the memory circuit 5. Here, ru indicates the arrival number of the pixel, and 1
Take N (all 11i elements a) consecutive integer values from .

一方、タイミング回路6はりaツクlを**し、映像信
号出力すの一71!f(全画素の出力)を検出して以下
に示す動作t゛タイミング1ヒする。。
On the other hand, the timing circuit 6 outputs the video signal output signal 71! f (output of all pixels) is detected and the following operation t'timing 1' is performed. .

以下、その−作t−詳述する。タイミングial#6は
、記憶回路5にデジタル信号VCルー5)。
The process will be explained in detail below. At timing ial #6, a digital signal VC route 5) is sent to the storage circuit 5.

r(%−2)・・・を記憶するときと同じ順序でアト。Atto in the same order as when memorizing r(%-2)...

レスカウンタ4を吏新し、紀IJli回11g5力1ら
デジタル信号をdf、み出しこれtl−第1のレジスタ
7に保持し、既に、#11のレジスタに保持されていた
デジタル信号を第2のレジスタ8にシフトする。
The response counter 4 is updated, and the digital signals from 11g5 and 1 are held in the first register 7, and the digital signal that was already held in the register #11 is transferred to the second register. Shift to register 8 of

こうするとslのレジスタ7と142のレジスタ8には
それぞれF(s+1)、r(ル)の常に隣り合う一本の
デジタル信号が優られるととになる。
In this way, register 7 of sl and register 8 of 142 are always dominated by one adjacent digital signal of F(s+1) and r(r), respectively.

タイをングー路6は上記前作とほぼ同じタイミングで演
算回路9に指令を与える。演算回路9は、この指令によ
り分@ad’に:示す設定データ人力端子10からの設
定データtl(ラメータとして%仄のl[−補閾演:J
!を実行する。
The tie controller 6 gives a command to the arithmetic circuit 9 at almost the same timing as in the previous work. In response to this command, the arithmetic circuit 9 outputs the setting data tl from the human input terminal 10 (as a parameter, % l[-supplementary threshold: J
! Execute.

〆(n+t)−VC路)69180.(、)D(ル) 
=d ll Cnh) =J’Cf&)十&j)U)  (#
−0,1,・、 t−1)−(2)(1)式は−り合う
一本のデータvd分割したときの分l1ll蝋を示し、
(2)式は分割により優られた区間に割り当てられる(
比例配分される)補間IIIを示す。演算回路9は(2
)式で示す補間値ν(f&&)t’得る母に一次第2の
記憶回路11に記憶してゆき、4111のデータの11
が完了するとりイiング回路6に指令を与える。以下、
全111素についてアドレスカウンタ4の更新、レジス
タ7からレジスタ8へδデジタル信号r(F&)のシフ
ト、Ii己’11111回路5からレジスタ7へのデジ
タル信号V (s+1 )の保持、演算回路9による直
−補間演算((1) 、 (2)式)、補間櫨V(ル珈
)のml億回路11への書込みのat’pを繰返すこと
により。
〆(n+t)-VC path)69180. (,) D (ru)
=d ll Cnh) =J'Cf&)ten&j)U) (#
-0, 1,..., t-1) - (2) Equation (1) shows the amount of data when one piece of data vd is divided,
Equation (2) is assigned to the interval that is better by partitioning (
Interpolation III (prorated) is shown. The arithmetic circuit 9 is (2
) to obtain the interpolated value ν(f&&)t', which is first stored in the second storage circuit 11, and 11 of the 4111 data.
A command is given to the initiating circuit 6 when the process is completed. below,
Updating the address counter 4 for all 111 elements, shifting the δ digital signal r(F&) from the register 7 to the register 8, holding the digital signal V (s+1) from the '11111 circuit 5 to the register 7, and using the arithmetic circuit 9. By repeating the direct interpolation calculation (Equations (1) and (2)) and the writing at'p of the interpolation box V into the ml billion circuit 11.

隣り合う画素全区間について走査方向の直−補間が終了
する。
Direct interpolation in the scanning direction is completed for all adjacent pixel sections.

上1c!−作は走査方向の補間なので、ライン型イメー
ジセンナについては上記f作のみで補間は終了する。し
かしエリア朧のイメージセンtについては、走査方向に
対しIll直方向に位置する一素関の補間も必要となる
。これに必要な自作を次に述べる。タイきングl路6は
走蓋方岡の補間t’*oし、アドレスカウンタ4による
アドレスの指示を今までの記憶1iilli5から記憶
回路11に切り換えて、記憶回路11から順次製置方向
に位置するlll1素のデータをdみ出すようアドレス
カウンタ4のアドレスを更新していく。以下%前mlシ
フtIIJ作に準じ、記憶回路11からデジタル信−I
Ijt絖み出す毎にレジスタ7.8と演暮園j@9によ
り、磯厘方向に位置する−り合う画素の閣をfI!i間
して、新几に昭111il路11にこの補間櫃を記憶す
る。必要によりては画素1−の分割式を示す、設定デー
タを走査方向の補間のときとSなる蝋とすることもタイ
ンング回JllI6により0I馳である。
Top 1c! - The image sensor is an interpolation in the scanning direction, so for a line-type image sensor, the interpolation ends with only the f image described above. However, for the image center t where the area is hazy, interpolation of one element located perpendicular to the scanning direction is also required. The self-made work required for this is described below. The tying path 6 performs interpolation t'*o of the running cover, switches the address instruction by the address counter 4 from the previous memory 1iilli5 to the memory circuit 11, and sequentially positions the address from the memory circuit 11 in the manufacturing direction. The address of the address counter 4 is updated so as to extract the data of the lll1 element. According to the following % previous ml shift tIIJ work, the digital signal from the memory circuit 11 is
Every time Ijt begins to appear, registers 7.8 and Enpoenj@9 are used to register fI! After i, this interpolation box is stored in the new box in 1111. If necessary, setting data indicating the division formula of pixel 1- may be set to S during interpolation in the scanning direction due to the tinging cycle JllI6.

以上の制作によりd1線補関による画素と1索の閣への
吠律悄磯の割付けが完了し、厳科的に記憶−1@111
Ic谷々の情報が記憶される。
With the above production, the assignment of the pixel and 1 rope of the bar by the d1 line complement has been completed, and it is strictly memorized - 1 @ 111
Ic valley information is stored.

第6図に8いて1番は記憶−路11に得られる補間II
[v(nh)′9を示すもので、轟は例えば記憶回路1
1の次lRK、媛、続されるl)/A変供器(図示せず
)によi上船デジタル信号V(絡h)t−アナaグt#
C変供したものである。−5図に#いて各僅号波ヱ2 形、は、、実−には時間軸□をJlllにしているが、
11号を対比させるため爵51mでは同時間軸上とした
In FIG. 6, number 1 at 8 is the interpolation II obtained in memory path 11.
[v(nh)'9, and Todoroki is, for example, the memory circuit 1
1 next lRK, followed by l)/A transformer (not shown) i onboard digital signal V (connection h)t-anagt#
C.It is a modified offering. In figure 5, each small wave ヱ2 shape is, actually, the time axis □ is set to Jllll,
In order to contrast No. 11, it was placed on the same time axis in Suk 51m.

43mは41!1Ailllt’5分割”(et= s
 ) L*fflであるが、−巣のビーチは倣小でめる
ことからmIAを擬似的に増すことにより、補間データ
1は真際の光aの照度分布に近似することがよくわかる
43m is 41!1Ailllt'5 division' (et= s
) L*ffl, but since the nest beach is small in imitation, it is clear that by artificially increasing mIA, the interpolated data 1 approximates the illuminance distribution of the real light a.

以上は本R1明をハードウェアで一放したー夾例である
が、記憶回路5.11、レジスタ7.8、演J!回路9
をコンビエータに置き換え、上に示した処4をソフトウ
ェアで実行してもよいことは勿−である。
The above is just an example of a hardware version of this R1 light, including 5.11 memory circuits, 7.8 registers, and performance J! circuit 9
Of course, it is also possible to replace the above with a combiator and execute the process 4 shown above by software.

以上、#J1.明したように、イメージセンサから得ら
れる映像信号の隣り合う画素間を複数−の区間に分割す
るとともに、#1索閤をそれらの佇つ映像fIj櫂で厘
纏近似し、分割した各区間に近似情報を比例配分により
一り当てることにより、・t7I素数を壇や丁(wj素
ピッチを縮める)のと同等の効果が得られ、光の情報か
らより扁槽度に照度情報が慢られもことKなり、イメー
ジセン1t−利用し几−4楢の一足装置に本発明は有幼
な手段となる。
That’s all for #J1. As explained above, the distance between adjacent pixels of the image signal obtained from the image sensor is divided into multiple sections, and the #1 search is approximated by the images of those sections, and each of the divided sections is approximated. By allocating information proportionally, it is possible to obtain the same effect as using the t7I prime number (reducing the wj prime pitch), and the illuminance information can be transferred from the light information to the cylindrical level. The present invention is a promising means for a one-leg device that utilizes an image sensor.

41g面の量率な一― 41図は−イメージセンサの一般的な出力置形図、5g
2図は本JA@の一実施例を示したグミツク図、43図
は縞2図における要部の出方波形−である。
Figure 41 is a general output layout diagram of an image sensor, 5g.
Figure 2 is a gummy diagram showing an example of this JA@, and Figure 43 is a waveform of the main part in the stripe diagram 2.

1・・・イメージセン? 2・・・りaツク発4?i)
3・・・ルの変換器   4・・・アドレスカウンタ5
.11・・・記憶回路  6・・・タインング回路゛7
.8・・・vexs   ?・・・演算回路10・・・
設定データ人力瑠子 代場人弁虐士*mn*
1...Image center? 2... Ri atsuku departure 4? i)
3... Le converter 4... Address counter 5
.. 11...Memory circuit 6...Tinging circuit ゛7
.. 8...vexs? ...Arithmetic circuit 10...
Setting data Jinriki Ruko daibajin arrogant *mn*

Claims (1)

【特許請求の範囲】[Claims] イメージセン管よりのfIk像信号t#1票毎にアta
y−デジタル変換6でデジタル信号に変換し、これらの
信号を一旦紀111鑓路に紀遺した犠該記憶回路から互
いに@り合うIjii索分のデジタル信号を順次21I
のレジスタKdみ出し、演算回路にて、上記隣り合う2
#索のデータの差分を算出しこの差分をIai嵩関に比
例配分してtIi数1のデジタルデータを11Ilt)
付けるようになし几こと1−特鐵とする@像信号処置方
式。
fIk image signal t# from the image sensor tube for each vote
The Y-digital conversion 6 converts these signals into digital signals, and from the storage circuit once stored in the 111th Yariro, the digital signals for the Ijii lines that are mutually transmitted are sequentially transferred to the 21I.
In the arithmetic circuit, the register Kd of the above two adjacent
# Calculate the difference between the data of search and distribute this difference proportionally to Iai yakoseki to make the digital data of tIi number 1 to 11Ilt)
1-Featured image signal processing method.
JP56160171A 1981-10-09 1981-10-09 Video signal processing system Granted JPS5862976A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56160171A JPS5862976A (en) 1981-10-09 1981-10-09 Video signal processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56160171A JPS5862976A (en) 1981-10-09 1981-10-09 Video signal processing system

Publications (2)

Publication Number Publication Date
JPS5862976A true JPS5862976A (en) 1983-04-14
JPH0244188B2 JPH0244188B2 (en) 1990-10-03

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Family Applications (1)

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JP56160171A Granted JPS5862976A (en) 1981-10-09 1981-10-09 Video signal processing system

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JP (1) JPS5862976A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5418230A (en) * 1977-07-06 1979-02-10 Eastman Kodak Co Separate sampling color video signal processor
JPS5675786A (en) * 1979-11-26 1981-06-23 Matsushita Electric Ind Co Ltd Digital convergence device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5418230A (en) * 1977-07-06 1979-02-10 Eastman Kodak Co Separate sampling color video signal processor
JPS5675786A (en) * 1979-11-26 1981-06-23 Matsushita Electric Ind Co Ltd Digital convergence device

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JPH0244188B2 (en) 1990-10-03

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