JPS585819A - Electric power source controller - Google Patents
Electric power source controllerInfo
- Publication number
- JPS585819A JPS585819A JP56103333A JP10333381A JPS585819A JP S585819 A JPS585819 A JP S585819A JP 56103333 A JP56103333 A JP 56103333A JP 10333381 A JP10333381 A JP 10333381A JP S585819 A JPS585819 A JP S585819A
- Authority
- JP
- Japan
- Prior art keywords
- power
- circuit
- peripheral device
- essential
- peripheral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はデータ処理装置等における電源制御装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply control device in a data processing device or the like.
従来、データ処理装置等における電源の一括投入は、電
源投入スイッチを人為的またはタイラー等によ抄オンに
することによ抄、論理装置、周辺装置等に対し順次電源
投入信号を出して、電源の順序投入を行りていた。Conventionally, to turn on power to data processing equipment, etc. all at once, the power on switch is turned on manually or with a tyler, etc., and a power on signal is issued to the logic device, peripheral device, etc. in sequence, and the power is turned on. Inputs were made in order.
、第１図に従来の電源制御装置の１例のブロック回路図
を示す。第１回状、電源の弐人切断をスイッチ等により
て制御する電源投入切断制御回路１゜周辺装置ｓ１〜．
５Ｎの電源を順次投入切断する周辺装置電源投入切断回
路４．論理装置３．および前記周辺装置電源投入切断回
路４Ｋ１ｇ次電源の投入切断要求を出す電源投入切断回
路２から構成される。, FIG. 1 shows a block circuit diagram of an example of a conventional power supply control device. In the first circular, a power on/off control circuit 1.peripheral devices s1-.
4. Peripheral device power on/off circuit that sequentially turns on/off 5N power. Logical device 3. and a power on/off circuit 2 for issuing a power on/off request for the peripheral device power on/off circuit 4K1g.
この構成によると、電源投入切断制御回路１の電源投入
スイッチをオンにすれば、装置全体の電源が投入され、
すべての電源が確定した時点で、論理装置に対しＪａｉ
ｌを実行させることができる。According to this configuration, when the power on switch of the power on/off control circuit 1 is turned on, the entire device is powered on.
Once all power supplies are established, the Jai
l can be executed.
ただしこの場合、すべての電源が確定することが必要で
あり、周辺装置のうち１つでも電源投入に失敗すると、
論理装置は実行を開始できない。However, in this case, all power supplies must be established, and if even one of the peripheral devices fails to power on,
Logical unit cannot start execution.
このためオペレータが手動で電源投入するような場合は
、故障した周辺装置を切）離すことによ）、業務を開始
できるが、無人化自動運転の場合などでは、その時の業
務に必須ではないような周辺装置が故障した時にも、業
務を開始できないため、マシンＯ′ＷｑＷ／に効率が下
るという欠点がありた。For this reason, when an operator manually turns on the power, he or she can start work by disconnecting or separating the failed peripheral device, but in cases such as unmanned automatic driving, it may not be essential for the work at that time. Even when a peripheral device breaks down, the machine cannot start working, which has the disadvantage that the efficiency of the machine O'WqW/ is reduced.
本発明の目的は、業務を容易に実行するためＫ、必須で
はない周辺装置が故障していても、必須である周辺装置
の電源が確定すれば、すぐに処理が行えるようＫした電
源制御装置を提供することにある。An object of the present invention is to provide a power supply control device that is capable of processing tasks as soon as the power supply to an essential peripheral device is established, even if a non-essential peripheral device is out of order. Our goal is to provide the following.
本発明の構成について述べると、本発明は、電源の投入
および切断を指示する電源投入切断制御回路１と、この
制御回路１からの電源投入切断指示に応じて論理装置３
および複数個の周辺装置５に対し電源投入切断を指示す
る電源投入切断回路２と、この回路２からの指示に応じ
て周辺装置５の電源１ａ次投入切断する周辺装置電源投
入切断回路４とを具備するデータ処理装置等にシける電
源制御装置において、前記の周辺装置電源投入切断回路
４と前記の各周辺装置５との関に介在し、各周辺装置５
のそれぞれか必須であるか否か會指定する指定判別回路
６を具備した電源制御装置である。Describing the configuration of the present invention, the present invention includes a power on/off control circuit 1 that instructs power on/off, and a logic device 3 in response to a power on/off instruction from the control circuit 1.
and a power on/off circuit 2 that instructs a plurality of peripheral devices 5 to turn on/off power, and a peripheral device power on/off circuit 4 that turns on/off the power 1a of the peripheral device 5 in response to instructions from this circuit 2. In a power supply control device for a data processing device or the like, the peripheral device power on/off circuit 4 is interposed between the peripheral device power on/off circuit 4 and each of the peripheral devices 5, and each peripheral device 5 is
This power supply control device is equipped with a designation determination circuit 6 that designates whether each of the above is essential or not.
このように本発明においては、各周辺装置が必須である
か否かを指定する指定判別回路を設けるととによ〕、必
須でない装置の電源故障を無視できるようｋしている。As described above, in the present invention, by providing a designation determination circuit for specifying whether each peripheral device is essential or not, it is possible to ignore power supply failures of non-essential devices.
以下本発明を実施例によ）図面を参照して説明する。The present invention will be explained below by way of examples and with reference to the drawings.
第２図は本発明の実施例のブロック回路図を示す。第２
図について説明すると、本装置は、電源の投入切断を制
御する電源投入切断制御回路１゜纏１１を介して電源投
入切断要求が送られてくると、論理装置３′＆どに電源
投入切断信号を纏１２を介して送出する電源投入切断回
路４ 周辺装置５Ｎ、 この周辺装置Ｏ電源を順次投
入していく周辺装置電源投入切断回路４．各周辺装置が
必須であるか否かｔ切り分ける指定判別回路６から構成
される。FIG. 2 shows a block circuit diagram of an embodiment of the invention. Second
To explain the figure, when a power on/off request is sent via a power on/off control circuit 11 that controls power on/off, this device sends a power on/off signal to a logic device 3'& A power on/off circuit 4 that sends out the power to the peripheral device 5N via the cable 12, a peripheral device power on/off circuit 4 that sequentially turns on the power to the peripheral device O. It consists of a designation determination circuit 6 that determines whether each peripheral device is essential or not.
次にこの第２図の動作にりいて説明すると、まず電源投
入切断制御回路ＩＤ電源投入スイッチがオンＫｌヤ、電
源投入要求信号が鐘１１を介して電源投入切断回路ＺＫ
送出されると、この電源投入切断回路２は電源の層外投
入を開始して、＄１１２を介して論理装置３および周辺
装置電源制御回路４に電源投入信号を送出する。この周
辺懐置電源制−１１１１４は周辺装置５１〜５ＮＫ対し
４９１３１〜１３）Ｉ ’を介して電源投入信号を出
して電源投入、を行う。電源投入が完了して電源が確定
すると、線１４１〜１４Ｎｔ介して出される電源確定信
号が論理０から論理ＩＫなる。Next, to explain the operation shown in FIG. 2, first, the power on switch of the power on/off control circuit ID is turned on (Klya), and the power on request signal is sent via the bell 11 to the power on/off circuit ZK.
Once asserted, the power on/off circuit 2 initiates extra-layer power on and sends a power on signal to the logic device 3 and peripheral device power control circuit 4 via $112. This peripheral power supply system 11114 outputs a power-on signal to the peripheral devices 51-5NK via 49131-13)I' to turn on the power. When the power is turned on and the power supply is established, the power supply confirmation signal issued through the lines 141 to 14Nt changes from logic 0 to logic IK.
ζζで複数個の切替器６１〜６Ｎで構成される指定判別
回路６０１例を第３図に示す。−３図（ａ）は周辺装置
が必須である場合の切替器６Ｍの指定切替状ｍｔ示し、
第３図（ｂ）は周辺装置が必須でない場合の切替器６Ｍ
の指定切替状態を示している。FIG. 3 shows an example of a designation determination circuit 601 composed of a plurality of switchers 61 to 6N. -3 (a) shows the designated switching state mt of the switching device 6M when the peripheral device is essential,
Figure 3(b) shows a switch 6M when the peripheral device is not essential.
The designated switching state is shown.
第３図（＠）の場合に′）いて説明すると、鐘１４Ｎに
乗せられている論理Ｏまたは論理１の信号は端子１４か
ら端子６１に送られ、次い゛で線ｔｌＮ を通じて周辺
装置電源制御回路４中にある必須側ＡＮＤ回路４１に入
力される。従りて必須の周辺装置の電源がすべて確立す
るときは、１ＩＥ３図（ａ）の＠６１．から入力する信
号はすべて論理１とな）、サラＫＩＩ ３８ｍ（ｂｌｏ
Ｉ１６１）！ ハ論Ｉｌ Ｉ ＫＢ定Ｌし Ｔ。In the case of FIG. 3 (@), the logic O or logic 1 signal carried on bell 14N is sent from terminal 14 to terminal 61, and then peripheral device power control is carried out via line tlN at The signal is input to an essential AND circuit 41 in the circuit 4. Therefore, when power is established for all essential peripheral devices, @61. in Figure 1IE3 (a). All signals input from the blo
I161)! Ha Theory Il I KB Determined L T.
るので、必須側ＡＮＤ回路４１に入力する信号はすべて
一１Ｉｌとなり、ＡＮＤ回路４１゛からは出力信号が出
て、論理装置３０電源が確定し、これにより１ａｌＢを
介して電源投入切断−路２に入力され、次いで纏１６を
介してこの信号が電源投入切断制御回路ＩＫ大入力れ、
これＫより制御回路１は纏１９ｔ−介して論理装置３に
処理を開始させる信号を送に、論理装置３での処理が開
始される。Therefore, the signals input to the essential side AND circuit 41 are all 1I1, and an output signal is output from the AND circuit 41', and the power supply to the logic device 30 is established, and this causes the power on/off line 2 to be connected via 1alB. This signal is then input to the power on/off control circuit IK via the cable 16.
From this point K, the control circuit 1 sends a signal through the wire 19t to the logic device 3 to start processing, so that the logic device 3 starts processing.
次Ｋｌ！３１１（ｂ）の場合について説明すると、−１
４Ｎ Ｋ乗せられている論理０また社論理１の信号は端
子１４から端子６２に送られ、次いで−６２、七通じて
周辺装置電源制御回路４中にある非必須側ＡＮＤ回路４
ｚＷＣ入力される。従っていま例えば非必須の周辺装置
の電源がすべて確立するときは、第３図（ｂ）の纏６２
Ｎ から入力する信号はすべて論理１となシ、さらに第
３図（１）の１１１４６２ｍは論理ＩＫ段設定であるの
で、非必須儒ムＮＤ回路４ｔ Ｋ入力する信号はすべて
論理ｌとなシ、ＡＮＤ回路４！からは出力信号が出て、
これが線１７１介して電源投入切断回路２に入力され、
次いで纏１Ｂを介してこの信号が電源投入切断制御回路
ＩＫ大入力れ、非必須周辺装置の電源がすべて確立した
ことを知ることが出来る。しかし非必須周辺装置の１つ
でも電源が確立しないときは、前述のルー）Ｋより電源
投入切断制御回路１に信号が入力されてこないので、い
ずれかの周辺装置の電源が確立していないヒとを知るこ
とができる。Next Kl! To explain the case of 311(b), -1
The logic 0 or logic 1 signal carried by 4NK is sent from terminal 14 to terminal 62, and then passed through -62 and 7 to non-essential side AND circuit 4 in peripheral power supply control circuit 4.
zWC is input. Therefore, for example, when power is established for all non-essential peripheral devices, the connection 62 in FIG. 3(b)
Since all the signals input from N are logic 1, and since 111462m in FIG. AND circuit 4! There is an output signal from
This is input to the power on/off circuit 2 via line 171,
This signal is then applied to the power on/off control circuit IK via line 1B, indicating that power has been established for all non-essential peripheral devices. However, if power is not established for even one of the non-essential peripheral devices, no signal is input to the power on/off control circuit 1 from the above-mentioned rule (K). You can know that.
ただしこの場合には非必須の周辺装置の電源が確立して
いないことを知るのみで、非必須であるので運転は支障
なく進行させることができる。However, in this case, it is only necessary to know that the power supply of the non-essential peripheral device is not established, and since the device is non-essential, the operation can proceed without any problem.
上記実施例では、周辺装置が必須であるか否かを切す分
けるのにスイッチ回路による切替器を用いたが、記憶回
路と論理回路を組み合せて実現することも可能である。In the embodiments described above, a switch circuit is used to switch off whether a peripheral device is essential or not, but it is also possible to realize this by combining a memory circuit and a logic circuit.
以上に説明したように、本発明によれば、各周辺装置が
必須であるか否かを指定判別する指定判別回路を設け、
必須でない周辺装置が故障していても、装置の処理が開
始されるようにしたことＫより、電子装置の可動効率を
上げ得るという効果がある。As explained above, according to the present invention, a designation determination circuit is provided to designate and determine whether each peripheral device is essential.
Even if a non-essential peripheral device is out of order, processing of the device is started, which has the effect of increasing the operating efficiency of the electronic device.
１８１図は従来Ｏ電源制御装置の１例のブロック回路図
、第２図は本発明の一実施例のブロック回路図、第３図
は第２図に示した指定判別回路中の１つの切替器の回路
図を示し、（１）は必須、（ｂ）は非。
必須の切替状態を示す図である。
なお図面に使用した符号はそれぞれ以下のものを示す。
１・・・・・・電源投入切断制御回路、２・−・・・・
電源投入切断回路、３・・・・・・論理装置、４−−−
一周辺装置電源投入切断回路、４１・・・・・・必須側
ＡＮＤ回路、４２・・・・−・非必須側ＡＮＤ回路、５
１〜５Ｎ・・・・・・周辺装置、Ｓ −・指定判別回
路、６１〜６Ｎ ・・・・・・切替器。FIG. 181 is a block circuit diagram of an example of a conventional O power supply control device, FIG. 2 is a block circuit diagram of an embodiment of the present invention, and FIG. 3 is one switch in the designation determination circuit shown in FIG. The circuit diagram of (1) is required and (b) is non-required. FIG. 6 is a diagram illustrating essential switching states. The symbols used in the drawings indicate the following. 1...Power on/off control circuit, 2...
Power on/off circuit, 3...Logic device, 4---
1 Peripheral device power on/off circuit, 41... Essential side AND circuit, 42... Non-essential side AND circuit, 5
1 to 5N...Peripheral device, S--designation discrimination circuit, 61 to 6N...Switching device.
Claims (1)
制御回路ｌと、この制御回路１からの電源投入切断指示
に応じて論理装置３および複数個の周辺装置ＳＫ対し電
源投入切断を指示する電源投入切断ａｍ２と、この回路
２かもの指示に応じて周辺装置５の電源ｅｘ次投入切断
する周辺装置電源投入切断回路４とを具備するデータ処
理装置等における電ｉ＊ｓｗ御装置において、前記の周
辺装置電源投入切断回路４と前記の各周辺装置５と０８
に介在し、各周辺装置５のそれぞれが必須であるか否か
を指定する指定判別回路６を具備していることｅ＊黴と
する電源制御装置。 （四 指定判別回路６が、周辺装置５から返送されてく
る電源投入切断確立信号端子１４を、周辺装置電源投入
切断回路４中に含まれる必須指定判別回路４１から延び
る必須側端子６１か、同じく周辺装置電源投入切断回路
４中に含まれる非必須指定判別回路４！から嬌びる非必
須側端子６２かのいずれか一方に切替接続する複数個の
切替器６１〜６Ｎから構成されているととｔ−ｓ黴とす
る特許請求の範囲第１項記載の電源制御装置。[Scope of Claims] Q) A power on/off control circuit 1 that instructs power on and off, and a power on/off control circuit 1 for powering on the logic device 3 and a plurality of peripheral devices SK in response to the power on/off instruction from the control circuit 1. Power i*sw control in a data processing device, etc., which is equipped with a power on/off circuit am2 for instructing power off, and a peripheral device power on/off circuit 4 for powering on/off the peripheral device 5 in response to an instruction from this circuit 2. In the apparatus, the peripheral device power on/off circuit 4 and each of the peripheral devices 5 and 08 are connected to each other.
A power supply control device which is provided with a designation determination circuit 6 which intervenes in the peripheral device 5 and designates whether each of the peripheral devices 5 is essential or not. (4) The designation determination circuit 6 selects the power on/off establishment signal terminal 14 returned from the peripheral device 5 from the mandatory side terminal 61 extending from the mandatory designation determination circuit 41 included in the peripheral device power on/off circuit 4 or It is composed of a plurality of switching devices 61 to 6N that are connected to one of the non-essential side terminals 62 from the non-essential designation determination circuit 4! included in the peripheral device power on/off circuit 4. The power supply control device according to claim 1, which is a t-s mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56103333A JPS585819A (en) | 1981-07-03 | 1981-07-03 | Electric power source controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56103333A JPS585819A (en) | 1981-07-03 | 1981-07-03 | Electric power source controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS585819A true JPS585819A (en) | 1983-01-13 |
Family
ID=14351226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56103333A Pending JPS585819A (en) | 1981-07-03 | 1981-07-03 | Electric power source controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS585819A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6091822A (en) * | 1983-10-24 | 1985-05-23 | 富士通株式会社 | Power source control circuit |
| JPS62154751U (en) * | 1986-03-25 | 1987-10-01 |
-
1981
- 1981-07-03 JP JP56103333A patent/JPS585819A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6091822A (en) * | 1983-10-24 | 1985-05-23 | 富士通株式会社 | Power source control circuit |
| JPH0443290B2 (en) * | 1983-10-24 | 1992-07-16 | Fujitsu Ltd | |
| JPS62154751U (en) * | 1986-03-25 | 1987-10-01 |
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