JPS5855466B2 - Loran A receiver - Google Patents

Loran A receiver

Info

Publication number
JPS5855466B2
JPS5855466B2 JP15943079A JP15943079A JPS5855466B2 JP S5855466 B2 JPS5855466 B2 JP S5855466B2 JP 15943079 A JP15943079 A JP 15943079A JP 15943079 A JP15943079 A JP 15943079A JP S5855466 B2 JPS5855466 B2 JP S5855466B2
Authority
JP
Japan
Prior art keywords
circuit
station
signal
afc
tracking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15943079A
Other languages
Japanese (ja)
Other versions
JPS5697886A (en
Inventor
之弘 塩飽
実 半田
久徳 平沢
雅彦 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furuno Electric Co Ltd
Original Assignee
Furuno Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furuno Electric Co Ltd filed Critical Furuno Electric Co Ltd
Priority to JP15943079A priority Critical patent/JPS5855466B2/en
Publication of JPS5697886A publication Critical patent/JPS5697886A/en
Publication of JPS5855466B2 publication Critical patent/JPS5855466B2/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S1/00Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith
    • G01S1/02Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith using radio waves
    • G01S1/08Systems for determining direction or position line
    • G01S1/20Systems for determining direction or position line using a comparison of transit time of synchronised signals transmitted from non-directional antennas or antenna systems spaced apart, i.e. path-difference systems
    • G01S1/24Systems for determining direction or position line using a comparison of transit time of synchronised signals transmitted from non-directional antennas or antenna systems spaced apart, i.e. path-difference systems the synchronised signals being pulses or equivalent modulations on carrier waves and the transit times being compared by measuring the difference in arrival time of a significant part of the modulations, e.g. LORAN systems
    • G01S1/245Details of receivers cooperating therewith, e.g. determining positive zero crossing of third cycle in LORAN-C

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)
  • Networks Using Active Elements (AREA)

Description

【発明の詳細な説明】 この発明は、ロランA受信機に関し、特に主従局信号の
追尾点と分局パルスによるサンプル点との同期を保つ同
期装置の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Loran A receiver, and more particularly to an improvement in a synchronization device that maintains synchronization between a tracking point of a master and slave station signal and a sampling point using a branch pulse.

一般に、ロランA受信機は基準パルスを分周して主局信
号および従局信号の追尾点をサンプリングし、その追尾
点のドリフト調整なAFC回路による基準パルスの発振
周波数の調整と追尾制御回路による分周比率の調整とで
行って主従局信号の追尾点と分周パルスによるサンプル
点との同期を保つようにしている。
In general, a Loran A receiver divides the frequency of a reference pulse to sample the tracking points of the main station signal and slave signal, adjusts the oscillation frequency of the reference pulse by an AFC circuit to adjust the drift of the tracking point, and divides the reference pulse by a tracking control circuit. This is done by adjusting the frequency ratio to maintain synchronization between the tracking point of the master and slave station signals and the sampling point by the frequency division pulse.

また受信機に用いる基準発振器には余り精度の良いもの
が使用されていないためにAFC回路では追尾速度が速
く設定され、一方追尾制御回路での追尾速度は、AFC
回路での追尾が十分であればそれ程速くする必要がない
ために船速に追尾する程度に設定されている。
Also, since the reference oscillator used in the receiver is not very accurate, the tracking speed in the AFC circuit is set to be high, while the tracking speed in the tracking control circuit is
If the tracking in the circuit is sufficient, there is no need to make it that fast, so it is set to follow the ship's speed.

従来のロランA受信機では、上記AFC回路の作動を主
局信号に基づいて行い、また上記追尾制御回路の作動を
従局信号に基づいて行うようにしていた。
In the conventional Loran A receiver, the AFC circuit operates based on the main station signal, and the tracking control circuit operates based on the slave station signal.

しかしながら、追尾制御回路では追尾速度が遅いために
外乱の影響を受けにくく、したがって従局信号のS/N
比が多少悪化しても従局信号の追尾を保つことができる
が、AFC回路での追尾速度は速く設定されているため
に外乱の影響を受けやすく、したがって、主局信号のS
/N比が悪化すると主局、従局信号とも追尾が困難にな
る欠点があった。
However, since the tracking control circuit has a slow tracking speed, it is less susceptible to disturbances, and therefore the S/N of the follower signal
Although the tracking of the slave station signal can be maintained even if the ratio deteriorates somewhat, the tracking speed of the AFC circuit is set to be high, so it is easily affected by disturbances, and therefore the S of the main station signal is
When the /N ratio worsens, it becomes difficult to track both the main station and slave station signals.

この発明は上記に鑑みてなされたもので、主従局のうち
受信状態が良好な局をAFC回路を作動させる測定基準
局として選択し、主局受信状態が相対的に良い場合には
、AFC回路を主局信号に基づいて作動させ、かつ追尾
制御回路を従局信号に基づいて作動させる一方、従局信
号の受信状態が相対的に良い場合にはAFC回路を従局
信号に基づいて作動させ、かつ追尾制御回路を主局信号
に基づいて作動させるようにしたものである。
This invention was made in view of the above, and selects a station with a good reception condition among the master and slave stations as a measurement reference station for activating the AFC circuit, and when the reception condition of the master station is relatively good, the AFC circuit is activated. The AFC circuit is operated based on the main station signal, and the tracking control circuit is operated based on the slave station signal, and when the reception condition of the slave station signal is relatively good, the AFC circuit is activated based on the slave station signal, and the tracking control circuit is operated based on the slave station signal. The circuit is operated based on the main station signal.

以下、この発明の実施例を図面を参照して説明する。Embodiments of the present invention will be described below with reference to the drawings.

第1図はこの発明の実施例であるロランA受信機のブロ
ック図である。
FIG. 1 is a block diagram of a Loran A receiver that is an embodiment of the present invention.

また、第2図は動作時の要部波形図である。Moreover, FIG. 2 is a waveform diagram of main parts during operation.

増幅回路1はアンテナからのロラン信号を増幅する回路
で一定のレベルまで増幅された信号は次段の波形整形回
路に出力される。
The amplifier circuit 1 is a circuit that amplifies the Loran signal from the antenna, and the signal amplified to a certain level is output to the next stage waveform shaping circuit.

なお、増幅回路1は検波回路を含んでおり、波形整形回
路2に対しては包絡線波を出力する。
Note that the amplifier circuit 1 includes a detection circuit and outputs an envelope wave to the waveform shaping circuit 2.

波形成形回路2は包絡線波を1回微分する微分回路20
、微分回路2001回微分出力をさらに微分する微分回
路21、包絡線波からAGC用パルスを形成するAGC
パルス回路22.1回微分波から信号良否判断用パルス
を形成する信号良否判断パルス回路23および2回微分
波からAFC(自動周波数制御)/追尾パルスを形成す
るAFC/追尾パルス回路24で構成されていて、AG
C1信号良否判断、AFC/′追尾のための三種類のパ
ルスを形成して主局用サンプル回路3および従局用サン
プル回路4に出力する回路である。
The waveform shaping circuit 2 is a differentiation circuit 20 that differentiates the envelope wave once.
, Differentiating circuit 200 A differentiating circuit 21 that further differentiates the first differentiated output, AGC that forms AGC pulses from the envelope wave.
Pulse circuit 22. Consists of a signal quality judgment pulse circuit 23 that forms a pulse for signal quality judgment from a first differential wave and an AFC/tracking pulse circuit 24 that forms an AFC (automatic frequency control)/tracking pulse from a second differential wave. Tete, AG
This circuit forms three types of pulses for determining the quality of the C1 signal and for AFC/' tracking and outputs them to the main station sample circuit 3 and the slave station sample circuit 4.

AGCパルス回路22は予め定めたAGC設定[直aを
基準に受信信号のレベルと比較し、受信信号のレベルが
設定値aを越える時間をバイとするパルスを形成する。
The AGC pulse circuit 22 compares the level of the received signal with a predetermined AGC setting [direct a] as a reference, and forms a pulse that is defined as a time when the level of the received signal exceeds the set value a.

信号良否判断パルス形成回路23は1回微分波と0′■
よりレベルbだげスライスしたスライスレベルと比較し
、スライスレベルよりも1回微分波のレベルが高いとき
にバイとなるパルスを形成する。
The signal quality judgment pulse forming circuit 23 generates a single differential wave and 0'■
It compares with a slice level obtained by slicing by level b, and when the level of the differential wave is higher than the slice level by one time, a pulse that becomes bi is formed.

また、AFC/追尾パルス形成回路24は2回微分波の
位相および正負レベルに対応するパルスを形成する。
Further, the AFC/tracking pulse forming circuit 24 forms pulses corresponding to the phase and positive/negative level of the twice differential wave.

サンプル回路3,4はそれぞれ主局信号に同期した信号
を形成する主局分周器5と従局信号に同期した信号を形
成する従局分周器6とのそれぞれから供給される、サン
プルパルスによって上記のAGC用パルスロ、信号良否
判断用パルスニ、およびAFC/追尾用パルスへをサン
プリングする。
The sample circuits 3 and 4 are supplied with sample pulses from a master station frequency divider 5, which forms a signal synchronized with the main station signal, and a slave station frequency divider 6, which forms a signal synchronized with the slave station signal, respectively. The AGC pulse LOW, the signal quality determination pulse NI, and the AFC/tracking pulse are sampled.

主局サンプル回路3は3個のサンプル回路30゜3L3
2と、サンプル回路30からのサンフルデータに基づい
てAFC/追尾制御パルスを形成するAFC/追尾制御
パルス形成回路33およびAGCパルスから利得制御デ
ータを形成する利得制御データ形成回路34で構成され
ている。
The main station sample circuit 3 consists of three sample circuits 30°3L3
2, an AFC/tracking control pulse forming circuit 33 that forms an AFC/tracking control pulse based on sample data from a sample circuit 30, and a gain control data forming circuit 34 that forms gain control data from the AGC pulse. .

また、同様に従局サンプル回路4も、3個のサンプル回
路40,41,42とAFC/追尾制御パルス形成回路
43および利得制御データ形成回路44とで構成されて
いる。
Similarly, the slave sample circuit 4 also includes three sample circuits 40, 41, 42, an AFC/tracking control pulse forming circuit 43, and a gain control data forming circuit 44.

このうちAFC/追尾制御パルス形成回路33,43は
AF’C1追尾のための制御量をデジタル量として後述
の測定基準局(以下、AFC局という。
Among these, the AFC/tracking control pulse forming circuits 33 and 43 convert the control amount for AF'C1 tracking into a digital amount from a measurement reference station (hereinafter referred to as AFC station) to be described later.

)選択ゲートおよび追尾局選択ゲートを介してAFC制
御を行つAFC回路、またを精冗制御を行う追尾制御回
路へ導かれる。
) is led to an AFC circuit that performs AFC control via a selection gate and a tracking station selection gate, and to a tracking control circuit that performs precise control.

また、利得制御データ回路34,44はAGCパルスロ
に対応したパルス数を有するパルス列或いは同じく対応
したパルス幅を有するディジタル信号にして主局AGC
値回路7、従局AGC値回路8にそれぞれ出力する。
Further, the gain control data circuits 34 and 44 output a pulse train having a number of pulses corresponding to the AGC pulse width or a digital signal having a corresponding pulse width to the main station AGC.
It outputs to the value circuit 7 and the slave AGC value circuit 8, respectively.

主局AGC値回路7、従局AGC(W回路8はそれぞれ
D/A変換器を含む回路で構成されていて、AGCパル
スロのサンプル点からのパルス幅に基づいて形成されろ
利得制御データをアナログ信号に変換して増幅回路1の
利得を制御する。
The main station AGC value circuit 7 and the slave station AGC (W circuit 8) each consist of a circuit including a D/A converter, and convert the gain control data formed based on the pulse width from the sample point of the AGC pulse line into an analog signal. to control the gain of the amplifier circuit 1.

AGC切り換え回路9は主局AGC値回路7および従局
AGC値回路8と、増幅回路1とを自動的に交互に切り
換える回路である。
The AGC switching circuit 9 is a circuit that automatically switches the main station AGC value circuit 7, the slave station AGC value circuit 8, and the amplifier circuit 1 alternately.

なお、AFC/追尾制御パルスを形成してAFC制御お
よび追尾制御を行う回路およびAGCパルスを作って利
得制御データを形成し、これによってAGC制御を行う
回路は例えば、前者は特公昭47−5069号公報に、
後者は実公昭51−37430号公報にそれぞれ開示さ
れているような周知の手段を用いれば良い。
Note that a circuit that forms AFC/tracking control pulses to perform AFC control and tracking control and a circuit that forms AGC pulses to form gain control data and performs AGC control are, for example, the former described in Japanese Patent Publication No. 47-5069. In the official bulletin,
For the latter, well-known means such as those disclosed in Japanese Utility Model Publication No. 51-37430 may be used.

前記AFC局選択ゲート10は後述のAFC局選択回路
からの信号に基づいてサンプル回路3゜4からのAFC
/追尾制御パルスのいずれか一方を次段のAFC回路1
2に出力するゲート回路である。
The AFC station selection gate 10 selects the AFC from the sample circuit 3.4 based on a signal from an AFC station selection circuit to be described later.
/ tracking control pulse to the next stage AFC circuit 1
This is a gate circuit that outputs to 2.

また、追尾局選択ゲート11は同じくAFC局選択回路
16からの信号に基づいてサンプル回路3,4からのA
FC/追尾制御パルスのいずれか一方を次段の追尾制御
回路14に出力するゲート回路である。
Further, the tracking station selection gate 11 also outputs A from the sample circuits 3 and 4 based on the signal from the AFC station selection circuit 16.
This is a gate circuit that outputs either the FC/tracking control pulse to the tracking control circuit 14 at the next stage.

AFC/追尾制御パルスはAFC局選択ゲート10を通
過したときAFC回路12を作動させるAFC制御パル
スとなり、また追尾局選択ゲート11を通過したとき追
尾制御回路14を作動させるための追尾制御パルスとな
る。
When the AFC/tracking control pulse passes through the AFC station selection gate 10, it becomes an AFC control pulse for activating the AFC circuit 12, and when it passes through the tracking station selection gate 11, it becomes a tracking control pulse for activating the tracking control circuit 14. .

AFC回路12はAFC局選択ゲート10を通過したA
FC制御パルスに基づいて基準発振器13の発振周波数
を変える。
The AFC circuit 12 receives A that has passed through the AFC station selection gate 10.
The oscillation frequency of the reference oscillator 13 is changed based on the FC control pulse.

また、追尾制御回路14は追尾局選択ゲート11を通過
した追尾制御パルスに基づいてゲート15を介し、主局
分周器5または従局分周器6の分周比率を変える。
Further, the tracking control circuit 14 changes the frequency division ratio of the main station frequency divider 5 or the slave station frequency divider 6 via the gate 15 based on the tracking control pulse that has passed through the tracking station selection gate 11.

ゲート15は上記AFC局選択回路からの信号に基づい
て追尾制御回路14を主局分周器5または従局分周器6
に切り換え接続するゲート回路である。
The gate 15 connects the tracking control circuit 14 to the main station frequency divider 5 or the slave station frequency divider 6 based on the signal from the AFC station selection circuit.
This is a gate circuit that switches and connects to the

なお、AFC回路では、例えば特公昭49−28285
号公報に開示されているように、発振パルスのうち一定
期間のパルスを無効にして、すなわち発振パルス列数を
調整することによって実質的に周波数制御を行うように
してもよい。
In addition, in the AFC circuit, for example, Japanese Patent Publication No. 49-28285
As disclosed in the above publication, frequency control may be substantially performed by disabling pulses of a certain period among the oscillation pulses, that is, by adjusting the number of oscillation pulse trains.

上記主局サンプル回路3のサンプル回路31のサンプル
データは主局信号良否積算回路17に導かれる。
The sample data of the sample circuit 31 of the main station sample circuit 3 is led to the main station signal quality integration circuit 17.

また、従局サンプル回路4のサンプル回路41のサンプ
ルデータは従局信号良否積算回路18に導かれる。
Further, the sample data of the sample circuit 41 of the slave station sample circuit 4 is led to the slave station signal quality integration circuit 18.

主局信号良否積算回路1γおよび従局信号良否積算回路
18は信号良否判断用パルス二をサンプル点で積算する
回路で、パルスが検出されれば+1を実行し、検出され
なげれば一〇を実行する。
The main station signal quality integration circuit 1γ and the slave signal quality integration circuit 18 are circuits that integrate pulse 2 for determining signal quality at sample points, and if a pulse is detected, executes +1, and if not detected, executes 10. do.

このような積算回路は例えば、アップダウンカウンタな
どで構成することができる。
Such an integration circuit can be configured with, for example, an up/down counter.

なお、積算回数は同じ信号条件下では積算結果にあまり
ばらつきがないように予め定められている。
Note that the number of integrations is predetermined so that there is not much variation in the integration results under the same signal conditions.

このため積算結果は受信信号波形が適正である程大きく
、適正でない程小さくなる。
Therefore, the more appropriate the received signal waveform is, the larger the integration result becomes, and the more inappropriate the received signal waveform is, the smaller the integration result becomes.

上記AFC局選択回路16は上記主局信号良否積算回路
17、従局信号良否積算回路18からの積算結果を比較
し、その大小を比較する比較回路を有する。
The AFC station selection circuit 16 has a comparison circuit that compares the integration results from the main station signal quality integration circuit 17 and the slave station signal quality integration circuit 18 and compares the magnitude thereof.

また、上記主局AGC値回路7、従局AGCfili回
路8の出力であるAGC値を比較する比較回路を有する
It also has a comparison circuit for comparing the AGC values output from the master station AGC value circuit 7 and the slave station AGC fili circuit 8.

そして、AGC値がより太き(、かつ信号良否積算値が
より大きな局をAFC局として選択し、その選択信号を
AFC局選択ゲート10、追尾局選択ゲート11および
ゲート15に出力する。
Then, a station with a larger AGC value (and a larger signal quality integrated value) is selected as an AFC station, and its selection signal is output to the AFC station selection gate 10, the tracking station selection gate 11, and the gate 15.

AFC局選択ゲート10は上述のように、AFC局選択
回路16から選択信号を受は取ると選択局のサンプル回
路とAFC回路12とを接続し、一方追尾局選択ゲート
11は選択信号を受は取ると選択局と反対の局のサンプ
ル回路と追尾制御回路14とを接続する。
As described above, when the AFC station selection gate 10 receives the selection signal from the AFC station selection circuit 16, it connects the sample circuit of the selected station and the AFC circuit 12, while the tracking station selection gate 11 receives the selection signal. When the selected station is selected, the sample circuit of the station opposite to the selected station is connected to the tracking control circuit 14.

また、ゲー115は選択信号を受は取ると選択局が主局
であるときには追尾制御回路14を従局分周器6に接続
し、選択局が従局であるときには追尾制御回路14を主
局分周器5に接続する。
Furthermore, upon receiving the selection signal, the game 115 connects the tracking control circuit 14 to the slave station frequency divider 6 when the selected station is the master station, and connects the tracking control circuit 14 to the master station frequency divider 6 when the selected station is the slave station. Connect to device 5.

なお、AFC局選択回路16は、動作時に主従局の信号
良否積算値の大きさが逆転し、かつAGC値の大きさが
逆転して、さらにそのAGC値の差が一定の値以上にな
ったときAFC局として選択している局を切り換える。
It should be noted that the AFC station selection circuit 16 detects when, during operation, the magnitude of the signal quality integrated value of the master and slave stations is reversed, the magnitude of the AGC value is reversed, and furthermore, the difference between the AGC values exceeds a certain value. Switch the station selected as the AFC station.

このように動作時において、AGC値の差が一定値以上
であることを測定基準局の新たな選択条件とするのは、
測定基準局が頻繁に変動するのを防止するためである。
In this way, during operation, the new selection condition for the measurement standard station is that the difference in AGC values is a certain value or more.
This is to prevent the measurement standard station from changing frequently.

AFC局選択回路16は以上のように主従局のAGC値
の大きさを比較することによってより大きな振幅の局信
号を選択することができ、かつ信号良否積算値の大きさ
を比較することによって信号波形のより適正な局信号を
選択し、振幅が大きく、がつ信号波形が適正な信号の局
をAFC局として選択する。
As described above, the AFC station selection circuit 16 can select a station signal with a larger amplitude by comparing the magnitudes of the AGC values of the master and slave stations, and can select a station signal with a larger amplitude by comparing the magnitudes of the signal quality integrated values. A station signal with a more appropriate waveform is selected, and a station with a signal having a large amplitude and an appropriate signal waveform is selected as an AFC station.

以上の構成で今、仮に主局がAFC局として選択されて
いる場合について説明すると、主局サンプル回路3、従
局サンプル回路4はそれぞれ主局分周器5、従局分周器
6からのサンプルパルスによってAGCパルスロ、信号
良否判断用パルス二およびAFC/追尾用パルスへをサ
ンプリングし、サンプル点と追尾点とのドリフト量は、
主局信号についてはAFC回路12によって調整し、従
局信号においては追尾制御回路14によって調整する。
To explain the case where the main station is selected as an AFC station with the above configuration, the main station sample circuit 3 and the slave station sample circuit 4 receive sample pulses from the master station frequency divider 5 and the slave station frequency divider 6, respectively. The AGC pulse low, signal quality judgment pulse 2, and AFC/tracking pulse are sampled by , and the amount of drift between the sample point and the tracking point is
The main station signal is adjusted by the AFC circuit 12, and the slave station signal is adjusted by the tracking control circuit 14.

すなわち、主局信号の追尾点に関するサンプル点のドリ
フト量はAFC/追尾制御パルス形成回路33で検出さ
れ、その制御パルスがAFC回路12に出力されること
によってサンプル点が追尾点に一致するよう基準発振器
13の発振周波数を制御するとともに、従局信号の追尾
点に対するサンプル点のドリフト量はAFC/追尾制御
パルス形成回路43によって検出され、その制御パルス
が追尾制御回路14に出力されることによってサンプル
点が追尾点と一致するよう従局分周器60分周比率が制
御される。
That is, the amount of drift of the sample point with respect to the tracking point of the main station signal is detected by the AFC/tracking control pulse forming circuit 33, and the control pulse is output to the AFC circuit 12, so that the sample point matches the tracking point as a reference. In addition to controlling the oscillation frequency of the oscillator 13, the amount of drift of the sample point with respect to the tracking point of the slave signal is detected by the AFC/tracking control pulse forming circuit 43, and the control pulse is output to the tracking control circuit 14, thereby changing the sample point. The frequency division ratio of the slave frequency divider 60 is controlled so that the following point coincides with the tracking point.

また、主局信号の振幅の大きさの程度は利得制御データ
形成回路34で検出され、その大きさを一定にするため
の制御データを主局AGC値回路7に出力し、増幅回路
1の利得制御を行う。
Further, the degree of the amplitude of the main station signal is detected by the gain control data forming circuit 34, and control data for making the amplitude constant is output to the main station AGC value circuit 7, and the gain of the amplifier circuit 1 is Take control.

同様に従局信号の振幅の大きさは利得制御データ形成回
路44で検出され、その振幅の大きさを一定にするため
の制御データを従局AGC値回路8に出力し、増幅回路
1の利得制御を行う。
Similarly, the magnitude of the amplitude of the slave signal is detected by the gain control data forming circuit 44, and control data for making the magnitude of the amplitude constant is output to the slave AGC value circuit 8, which controls the gain of the amplifier circuit 1. conduct.

さらに、主局信号良否積算回路17、従局信号良否積算
回路18はそれぞれ信号良否判断パルス二をサンプル点
でサンプリングしたデータを積算している。
Furthermore, the main station signal quality integration circuit 17 and the slave station signal quality integration circuit 18 each integrate data obtained by sampling the signal quality determination pulse 2 at the sample points.

このような動作状態において、従局信号良否積算回路1
8の積算値の大きさが主局信号良否積算回路17の積算
値の太きさより大きくなって、かつ従局AGC値の大き
さが主局AGC値の大きさより一定の1直以上大きくな
ると、AFC局選択回路16はAFC局選択ゲート10
、追尾局選択ゲート11およびゲート15に対して従局
をAFC局として選択する信号を送る。
In such an operating state, the slave station signal quality integration circuit 1
When the magnitude of the integrated value of 8 becomes larger than the integrated value of the main station signal quality integration circuit 17, and the magnitude of the slave AGC value is greater than the magnitude of the master station AGC value by a fixed number of cycles or more, the AFC The station selection circuit 16 is an AFC station selection gate 10
, sends a signal to the tracking station selection gate 11 and gate 15 to select the slave station as an AFC station.

AFC局選択ゲート10はこの信号が出たとき従局サン
プル回路4のAFC/追尾制御パルス形成回路43をA
FC回路12に接続し、また、追尾局選択ゲート11は
主局サンプル回路3のAFC/追尾制御パルス形成回路
33を追尾制御回路14に接続する。
When this signal is output, the AFC station selection gate 10 selects the AFC/tracking control pulse forming circuit 43 of the slave station sample circuit 4.
The tracking station selection gate 11 also connects the AFC/tracking control pulse forming circuit 33 of the main station sample circuit 3 to the tracking control circuit 14 .

さらに、ゲート15は追尾制御回路14を主局分局器5
に接続する。
Further, the gate 15 connects the tracking control circuit 14 to the main station branching unit 5.
Connect to.

このため従局信号の追尾点とサンプル点とのドリフトは
AFC回路12による基準発振機13の発振周波数制御
によって行われ、また主局信号の追尾点とサンプル点と
のドリフトは追尾制御回路14による主局分周器5の分
周比率制御によって行われる。
Therefore, the drift between the tracking point and the sample point of the slave station signal is controlled by the oscillation frequency control of the reference oscillator 13 by the AFC circuit 12, and the drift between the tracking point and the sample point of the main station signal is controlled by the tracking control circuit 14. This is performed by controlling the frequency division ratio of the station frequency divider 5.

すなわち、主局信号が従局信号より信号状態が良ければ
主局信号によってAFC回路12の動作が行われるが、
主局信号より従局信号の信号状態のほうが良い場合には
従局信号によってAFC回路12の動作が行われる。
That is, if the signal condition of the main station signal is better than that of the slave signal, the AFC circuit 12 is operated by the main station signal.
If the signal condition of the slave station signal is better than that of the master station signal, the operation of the AFC circuit 12 is performed by the slave station signal.

以上のようにこの発明によれば、追尾速度を速くする必
要のあるAFC動作を常に信号状態の良好な局の信号に
よって行うために、主局信号の受信状態が悪い位置およ
び従局信号の受信状態が悪い位置へ移動しても両方の局
の追尾を容易に、かつ安定に行うことができる。
As described above, according to the present invention, in order to always perform AFC operation that requires a faster tracking speed using the signal of a station with a good signal condition, it is possible to perform the AFC operation at a position where the reception condition of the main station signal is poor and the reception condition of the slave station signal. Even if the station moves to a bad position, both stations can be easily and stably tracked.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例であるロランA受信機のブロ
ック図であり、第2図は第1図の要部の信号波形を示す
図である。 3−主局サンプル回路、4−従局サンプル回路、5−主
局分周器、6−従局分周器、7−主局AGC値回路、8
−従局AGC値回路、1〇−AFC局(測定基準局)選
択ゲート、11−追尾局選択ゲート、12−AFG回路
、13−基準発振機、14−追尾制御回路、16−AF
C局(測定基準局)選択回路、17−主局信号良否積算
回路、18−従局信号良否積算回路。
FIG. 1 is a block diagram of a Loran A receiver according to an embodiment of the present invention, and FIG. 2 is a diagram showing signal waveforms of the main parts of FIG. 1. 3-Main station sample circuit, 4-Slave station sample circuit, 5-Main station frequency divider, 6-Slave station frequency divider, 7-Main station AGC value circuit, 8
-Slave station AGC value circuit, 10-AFC station (measurement reference station) selection gate, 11-tracking station selection gate, 12-AFG circuit, 13-reference oscillator, 14-tracking control circuit, 16-AF
C station (measurement reference station) selection circuit, 17-main station signal quality integration circuit, 18-slave station signal quality integration circuit.

Claims (1)

【特許請求の範囲】 1 基準パルスを分周して主局信号および従局信号をサ
ンプリングし、そのサンプル点と前記追尾点とのドリフ
トを調整する制御パルスを基準パルスの周波数匍脚を行
5AFC回路と分周比率制御を行う追尾制御回路へ入力
して前記追尾点と前記サンプル点との同期を保つととも
に、主従局信号の利得を一定にするAGC回路を備えた
ロランA受信機において、 主局信号のそれぞれを1回数分して信号良否判断用パル
スを形成する信号良否判断パルス形成回路と、 前記サンプル点での前記信号良否判断用パルスの検出、
非検出回数を積算する信号良否積算手段と、 前記AGC回路の主局AGC値と従局AGC値とを比較
しかつ前記信号良否積算手段の主局信号良否積算値と従
局信号良否積算値とを比較する比較手段を有し、その比
較結果から振幅が大きくかつ信号波形が適正な信号の局
を測定基準局として選択する測定基準局選択手段と、 選択された測定基準局が主局であるときは、前記AFC
回路を主局用の制御パルス形成回路に、かつ前記追尾制
御回路を従局用の制御パルス形成回路に接続し、測定基
準局が従局であるときは、前記AFC回路を従局用の制
御パルス形成回路に、かつ前記追尾制御回路を主局用の
制御パルス形成回路に接続するゲート手段とを有しなる
ロランA受信機。
[Claims] 1. A control pulse that divides the frequency of the reference pulse to sample the main station signal and the slave signal, and adjusts the drift between the sample point and the tracking point by adjusting the frequency of the reference pulse. 5AFC circuit In a Loran A receiver equipped with an AGC circuit that maintains synchronization between the tracking point and the sample point by inputting the signal to a tracking control circuit that performs frequency division ratio control, and keeps the gain of the main and slave station signals constant, a signal quality determination pulse forming circuit that processes each signal once to form a signal quality determination pulse; and detecting the signal quality determination pulse at the sample point;
Compare the main station AGC value and the slave station AGC value of the AGC circuit with a signal quality accumulation means for accumulating the number of non-detections, and compare the master station signal quality accumulation value and the slave station signal quality accumulation value of the signal quality accumulation means. measurement reference station selection means for selecting a station with a signal having a large amplitude and an appropriate signal waveform as a measurement reference station based on the comparison result; and when the selected measurement reference station is a main station, said AFC;
The circuit is connected to a control pulse forming circuit for a master station, and the tracking control circuit is connected to a control pulse forming circuit for a slave station, and when the measurement reference station is a slave station, the AFC circuit is connected to a control pulse forming circuit for a slave station. , and gate means for connecting the tracking control circuit to a control pulse forming circuit for a main station.
JP15943079A 1979-12-07 1979-12-07 Loran A receiver Expired JPS5855466B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15943079A JPS5855466B2 (en) 1979-12-07 1979-12-07 Loran A receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15943079A JPS5855466B2 (en) 1979-12-07 1979-12-07 Loran A receiver

Publications (2)

Publication Number Publication Date
JPS5697886A JPS5697886A (en) 1981-08-06
JPS5855466B2 true JPS5855466B2 (en) 1983-12-09

Family

ID=15693565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15943079A Expired JPS5855466B2 (en) 1979-12-07 1979-12-07 Loran A receiver

Country Status (1)

Country Link
JP (1) JPS5855466B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60125860U (en) * 1984-02-02 1985-08-24 藤田 眞吾 No-return device in fish traps

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60125860U (en) * 1984-02-02 1985-08-24 藤田 眞吾 No-return device in fish traps

Also Published As

Publication number Publication date
JPS5697886A (en) 1981-08-06

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