JPS5853428U - Chattering removal circuit - Google Patents

Chattering removal circuit

Info

Publication number
JPS5853428U
JPS5853428U JP14918381U JP14918381U JPS5853428U JP S5853428 U JPS5853428 U JP S5853428U JP 14918381 U JP14918381 U JP 14918381U JP 14918381 U JP14918381 U JP 14918381U JP S5853428 U JPS5853428 U JP S5853428U
Authority
JP
Japan
Prior art keywords
removal circuit
chattering removal
signal
switch element
open
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14918381U
Other languages
Japanese (ja)
Inventor
裕幸 土井
曽根　茂夫
曽田　篤
Original Assignee
株式会社チノ−
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社チノ− filed Critical 株式会社チノ−
Priority to JP14918381U priority Critical patent/JPS5853428U/en
Publication of JPS5853428U publication Critical patent/JPS5853428U/en
Pending legal-status Critical Current

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  • Keying Circuit Devices (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来例を示す構成説明図、第２図はその動作説
明用波形図、第３図は、この考案の一寥施例を示す構成
説明図、第４図はその動作説明用　　　−波形図であ〜
る。　　　　　− １・・」スイッチ素子　２６＠＠リトリガブル単安定与
４ルチバイブレータ　３ａ＊ｅナンド回路。 第、７１司　− ４ｗ −ｅ−−−−う− 一一一一→」　　− ｔ／ＷFIG. 1 is an explanatory diagram of the configuration showing a conventional example, FIG. 2 is a waveform diagram for explaining its operation, FIG. 3 is an explanatory diagram of the configuration of an embodiment of this invention, and FIG. 4 is an explanatory diagram of its operation. In the waveform diagram
Ru. - 1...''Switch element 26@@Retriggerable monostable and 4 multivibrator 3a*e NAND circuit. No. 71 - 4w -e---u- 1111→" - t/W

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] スイッチ素子の開閉信号によりオン信号を発生するトリ
ガブル単安定マルチバイブレータ呂、このリトリガブル
単安定マールチバイブレータのオン時低レベルとなる信
号と前記スイッチ素子の開閉信号のナンドをとるナンド
回路とを備えたことを特徴とするチャタリング除去回路
。A triggerable monostable multivibrator that generates an ON signal based on an open/close signal of a switch element, and a NAND circuit that takes a NAND of a signal that is at a low level when the retriggerable monostable multivibrator is turned on and the open/close signal of the switch element. A chattering removal circuit characterized by:
JP14918381U 1981-10-06 1981-10-06 Chattering removal circuit Pending JPS5853428U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14918381U JPS5853428U (en) 1981-10-06 1981-10-06 Chattering removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14918381U JPS5853428U (en) 1981-10-06 1981-10-06 Chattering removal circuit

Publications (1)

Publication Number Publication Date
JPS5853428U true JPS5853428U (en) 1983-04-11

Family

ID=29941966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14918381U Pending JPS5853428U (en) 1981-10-06 1981-10-06 Chattering removal circuit

Country Status (1)

Country Link
JP (1) JPS5853428U (en)

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