JPS5851663A - Trunk system for switchboard - Google Patents

Trunk system for switchboard

Info

Publication number
JPS5851663A
JPS5851663A JP15100281A JP15100281A JPS5851663A JP S5851663 A JPS5851663 A JP S5851663A JP 15100281 A JP15100281 A JP 15100281A JP 15100281 A JP15100281 A JP 15100281A JP S5851663 A JPS5851663 A JP S5851663A
Authority
JP
Japan
Prior art keywords
analog
signals
digital
trunk
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15100281A
Other languages
Japanese (ja)
Other versions
JPS6230543B2 (en
Inventor
Hiroshi Miyake
博 三宅
Hidemi Harada
原田 秀実
Takashi Nara
奈良 隆
Atsuhisa Takahashi
淳久 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15100281A priority Critical patent/JPS5851663A/en
Publication of JPS5851663A publication Critical patent/JPS5851663A/en
Publication of JPS6230543B2 publication Critical patent/JPS6230543B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Abstract

PURPOSE:To attain monitor and instruction from a supervisory desk without using an interruption connecting device, by directly connecting the supervisory desk to an exchange trunk and connecting switchboard and the supervisory desk via the exchange desk trunk. CONSTITUTION:G0-G3 of an MX pick up digital signals a1-d1 at each channel from DHW. The signals a1-d1 are converted into analog signals a2-d2 at a DA and transmitted to an AAD, which sums the analog signals at each channel for the rest channels eliminating the analog signals for one channel's share from the signals a2-d2 and produces mixed analog signals a3-d3. The signals a3-d3 are converted into mixed digital signals a4-d4 with an AD and transmitted to G4-G7. The G4-G7 transmit the signals a4-d4 as channel digital signals a5- d5. Thus, a caller, a called party and the operator can monitor calls with each other. Further, through an EX, a supervisor can communicate with the operator without being monitored by the caller and the called party.

Description

【発明の詳細な説明】 本発−は交換台トランク方式、41に時分割ネットワー
クを有する電子交換機における交換台トランタ方式に関
す。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switchboard trunk system and a switchboard trunk system in an electronic exchange having a time division network at 41.

馬Illは仁の種電子交換機における従来ある交換台ト
ランク方式の一例を示す図である**X図において、交
換台OBD扱者が入トランクICTに着信した呼に交換
台トランクFAT並びに時分割ネットワークNW内の通
話路l訃よび2を経由して応答し、発呼者の要求に応じ
て通話路3を経由し1出トランク0GTK発信し、被呼
者を呼出す、被呼者が応答すると着信を告げ、必!!あ
れば発呼者および被呼者と三者通話を行った後、豪絖ト
ランクCNT並びに時分ネットワークNW内の通話路7
および8を経由して入トランクICTと出トランクOG
Tとを接続し、発呼者と被呼考量の通話を開始させる。
Ma Ill is a diagram showing an example of a conventional switchboard trunk system in a Jinnotane electronic switchboard. Answer via communication paths 1 and 2 within the NW, and at the caller's request, make a 1-outgoing trunk 0 GTK call via communication path 3 to call the called party. When the called party answers, the call is received. Tell me, you must! ! After conducting a three-way call with the calling party and the called party, if any, the telephone trunk CNT and the communication path 7 in the hour-minute network NW are
Incoming trunk ICT and outgoing trunk OG via
T and the caller and called party begin a conversation.

一方監督台KBDの監督者が交換台OBD扱者の交換取
扱状態と聴話し所要の指示を与えるためには、時分割ネ
ットワークN胃内に通話路4.5および6を設定して2
を解放し、混合トランクTWTKよシ交換台OBDの発
呼者訃よび被呼者に対する応対を聴話する。若し監督者
が発呼者および被呼者に聴取される仁と無く交換台OB
D換者に指示を与える場合には、入トランクICTと出
トランクOCTとを一時接続トランクCNTK′Iik
続替えを行う。
On the other hand, in order for the supervisor at the supervisory board KBD to give instructions to the switchboard OBD handler about the exchange handling status and the required listening/talking, communication paths 4.5 and 6 must be set up in the time-sharing network N.
, and listens to the caller's message and response to the called party from the mixed trunk TWTK switchboard OBD. If the supervisor does not have the ability to be heard by the caller and called party, the switchboard OB
When giving instructions to the D exchanger, the incoming trunk ICT and outgoing trunk OCT are temporarily connected to the trunk CNTK'Iik.
Continue to replace.

以上の説明から明らかな如く、従来ある交換台トランク
方式にかいては、監督台KBDからの聴話のために混合
トランクTWTを使用する必要があシ、また監督者と交
換台OBD扱者とのみの通話のために接続トランクCN
Tへの接続替えを必要とした。更に交換台トランクPA
T内Kをいて発呼者、被呼者および交換台OBD扱者間
の王者通話を実現するために、従来ディジタル加算器が
使用されていた。#ディジタル加算器による混合に蝶、
所定の圧伸特性を有するディジタル信号を−I直線符号
に戻して加算を行い、加算後に再び圧伸特性を持たせる
必要があシ、多くの圧伸器を必要とし、大型且つ不経済
となる。
As is clear from the above explanation, in the conventional switchboard trunk system, it is necessary to use a mixed trunk TWT for listening from the supervisor's KBD, and only the supervisor and the switchboard OBD operator need to use the mixed trunk TWT. Connect trunk CN for calls
It was necessary to change the connection to T. Furthermore, switchboard trunk PA
Traditionally, digital adders have been used to implement a telephone call between the calling party, the called party, and the switchboard OBD operator. #Butterfly to mix by digital adder,
It is necessary to add the digital signals having a predetermined companding characteristic back to the -I linear code, and then to make the companding characteristic again after the addition, which requires many companders, making it large and uneconomical. .

本発明の目的は、前述の如き従来ある交換台トランク方
式の欠点を除去し、混合トランクおよび接続トランク等
を用いること無く監督台からの聴話および指示を可能と
する交換台トランクを経済的に実現することにある。
An object of the present invention is to eliminate the drawbacks of the conventional switchboard trunk system as described above, and to economically realize a switchboard trunk that allows listening and instructions from the supervisor's desk without using mixed trunks or connecting trunks. It's about doing.

この目的は、時分割ネットワークを有する電子交換機に
おいて、該時分割ネットワークのII数の通話路から通
話路毎ディジタル信号を抽出するゲートと、酸ゲートの
出力する複数の通話路毎ディジタル信号をそれぞれ通話
路毎アナログ信号KW換するディジタルアナログ変換器
と、レディジタルアナ四グ変換器の出力する複数の通話
路毎アナログ信号からそれぞれ1通話路分宛除いて、加
算した混合アナログ信号を複数組生成するアナミグ加算
器と、該アナミグ加算器の出方する複数の混合アナ霧グ
信号をそれぞれ混合ディジタル信号にり換するアナログ
ゲイジタル変換器と、皺アナログディジタル変換器の出
方する*eの混合ディジタル信号を前記時分割ネットワ
ークの各混合ディジタル信号に含ま畑違話路に送出する
ゲートから構成される混合回路と、前記時分割ネットワ
ークの前記複数の通話路から2通話路を抽出し1通話路
毎に蓄積するシフトレジスタと、腋シフトレジスタの出
力する前記2通話路のディジタル信号を前記時分割ネッ
トワークの前記2通話路に変換して送出するゲートとか
ら構成される2通話路交換回路とを具備することによ〕
達成される。
The purpose of this is to provide an electronic exchange having a time-division network with a gate that extracts digital signals for each channel from II number of channels of the time-division network, and a gate that extracts digital signals for each channel from II number of channels of the time-division network, and a gate that extracts digital signals for each channel from a plurality of acid gates. A digital-to-analog converter that converts the analog signal KW for each channel and a digital-to-analog converter output a plurality of analog signals for each channel, each of which is addressed to one channel, and is added to generate a plurality of sets of mixed analog signals. an analog-gauge adder, an analog-to-digital converter that converts a plurality of mixed analog-gauge signals output from the analog-gauge adder into mixed digital signals, and an *e mixed digital signal output from the wrinkled analog-to-digital converter. a mixing circuit comprising a gate for transmitting a signal included in each mixed digital signal of the time division network to a different channel; and a mixing circuit that extracts two communication channels from the plurality of communication channels of the time division network, and extracts two communication channels for each communication channel. and a gate for converting the digital signals of the two communication paths output from the armpit shift register into the two communication paths of the time division network and transmitting the converted signals. by doing]
achieved.

以下、本発明の一!l!施例を第2図乃至第5図によシ
説明する。第2図は本発明の−!J施例による交換台ト
ランク方式を示す図であシ、第3図は第2図に示される
交換台トランクの構成例を示す図であシ、第4図をよび
第5図は第3図に示される各ゲートの制御信号を例示す
る図である。なお、全図を通じて同一符号は同一対象を
示す、第2図に示される交換台トランクPST’は、交
換台OBD扱者が入トランクICTIIの発呼者および
出トランクOGT側の被呼者と王者または王者通話を行
つている状態で、監督台KDDから時分割ネットワーク
N胃内の通話路9を設定することによシ、監督者が直接
前記王者また蝶三者通話を聴話することが出来る。更に
交換台トランクPST ’は、入トランクICTと出ト
ランクOCTとの接続と独立に、監督台KBDと交換台
OBDとを接続することが可能となシ、第1図における
が如き混合トランクTWTおよび接続トランクCNTが
不要となる。第3図に示される如く、交換台トランクP
8T’は混合回路MXと1通話路交換回路EXとを具備
している。今時分割ネットワークNW内の通話路1.3
.2および9は第4図に示される如き下シハイウェイD
HWの各フレームF内に属し、発呼者、被呼者、交換台
扱者および監督者の音声は、それぞれ通話路毎ディジタ
ル信号aいbI、(11およびd、 として下シハイウ
ェイDHWK属する他の通話路と共に交換台トランクP
ST’に入力される。混合回路MXのゲートGO乃至G
lは第4図に示される如き制御信号g、乃至gsをそれ
ぞれ入力することによシ、時分ネットワークNWから入
力される下夛ハイウェイDHWから通話路1,3.2お
よび9に対応する通話路毎ディジタル信号a1%bt 
、ei およびdlを抽出する。ゲートG・乃至G、か
ら出力された通話路毎ディジタル信号11 、bl 、
cl およびdlは、ディジタルアナ四グ変換器DAK
よシそれぞれ通話路毎アナログ信号&@、by、clお
よびd。
Below is one of the inventions! l! The embodiment will be explained with reference to FIGS. 2 to 5. Figure 2 shows -! of the present invention. FIG. 3 is a diagram showing an example of the configuration of the switchboard trunk shown in FIG. 2, and FIG. 4 and FIG. FIG. 3 is a diagram illustrating control signals for each gate shown in FIG. Note that the same reference numerals indicate the same objects throughout the figures.The switchboard trunk PST' shown in FIG. Alternatively, by setting the communication path 9 within the time division network N from the supervisor's desk KDD while the supervisor is making a telephone call, the supervisor can directly listen to the three-party telephone call. Furthermore, the switchboard trunk PST' is capable of connecting the supervisory board KBD and the switchboard OBD independently of the connection between the incoming trunk ICT and the outgoing trunk OCT. The connection trunk CNT becomes unnecessary. As shown in Figure 3, the switchboard trunk P
8T' includes a mixing circuit MX and a one-channel switching circuit EX. Call path 1.3 within the current time division network NW
.. 2 and 9 are the lower seaway D as shown in FIG.
The voices of the calling party, the called party, the switchboard operator, and the supervisor belong to each frame F of the HW, and the voices of the calling party, the called party, the switchboard operator, and the supervisor belong to the lower highway DHWK as digital signals abI, (11 and d, respectively) for each channel. switchboard trunk P along with the communication path of
It is input to ST'. Gates GO to G of mixed circuit MX
By inputting control signals g to gs as shown in FIG. Digital signal for each path a1%bt
, ei and dl. Digital signals 11, bl, for each channel output from gates G to G,
cl and dl are digital analog to 4G converters DAK
Analog signals for each communication channel &@, by, cl and d.

に変換されて、アナログ加算器AADに伝達される・ア
ナログ加算器AADは4組の加算器A A p。
and is transmitted to the analog adder AAD. The analog adder AAD consists of four sets of adders A A p.

乃至AADsKよp1人力された通話路毎アナログ信号
at 、bt s egおよび−3からそれぞれ1通話
路分の通話路毎アナログ加算a、%bt、C8またBd
tを除いた残りの3通話路分の通話路毎アナログ信号(
be、6g%dB  )、(&gbc雷、d雪)、C&
*、be、dl)および(h%b1、CI )をそれぞ
れアナログ加算し、混合アナ田グ信号1s%bss6m
およびdlを生成する。アナログ加算器AADから出力
された混合アナログ俳号am 、bm 、clおよびd
、は、アナログディジタル変換器ADKよりそれぞれ混
合ディジタル信号&4 、bm 、C4およびdnK変
換されて、グー)G4乃至Q、に伝達される。ゲートG
4乃至G!は第4図に示される如き制御1乍号g・乃至
g1とそれぞれ同期した制御信号g、乃至Kvを入力す
ることにより、各混合ディジタル信号J’4 、bm 
、C4kよびd、をゲートG1.経由で第4図に示され
る如き上シハイウェイの各フレームF内の通話路1.3
.2および9に、通話路毎ディジタル信号law 、b
e 、egおよびd。
From AADsK to p1 Analog additions a, %bt, C8 and Bd for each channel for one channel from the manually generated analog signals at, bt s eg and -3
Analog signals for each channel for the remaining 3 channels excluding t (
be, 6g%dB), (&gbc lightning, d snow), C&
*, be, dl) and (h%b1, CI) are added in analog form to form a mixed analog tag signal 1s%bss6m
and dl. Mixed analog haiku am, bm, cl and d output from analog adder AAD
, are respectively converted into mixed digital signals &4, bm, C4 and dnK by analog-to-digital converter ADK and transmitted to G4 to Q. Gate G
4 to G! By inputting control signals g to Kv synchronized with control signals g to g1 as shown in FIG. 4, each mixed digital signal J'4, bm
, C4k and d, to gate G1. 1.3 in each frame F of the upper highway as shown in FIG.
.. 2 and 9, digital signals law, b for each channel
e, eg and d.

として送出する。#通話路銀ディジタル信号11、bm
s @wおよびd、には、それぞれ下シハイウ凰イDH
Wの通話路毎ディジタル信号(1)IqJ、ds )、
(al、1lllbdl)、(al、bH、(lx )
および(a、、bl−c+)が含まれているので、発呼
者、被呼者、交換台扱者シよび監督者はそれぞれ他の王
者の通話を聴取することが出来る・なお制御信号g、の
みを常時論理値0に維持することによシ、監督者の送話
を運ぶ通話路毎ディジタル信号d1を混合回路MXに入
力を阻止し、監督者は聴話のみを行うことも出来る1次
に監督者が発呼者および被呼者に聴取されること無く交
換台扱者と会話を必要とする場合には、第5図に示す如
く、混合回路MXの制御信号IIs 、ga 、Kmお
よびg!を常時論理値0に維持し、2通話路変換回路の
グー)GaシよびG、に制御信号1mを入力する。2通
話路交換回路EXのシフトレジスタSRKは、通話路1
.3.2および90通話路毎ディジタル信号al、bl
、cMおよびdlを含む、下9ハイウ翼イDHWO総べ
てのディジタル傷号がバッ7アレジスメBRを介して入
力されるが、制御信号g、によシ、通話路2および9に
対応する期間だけ、クロック信号etkがゲートGaを
介して供給されるので、通話路2および9の通話路毎デ
ィジタル信号C8およびdlのみを交互に蓄積する。な
お各通話路毎ディジタル信号は8ビツト構成とし、シフ
トレジスタSRも8段構成とする8通話路2の終了時点
t、においてはシフトレジスタには通話路毎ディジタル
信号c1が蓄積され、通話路9の開始時点t、迄保持さ
れる1時点tlからシフトレジスタ5RKU通話路90
通話路毎ディジタル信号d1が1ビツト宛蓄積されると
共に、蓄積されていた通話路毎ディジタル信号@1が1
ビツト宛出力される。同様に通話路2の開始時点t・迄
シフトレジスタSRに保持されていた通話路毎ディジタ
ル信号d、は、時点t、から通話路毎ディジタル信号c
1が1ビツト宛蓄積されるに伴ない、1ビツト宛出力さ
れる。
Send as. #Call route silver digital signal 11, bm
s @w and d, respectively
Digital signal for each channel of W (1) IqJ, ds),
(al, 1lllbdl), (al, bH, (lx)
and (a,, bl-c+), the calling party, the called party, the switchboard operator, and the supervisor can each listen to the call of the other party. Furthermore, the control signal g , is always maintained at a logical value of 0, thereby preventing input of the digital signal d1 for each channel carrying the supervisor's transmission to the mixing circuit MX, and allowing the supervisor to only listen. If the supervisor needs to talk to the switchboard operator without being overheard by the calling and called parties, the control signals IIs, ga, Km and g! is always maintained at a logic value of 0, and a control signal 1m is input to G and G of the two-channel conversion circuit. The shift register SRK of the 2-channel exchange circuit EX is
.. 3.2 and 90 digital signals per channel al, bl
, The last 9 high wings DHWO, including CM and DL, are input via Bat 7 Agistra BR, but the period corresponding to the control signal G, Callway 2 and 9. Since the clock signal etk is supplied via the gate Ga, only the digital signals C8 and dl for each channel of channels 2 and 9 are stored alternately. Note that the digital signal for each channel has an 8-bit configuration, and the shift register SR also has an 8-stage configuration.At the end time t of the 8 channel 2, the digital signal c1 for each channel is accumulated in the shift register, and the shift register SR has an 8-stage configuration. The shift register 5RKU communication path 90 is held from one time tl until the start time t of the shift register 5RKU.
The digital signal d1 for each communication path is accumulated for 1 bit, and the accumulated digital signal for each communication path @1 becomes 1 bit.
Output to bits. Similarly, the digital signal d for each channel, which was held in the shift register SR until the start time t of channel 2, is the digital signal c for each channel from time t.
As 1 is accumulated for 1 bit, it is output for 1 bit.

この様にして通話路2訃よび9に対応してシフトレジス
タSRからは交換された通話路毎ディジタル信号d1お
よび(11が出力される。#交換された通話路毎ディジ
タル信号d、およびalは、制御信号g・により制御さ
れるゲートG、を介して上pハイウェイUHWの通話路
2および9にそれぞれ送出される0以上によシ交換台扱
者と監督者とは通話を交すことが出来る。一方混合回路
MXにおいて線、制御信号Km s Ilm 、g@ 
およびgマによルグートG* 、Gs −GaおよびG
、が阻止状態となるため、下ルハイウェイDHWからは
通話路lおよび3に対応する通話側毎ディジタル信号a
、およびす、のみが入力され、また上シハイウェイUH
WK%通話路1>よび3に対応する通話路毎ディジタル
信号a、>よびす、のみが送出される。然も通話路毎デ
ィジタル信号&、には通話路毎ディジタル信号b1のみ
が含まれ、また通話路毎ディジタル信号blFCは通話
路毎ディジタル信号a、のみが含まれるので、発呼者と
被呼者とは通話を交すことが出来る。更に発呼者と被呼
者との通話と、交換台扱者と監督者との通話とは互に独
立に交される。
In this way, the exchanged digital signals d1 and (11) for each communication path are output from the shift register SR corresponding to communication paths 2 and 9. #The exchanged digital signals d and al for each communication path are , the switchboard operator and the supervisor can communicate with each other via gates G controlled by control signals g, which are sent to communication paths 2 and 9 of the upper highway UHW, respectively. On the other hand, in the mixing circuit MX, the line, control signal Km s Ilm , g@
and g ma with Lugut G*, Gs -Ga and G
, is blocked, the lower highway DHW transmits the digital signal a for each calling side corresponding to communication paths l and 3.
, and S are input, and the upper HIGHWAY UH
Only the per-channel digital signals a, > and 3 corresponding to WK% channels 1 and 3 are sent out. However, since the digital signal for each communication path & includes only the digital signal for each communication path b1, and the digital signal for each communication path blFC contains only the digital signal for each communication path a, the calling party and the called party You can make phone calls with. Further, the calls between the calling party and the called party and the calls between the switchboard operator and the supervisor are carried out independently of each other.

以上の説明から明らかな如く、本実施例によれば監督者
は監督台KBDを交換台トランクPST’に直!#I!
絖することによシ、該交換台トランクPST’を経由し
て接続中の発呼者および被呼者に対する変換台OBD扱
者の応対が聴取出来、更に該交換台トランクFAT ’
を介して交換台OBD扱者とのみ通話を交し、その間発
呼者と被呼者とは該交換台トランクPST ’を介して
独立に通話炉可能となる。更に交換台トランクP8T 
’はアナレグ加算器AADを主体として構成され、ゲイ
ジタル加算器を用いる場合に比し小形且つ経済的となる
As is clear from the above explanation, according to this embodiment, the supervisor can direct the supervisor's stand KBD to the switchboard trunk PST'! #I!
By doing so, it is possible to listen to the response of the converter OBD operator to the calling party and the called party who are connected via the switchboard trunk PST', and also to listen to the response of the converter OBD operator to the calling party and the called party who are connected via the switchboard trunk PST'.
A call is exchanged only with the switchboard OBD operator via the switchboard OBD, while the calling party and the called party can communicate independently via the switchboard trunk PST'. Furthermore, switchboard trunk P8T
' is mainly composed of an analog adder AAD, and is smaller and more economical than the case where a gagetal adder is used.

なシ、第2図乃至第5図はあく迄本発明の一実施例に過
ぎずく例えば交換台トランクPST’に接続される時分
割ネットワークNW内の通話路1.2.3および9は同
一の下シハイウェイDHW訃よび上少ハイウェイUHW
K所属するものに限定されることは無く、複数のハイウ
ェイに分散所属することも考慮されるが、か\る場合に
%本発明の効果は変らない、tた通話路毎ディジタル信
号F!8ビットから構成されるものに限定されることは
無く、他の任意ビット数から構成される場合にも本発明
の効果は変らない、更に交換台トランクPST’に接続
される通話路数および種類は図示されるものに限定され
ることは無く、他に幾多の変形が考慮されるが、何れの
場合にも本発明の効果は変らない。
2 to 5 are merely one embodiment of the present invention. For example, the communication paths 1, 2, 3 and 9 in the time division network NW connected to the switching trunk PST' are the same. Lower Highway DHW and Upper Highway UHW
It is not limited to those belonging to F!K, and distributed distribution to multiple highways is also considered, but in such a case, the effects of the present invention will not change. The effect of the present invention is not limited to 8 bits, and the effects of the present invention do not change even when it is composed of any other number of bits.Furthermore, the number and type of communication paths connected to the switching trunk PST' are is not limited to what is shown in the drawings, and many other modifications may be considered, but the effects of the present invention will not change in any case.

以上、本発明によれば、時分割ネットワークを有する電
子交換機において、交換台トランクを介する接続に直接
割込接続か可能となシ、混合トランク等の割込接続用機
器が不要となシ、また交換台トランク内で独立な二者通
話経路が複数組構成され、接続トランク等の独立通話用
機器が不要となる。更に交換台トランクを経由する多者
通話をアナログ信号の加算により実現するため交換台ト
ランクの小形化・経済化が達成される。
As described above, according to the present invention, in an electronic exchange having a time division network, it is possible to make a direct interrupt connection to a connection via a switching board trunk, and there is no need for interrupt connection equipment such as a mixed trunk. A plurality of sets of independent two-party call paths are configured within the switchboard trunk, eliminating the need for independent call equipment such as connection trunks. Furthermore, since multiparty calls via the switching trunk are realized by adding analog signals, the switching trunk can be made smaller and more economical.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来ある交換台トランク方式の一例を示す図、
第2図は本発明の一実施例による交換台トランク方式を
示す図、第3図は第2図に示される交換台トランクの構
成例を示す図、第4図は第3図に示される混合回路の各
ゲートの制御信号を例示する図、第5因は第3図に示さ
れる2通話路交換回路のゲートの制御信号を例示する図
、である。 図において、NWは時分割ネットワーク、11乃至9は
通話路、ICTは入トランク、0GTFi出トランク、
CNTt;j:接続トランク、PATシよびPST’は
交換台トランク、TWTは混合トランク、OBDは交換
台、KBDは監督台、MXは混合回路、EXは2通話路
交換回路、G嗜乃至G1゜はゲート、DAはディジタル
アナログ変換器、ADはアナログディジタル質換器、A
ADはアナログ加算器、A・A/◆乃至ム、AD*は加
算器、B・Rはパラ2アレジ第り1.SRはシ7トレジ
ス久、DHWは下シハイウェイ、UHWは上シハイウェ
イ% al s bl・01、dl、al、bl、cl
およびd、は通話路毎ディジタル信号、at s bt
 、clおよびd!は通話路毎アナログ信号、&a 、
ba%C1およびdlは混合アナログ信号、a4 、b
4 、Caおよびd4は混合ディジタル信号、g・乃至
g@は制御信号、ctkはクロック信号、Fはフレーム
、t、乃至t8は時点、を示す。 第1図 子2図
Figure 1 is a diagram showing an example of a conventional switchboard trunk system.
2 is a diagram showing a switching board trunk system according to an embodiment of the present invention, FIG. 3 is a diagram showing an example of the configuration of the switching board trunk shown in FIG. 2, and FIG. 4 is a diagram showing a configuration example of the switching board trunk system shown in FIG. The fifth factor is a diagram illustrating control signals for each gate of the circuit, and the fifth factor is a diagram illustrating control signals for the gates of the two-channel switching circuit shown in FIG. In the figure, NW is a time division network, 11 to 9 are communication paths, ICT is an incoming trunk, 0GTFi outgoing trunk,
CNTt;j: connection trunk, PAT and PST' are switching trunks, TWT is a mixed trunk, OBD is a switching board, KBD is a supervisory board, MX is a mixed circuit, EX is a two-way switching circuit, G to G1゜is a gate, DA is a digital-to-analog converter, AD is an analog-to-digital converter, A
AD is an analog adder, A・A/◆ to m, AD* is an adder, B・R is a para 2 array first 1. SR is Shi7 Tregis Ku, DHW is Lower Shihighway, UHW is Upper Shihighway% al s bl・01, dl, al, bl, cl
and d is the digital signal for each channel, at s bt
, cl and d! is an analog signal for each channel, &a,
ba%C1 and dl are mixed analog signals, a4, b
4, Ca and d4 are mixed digital signals, g. to g@ are control signals, ctk is a clock signal, F is a frame, and t to t8 are time points. Figure 1 Child Figure 2

Claims (1)

【特許請求の範囲】[Claims] 時分割ネットワークを有する電子交換機において、該時
分割ネットワークの複数の通話路がら通話路毎ディジタ
ル信号を抽出するゲートと、般ゲートの出力する複数の
通話路毎ディジタル信号をそれぞれ通話路毎アナログ信
号に変換するディジタルアナログ変換器と、該ディジタ
ルアナログ変換器の出力する複数の通話路毎アナ四グ信
号からそれぞれ1通話路分宛除いて加算した混合アナロ
グ信号を複数組生成するアナ四グ加算器と、該アナログ
加算器の出力する複数の混合アナ四グ信号をそれぞれ混
合ディジタル信号に変換するアナログディジタル変換器
と、該アナログディジタル変換器の出力する複数の混合
ディジタル信号を前記時分割ネットワークの各混合ディ
ジタル信号に含まれぬ通話路に送出するゲートとから構
成される混合回路と、前記時分割ネットワークの前記複
数の通話路から2通話路のディジタを信号を抽出し1通
話毎に蓄積するシフトレジスタと、該シフトレジスタの
出力する前記2通話路のディジタル信号を前記時分割ネ
ットワークの前記2通話路に交換して送出するゲートと
から構成される2通話路交換回路とを具備する仁とを4
111とする交換台トランク方式。
In an electronic exchange having a time-division network, there is a gate that extracts a digital signal for each communication path from a plurality of communication paths in the time-division network, and a general gate that converts the plurality of digital signals for each communication path into analog signals for each communication path. a digital-to-analog converter for converting; and an analog-to-analog adder for generating a plurality of sets of mixed analog signals obtained by removing signals for one communication path from each of the plurality of analog-to-analog signals output by the digital-to-analog converter and adding them together. , an analog-to-digital converter that converts a plurality of mixed analog-to-digital signals output from the analog adder into mixed digital signals, and a plurality of mixed digital signals output from the analog-to-digital converter to each mixer of the time division network. a mixing circuit consisting of a gate that sends out to a communication path not included in the digital signal; and a shift register that extracts digital signals of two communication paths from the plurality of communication paths of the time division network and accumulates them for each call. and a gate for exchanging and transmitting the digital signals of the two communication paths output from the shift register to the two communication paths of the time division network.
Switchboard trunk system with 111.
JP15100281A 1981-09-24 1981-09-24 Trunk system for switchboard Granted JPS5851663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15100281A JPS5851663A (en) 1981-09-24 1981-09-24 Trunk system for switchboard

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15100281A JPS5851663A (en) 1981-09-24 1981-09-24 Trunk system for switchboard

Publications (2)

Publication Number Publication Date
JPS5851663A true JPS5851663A (en) 1983-03-26
JPS6230543B2 JPS6230543B2 (en) 1987-07-02

Family

ID=15509134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15100281A Granted JPS5851663A (en) 1981-09-24 1981-09-24 Trunk system for switchboard

Country Status (1)

Country Link
JP (1) JPS5851663A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4959576A (en) * 1987-11-25 1990-09-25 Nippondenso Co., Ltd. Automotive alternator
US7348700B2 (en) 2004-10-19 2008-03-25 Denso Corporation Automotive alternator having water shield for protecting brushes from water damage

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63201434U (en) * 1987-06-18 1988-12-26

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4959576A (en) * 1987-11-25 1990-09-25 Nippondenso Co., Ltd. Automotive alternator
US7348700B2 (en) 2004-10-19 2008-03-25 Denso Corporation Automotive alternator having water shield for protecting brushes from water damage

Also Published As

Publication number Publication date
JPS6230543B2 (en) 1987-07-02

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