JPS5850175A - Dc arc welder - Google Patents

Abstract

PURPOSE:To obtain a firing pulse generating circuit with simple and stable operation by obtaining synchronizing pulses from one of three phase half wave circuits which are double star-connected, and creating the synchronizing pulses for the purpose of the other three phase half wave circuit from said synchronizing pulses. CONSTITUTION:Three phase AC is rectified by a control circuit with a double star interphase reactor constituted of three phase half wave control rectifier circuits 14a and 14b respectively including the output windings 141a, 141b of a main transformer 14 and an interphase reactor 5. In a DC arc welder which obtains DC electric power in the above-mentioned manner, the voltage of the in- phase as that of the winding 141a is generated in a transformer 10 for control. A locking pulse generating circuit 11 generates the pulses locked with the respective phase voltages of the transformer 10 and an intermediate pulse generating circuit 13 to be inputted with the outputs of the circuit 11 generate pulses at the intermediate phases of the respective input pulses. The circuits 14a, 14b are controlled by the phase control circuits 12a, 12b which are reset respectively by the outputs of the circuits 11, 13.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a DC arc welding machine in which the output of a three-phase AC power source is adjusted by a rectifying element with a control pole.

DC arc welding machines generally use a method in which the output of three-phase alternating current is adjusted using a control element with a control pole, such as a thyristor, for the purpose of reducing ripple and balancing the load on the power supply circuit. In particular, due to its low ripple rate and high efficiency, a double star-shaped interphase reactor is constructed of a transformer with two sets of star-connected windings on the secondary side of three-phase alternating current, a controlled rectifier, and an interphase reactor. Controlled rectifier circuits are often used. Figure 1 shows a typical example of this method.
2a, 3a, 4a, 2b, 3b, 4b are half-wave rectifier thyristors connected to the respective three-phase circuits, 5 is the transformer 1
An interphase reactor connected between the neutral points of the output windings of 6
is a welding load consisting of a welding torch, a welding arc, an object to be welded, etc. connected between output terminals 7 and 8. In such a circuit, it is necessary to fire 3b and 4b in this order. Generally, in order to simplify the circuit, one set of ignition pulse generation circuits is installed in each of the three-phase half-waves of u, v, w and u', v', w'. The moment when the voltage became higher than that of the two phases was detected, and this was used as a synchronization signal to reset the firing pulse generation circuit, thereby generating exactly 11[' firing pulses between 1200 phases. However, in these conventionally proposed ignition pulse generation circuits, it is necessary to match the direction of phase rotation of the power supply with the direction of phase rotation of the ignition pulse generation circuit, or the direction of phase rotation is made unrelated. However, the circuits were complicated, and each had its advantages and disadvantages.

FIG. 2 shows an example of an ignition pulse generation circuit in such a conventional device, and the thyristors 2a to 4a and 2b of the control rectifier circuit with two tomb-type interphase reactors shown in FIG.
This controls the ignition phase of ~4b. In the figure,
9- and 9b are transformers 1 which are star-connected in opposite phases to each other.
The auxiliary winding of and C1b is a capacitor, TR1a
and TR1b is an NPN transistor, PUL
a~PU3a and PUlb~PU3b are N-gate thyristors, UJTla and 1JJTlb are unijunction transistors, PTla and Fr1b
is a pulse transformer, and E is a DC power supply. No. 2
In the figure, the circuit of the unijunction transistor UJTla related to the auxiliary winding m9a and the circuit of the unijunction transistor UJT1 related to the auxiliary winding 9b are connected in exactly the same way, and their operations differ only in phase, so the symbols are used. The circuit of the unijunction transistor UJTla with 3 attached will be explained. As shown in Fig. 1 and Fig. 2, the N-gate thyristor PLJla, diode + D5 a + D6
a, D9a and a circuit consisting of resistors R5a, R3a, N-gate thyristor PU2a + diodes Dla, D2a, D8a and resistors R2a, R
□A circuit consisting of a and N-gate thyristor PU3
A, diodes D3a, D4a, D7a and resistors R1a, R4a all form a circuit that compares the voltage of one phase with the half-wave rectified voltage of the other two phases, and the input voltage of the transformer When a three-phase alternating current input with R, S, and T phase rotation is connected to the input terminal of the winding 1, the U phase of the output winding 1a and the auxiliary winding 9a.

The voltages induced in the phase (2) and W-phase windings undergo phase rotation in the order of u, v, and W, as shown in FIG. 3(a).

Since the gate circuit of the N-gate thyristor PUla is connected as shown in Fig. 2 as described above, the N-gate thyristor PUla is in block state,
A U-phase voltage is applied to both ends of the N-gate thyristor PU1a, but when the U-phase voltage becomes more crystalline than the other two phase voltages, the N-gate thyristor PU1a becomes conductive. The other N-gate thyristors PU2a and PU3a repeat the same cutoff and conduction state, so the N-gate thyristors PUIa, PLJ2a and PU3a
A current as shown in FIG. 3(b) will flow through. This relationship remains the same even if the phase rotation of the voltage supplied to the input terminals is reversed. 'During the period when current is flowing, capacitor CNa is short-circuited and the charge is discharged. N-gate thyristor P [Jl a to po3
a is in a conductive state and transistor 1
When 0' is in the cutoff state, the capacitor C1a is charged at a rate determined by the voltage of the DC power supply E, the value of the variable resistor VR1, and the capacitance of the capacitor C1a, and the charging voltage is equal to the peak point voltage of the junction transistor tJJT1a. When the voltage reaches tg, the charge in the capacitor C1a is discharged to the pulse transformer PTla through the unijunction transistor UJTla, thereby causing the thyristor 2a to be discharged.

3a and 4a will be fired sequentially. As described above, according to the circuit shown in FIG. 2, even if there is a waveform distortion or a change in phase rotation in the input voltage, the ignition signal can be generated at a preset phase without being affected in any way.

However, in the conventional device shown in Fig. 2 above, two sets of circuits are required to synchronize the phase of the power supply voltage in order to obtain the ignition signal, and furthermore, these two sets of synchronizing circuits do not have completely identical characteristics. However, the equipment must be complex and expensive.

Furthermore, if there is even a slight difference in characteristics between the two, the synchronization point will shift between the two, and as a result, u, v,
A difference in phase control angle will occur between the phase of w and the phases of u', v', and w', and not only will the output contain many ripples, but the load sharing will be different from the firing phase. This results in a decrease in output and burnout due to overload of the main thyristor.

The present invention obtains a synchronizing pulse for an ignition pulse generation circuit from one of two three-phase half-wave circuits connected in a double star shape, and obtains a synchronizing pulse for an ignition pulse generating circuit from the other three-phase half-wave circuit from this synchronizing P/L/X. By creating synchronizing pulses for the three-phase half-wave circuit of be.

FIG. 4 is a block diagram showing an embodiment of the DC earth welding machine of the present invention. In the figure, reference numeral 10 denotes a control transformer, which is configured to generate a voltage in phase with one output winding 141 of the main transformer 14. An auxiliary winding may be provided in
Also, a small auxiliary transformer may be used. Reference numeral 11 designates a synchronous pulse generating circuit which obtains voltage from the control transformer 10 and generates pulses synchronized with each phase of the input voltage, and is similar to the circuit consisting of the transistor TR1a in FIG. 2. Reference numeral 12a designates a first phase control circuit, which can be, for example, a circuit using a unijunction transistor shown in FIG. 2, and generates a synchronization pulse generation firing pulse. Reference numeral 13 denotes an intermediate t4) response generation circuit, which receives the output of the synchronous pulse generation circuit 11 and generates a pulse at an intermediate phase of each human-powered pulse. 12b has the same structure as the first phase control circuit 12a. 14a is a second phase control circuit whose output pulses are synchronized with the output pulses of the intermediate pulse generation circuit 13. 14a is a first output winding 141a of the main transformer 14 and a first phase control circuit. 12a
The main thyristor 142. is controlled by the output of the main thyristor 142. -144
3, a first three-phase half-wave control rectifier circuit consisting of 14
b is the second output winding 141b of the main transformer controlled by the second phase control circuit 12b and the thyristor 1
42b to 144b, 6> is a second three-phase half-wave controlled rectifier circuit. s5 is the first output winding 141 and the second output winding 141
This is an interphase reactor connected between the neutral points of a and 141b. These synchronizing pulse generating circuits 11 and
The phase control circuit 12a is similar to one of the conventional devices shown in FIG. Further, the two output windings 141a and 141b of the main transformer 14, together with the interphase reactor 5, constitute a controlled rectifier circuit with a double star-shaped interphase reactor, as in FIG.

FIG. 5 is a connection diagram showing a specific example of the block diagram in FIG.
It consists of N-gate thyristors PUI to PU3 and a transistor TRI, and operates in the same way as in FIG. 2. Also the first
and second phase control circuits 12a and 12b are also firing phase control circuits similar to those in FIG.
Variable resistor V that determines the charging time constant of 1a and clb
A constant current circuit consisting of a variable resistor VR2 and transistors TR2a and TR2b is used in place of R1a and 1b. The intermediate pulse generation circuit 13 is
Transistor "rR1" which is the output of the synchronous pulse generation circuit
capacitor C2 and resistor RIO connected to the collector of
A constant current integration circuit 131 consisting of ~R12 and a transistor TR3; a peak value hold circuit 132 that holds the maximum value of the terminal voltage of a capacitor C2 consisting of a diode DR13, a capacitor C3, and an operational amplifier OPI;
Resistors R13-Rl6 . which receive the output of the peak value hold circuit 132 and the output of the integration circuit 131 as inputs; Operational amplifier OP2, diode DR14 and transistor ″n
A comparison circuit 133 consisting of t4, a capacitor C4 for differentiating the output of the comparison circuit 133, a resistor R17, and a diode D.
Differential circuit 1 consisting of R15 and transistors '■, 5
It is composed of 34. Pulse transformers Fr1a and Fr1b of phase control circuits 12a and 12b
The output of is supplied to the gates and circuits of main thyristors 142a-144a and 142b-144b of FIG. 4 to fire them.

The operation of the embodiment shown in FIGS. 4 and 5 will be explained with reference to the waveform diagram in FIG. 6. FIG. 6 shows the state of voltage change at each part of the connection diagram in FIG. First three-phase half-wave rectifier circuit 14
The voltage at the terminal B point of the capacitor C1a of the phase control circuit i2a for a, (3) is the pulse transformer Fr1 of the same circuit.
The voltage at terminal C of a, (4) is the constant current integration circuit 131
shows the changes in the voltage Vd at point D, which is the output voltage of , the voltage Ve at point E of the peak value hold circuit, and the voltage Vf at point F, which is obtained by dividing the output voltage of the operational amplifier OPI by resistors R1-3 and R14, (5) is comparison circuit 1
The G point Q voltage which is the output of 33, (6) is the differentiator circuit 134
(7) is the voltage at point H of the phase control circuit 12b.As explained in FIG. Pulse 3 is generated at a phase higher than phase 2 as shown in FIG. 6(1). This pulse occurs every 120° in exact synchronization with the phase of the input voltage. Due to this synchronization pulse number, the transistor TR1 becomes conductive and the phase control circuit 12a
The capacitor C1IL of the intermediate pulse generating circuit 13 and the capacitor C2 of the intermediate pulse generating circuit 13 are short-circuited, and the charged charge is made zero. When the synchronous pulse 2 ends, the capacitor CIL is charged with a constant current determined by the variable resistor 2, as shown in Figure 6 (2), and the unijunction transistor [J
The unijunction transistor UJTla and the pulse transformer Fr are activated at the phase when the peak point voltage of JTla is reached.
1a to generate the pulse shown in FIG. 6(3) in the pulse transformer Frla, and the main thyristor 1
42a to 144- are made conductive. On the other hand, capacitor C2 is also charged with a constant current determined by resistors RIO and R11 as shown at Vd in FIG. 6(4). This charging voltage is also applied to the transistor TRI of the synchronous pulse generation circuit 11.
It is reset each time it becomes conductive. The terminal voltage of capacitor C2 is supplied to capacitor C3 of peak value hold circuit 132 via diode DR13. Capacitor C3
The terminal voltage of is increased by the operational amplifier OP1 to its maximum value V
e is retained. The operational amplifier OPI @ output is voltage-divided by resistors R13 and R14 to become Vf, which is supplied to one input of the comparator circuit 133. Comparison circuit 13
The other input of 3 is the terminal voltage map d of capacitor C2.
Since ζ- is supplied, ζ- synchronization signal ■After this, integration progresses and when the voltage Vd at point D exceeds the voltage Vf at point F, the output of operational amplifier op2, which had been a negative output until then, becomes positive. . operational amplifier op2
If the amplification factor is sufficiently large, its output will be the voltage Vd at point D.
When exceeds the voltage Vf at point F, it becomes a constant positive voltage, and the next synchronizing signal Va causes the capacitor C2 to
When the voltage is reset, a rectangular wave AC output becomes a negative constant voltage output. This AC' output becomes a rectangular waveform pulse Vg by diode DR14 and transistor TR4. This output pulse Vg is supplied to the input capacitor 4JC4V of the differentiating circuit 134 and is differentiated to increase the output. The positive output waiting for this differential 4 output makes the transistor TR5 conductive and the second
The capacitor C1b of the second phase control circuit 12b for the three-phase half-wave control rectifier circuit 14b is reset. Here, resistors R13 and R
If the resistance value with 14 is made equal, the divided voltage Vf
is the output Ve of the peak value hold circuit 132.
Therefore, the point in time when the output of the comparator circuit 133 is inverted to negative is exactly in the middle phase of each pulse of the synchronizing pulse (3).

Therefore, the positive voltage pulse at V, which is the differential value of the output Vg which is inverted by the transistor TR5, has a phase exactly in the middle of each synchronizing pulse (3).

As mentioned above, the synchronizing pulses 3 are pulses at intervals of 1 to 20' that are correctly synchronized with the phase of the input three-phase AC voltage, so the output pulses of the intermediate pulse generation circuit 13 are generated at the intermediate phase of these synchronizing pulses. Therefore, it has a phase difference of 60° more accurately than the power supply voltage phase. Therefore, if this pulse is used as a reset pulse for the phase control circuit 12b that controls each thyristor of the second three-phase half-wave control rectifier circuit 14b connected in a double star shape, the second three-phase half-wave control rectifier circuit can also be used as a power source. The firing phase will be controlled by a pulse that exactly matches the voltage. Moreover, the reset pulse for determining the firing phase of the second three-phase half-wave controlled rectifier circuit corresponds to the synchronous reset pulse for the first three-phase half-wave controlled rectifier circuit, which is determined according to the phase of the power supply voltage at the input terminal. , and its reset phase is simply the resistor R constituting the voltage divider.
Since it is determined only by the ratio of the resistance values of R13 and R14, it is completely unrelated to the frequency of the power supply.

The intermediate pulse generation circuit for the second three-phase half-wave controlled rectifier circuit is not limited to the configuration shown in FIG. Any device that generates a pulse at an intermediate phase of each human-powered pulse by inputting the output of a synchronizing pulse generating circuit for the synchronous pulse generating circuit may be used.

FIG. 7 is a block diagram showing another example of this intermediate pulse generating port. In the figure, Va is a synchronization pulse generated every 120° in synchronization with the power supply voltage phase, and is, for example, the voltage at point A of the synchronization pulse generation circuit 11 in the example of FIG. 5, that is, the terminal voltage of the resistor R8. 15 is a phase comparator which, when there is a phase difference between signals input to two input terminals, outputs a voltage corresponding to the phase difference; for example, MC14046B commercially available from Motorola, USA.
Integrated circuits called shapes are available. A low-pass filter 16 smoothes the output of the phase comparator 15, and removes a sharply changing portion of the output of the phase comparator 15.

17 is a voltage controlled oscillator which generates pulses at a frequency corresponding to the input voltage. Reference numeral 18 denotes a dividing period which gradually reduces the pulse output of the voltage controlled oscillator 17 until its center frequency is approximately the frequency of the synchronizing pulse (3).

19 is a falling pulse generator that generates a pulse when the input signal falls. The output Vp of the period divider 18 is also fed back to the other input terminal B of the phase comparator 15.

FIG. 8 shows the relationship between input and output pulses of the intermediate pulse generating circuit of FIG. 7. The operation of the intermediate pulse generation circuit shown in FIG. 7 will be explained with reference to FIG. Input pulse ■2
is the output Vp of point P divided by the divider 18
and is compared in the phase comparator 15. Phase comparator 1
5 is V? after a pulse is input to the A terminal until the input signal to the B terminal disappears. A constant voltage υr is output during the period. This output \ is inputted to a voltage controlled oscillator 17 via a low-pass filter 16, and generates a pulse signal of a predetermined frequency s only while the input signal Vr is present. The voltage controlled oscillator 5 before the output of the generator 17 is divided by the frequency divider 18 to the frequency of the input pulse 4 (normally 150 Hz or xso) tz) and becomes the output Vp. Since this output Vp is fed back to the phase comparator 15, the oscillation frequency of the voltage controlled oscillator 17 and the division ratio of the divider 18 while the output Vr of the phase comparator 15 is present.

If they are matched, the signal Va and the signal Vp will have the same frequency and their rising edges will match. -Furthermore, the frequency of the oscillation pulse of the voltage controlled oscillator 17 should be sufficiently compared to the frequency of the input pulse 3. If you set it high,
The output Vp obtained by dividing the frequency by the frequency divider 18 and returning it to the original frequency can be a rectangular waveform pulse that falls exactly between the pulses of the input signal λ.

If such a rectangular waveform output from the divider 18 is passed through a falling pulse oscillator 19 and the falling point is captured and converted into a pulse, as shown in FIG. 1 that occurs with a 60° delay
A pulse train with 20' intervals can be obtained. As described above, according to the present invention, the circuit that obtains the synchronization signal from the power supply voltage phase determines the synchronization signal for the double star interphase reactor flow circuit based on the synchronization signal for the former control rectifier circuit. Not only is the circuit extremely simple, but there is no need to switch circuit constants between regions where the power frequency is 5QHz and 59Hz, and a device that completely automatically follows the power frequency can be obtained. Furthermore, unlike conventional devices using two sets of synchronous pulse generating circuits, the output currents of the three-phase half-wave control rectifier circuits do not become biased due to variations in the characteristics of each component.

[Brief explanation of drawings]

Figure 1 shows a control rectifier circuit with a double star-shaped interphase reactor. Fig. 2 is a connection diagram showing an example of the ignition pulse generation circuit of a conventional device, Fig. 3 is an explanatory diagram showing the operation of the device in Fig. 2, and Fig. 4 is an arc welding diagram of the present invention. 5 is a connection diagram showing a specific example of the embodiment of FIG. 4, and FIG. 6 is a voltage waveform of each part of the embodiment of FIGS. 4 and 5. FIG. 7 is a block diagram showing another embodiment of the intermediate pulse generation circuit, and FIG. 8 is an explanatory diagram for explaining the operation of the embodiment of FIG. 1...Transformer, 2a, 3a, 4a, 2b, 3b, 4b
1142a1143a1144a, 142b, 14
3b, 144b+ ... Sairisk, 9a, 9b・
... Auxiliary winding, 10.14 ... Control transformer, 11.
... Synchronous pulse generation circuit 3.12a, 12b-Z
Phase control circuit, 13... intermediate pulse generation circuit, 131
...Integrator circuit, 132...Peak value hold circuit,
133... Comparison circuit, 134... Differentiation circuit, 14a
, 14b... Three-phase half-wave control rectifier circuit, 15...
・Phase comparison circuit, 16...Low pass filter, 17・
...Voltage controlled oscillator, 18... Frequency divider, 19... Falling pulse generator. Agent: Hiroshi Nakai, Patent Attorney
~ Procedural Amendment (Spontaneous) October 20, 1981 Patent Application No. 150019/1982 Title of Invention Direct Current γ-Welding Example 3-1'lli +I. Relationship with each 1 yen item Patent applicant address 2-1-11 Tanyou, Yodogawa-ku, Osaka 532
Name Title (026) Osaka Transformer Co., Ltd. Representative Director and President Keiji Kobayashi 4, Agent fl Address 1-1 Yodogawa-ku, Osaka 532 (J11)
2-1-11 Osaka Transformer Co., Ltd. 6 Song + 1: Target of 1 Figure and 1T hli
Contents of the city As shown in the attached figure 1] Kame 5P-Purification (
No changes to the content) 1 Voluntary amendment to the proceedings) May 1980 126 1. Indication of the case 1982 Patent Application No. 150019 2. Name of the invention DC arc welding machine 3. Person making the amendment Relationship with the case Special Person: Osaka Transformer Co., Ltd. 4, 2-1-11 Tayo, Yodoyo-ku, Osaka (026) Address: 2-1-1 Tayo, Yodoyo-ku, Osaka 532
No. 1 [Contact phone number (06) 301-1212] 5
, date of amendment order 6, subject of amendment ``Claims'' column of specification, ``Detailed description of the invention'' column, drawings 5 and 7, contents of amendment 1, specification - Correct as follows. (1) Amend the scope of claims as shown in the attached sheet. (2) Correct rR2aJ on page 6, line 3 to rRla J. (3) Correct rRlaJ on page 6, line 5 to rR2aJ. (4) Correct "output winding 141a and the first" in lines 6 to 7 of page 10 to "output winding 141a and the first" (5) "In lines 10 to 12 of page 10" 14b is...
..." is corrected to "14b consists of the second output winding 141b of the main transformer and thyristors 142b to 144b controlled by the second phase control circuit 12b". (6) On page 10, line 15, amend it to ``do these''here.'' (7) [Output winding 141a and...] on page 10, line 18
・In Figure 1], the output winding 141a and the iris 14
2a to 144a and thyristor 142b to 1
44b is corrected to ``in Figure 1''. (8) FD1 rDRl”-DR12J on page 11, line 4
~D12”. (9) Change rDR13J on page 11, line 17 to “rD13”
correct. (10) Change [R13 to R16] on page 12, line 1 to “R13
~R15”. (11) Correct rDR14J in line 2 of page 12 to rD14J. (12) On page 12, line 4, "Resistance! 1R17, diode DR15J [Resistor R16, R17, diode D1
5] is corrected. (13) On page 12, line 14, "J in figure (a) is corrected to 'J in figure (1).' (14) On page 13, line 16, correct "J when finished" to "when it becomes zero." (15) On page 14, line 16, change [after synchronization signal Va] to “
Corrected to "immediately after generation of synchronization signal 'Ja." (1B) "DR14" on page 15, line 4] is corrected to rD14J. , (17) Change [matched] to “synchronized” on page 16, line 9.
Correct. (18) Correct [=constant voltage Ur J in line 18, line 12, to ``constant voltage VrJ.'' (19) Correct ``human power pulse Va J, [input pulse VC situation, personal remuneration]' in line 18, line 16. Corrected. 2. Figure 5 of the drawings is corrected as shown in the attached sheet. 2. Scope of Claim 1. DC arc welding machine that obtains DC power by rectifying a three-phase AC power source by a control element with a control pole. , a synchronous pulse generation circuit obtains pulses synchronized with each phase voltage from one of the three-phase half-waves connected in the double star shape, and the output of the synchronous pulse generation circuit is input, and a pulse is generated at the intermediate phase of each human power pulse. the first three-phase half-wave phase control circuit that is reset by the output of the synchronous pulse generation circuit; and the second three-phase half-wave phase control circuit that is reset by the output of the intermediate pulse generation circuit. 2. The intermediate pulse generating circuit includes an integrating circuit that uses the output pulse of the synchronous pulse generating circuit as a reset signal to integrate the output of the constant current source, and a half-wave phase control circuit. a peak value hold circuit that holds the output peak value of the circuit; and an output Vd of the integration circuit.
and the output Ve of the peak value hold circuit, and
Claim 1 comprising a comparator that outputs an output when d≧坏Ve, and a differentiation circuit that differentiates the output of the comparator and generates a pulse only at the rising edge of the input voltage. DC arc welding machine. 3. The intermediate pulse generating circuit includes a phase comparator which receives the output pulse of the synchronizing pulse generating circuit as one input, a voltage controlled oscillator which receives the output of the phase comparator as its input, and a voltage controlled oscillator which receives the output of the voltage controlled oscillator as its input. A frequency divider that divides the frequency to a frequency that matches the output frequency of the synchronization pulse generation circuit, and a falling pulse generator that receives the output of the frequency division and generates a pulse at the falling edge of the input signal. The DC arc welding machine according to claim 1, further comprising a circuit that feeds back the output of the frequency divider to the other input of the phase comparator.

Claims (1)

[Claims] 1. A DC arc welding machine that obtains DC power by rectifying a three-phase AC power source by a control rectifier circuit with a double star-shaped interphase reactor configured with a control element with a control pole, wherein the double star A synchronous pulse generation circuit that obtains pulses synchronized with each phase voltage from one three-phase half-wave connected in the form of a wire, and an intermediate circuit that uses the output of the synchronous pulse generation circuit as input and generates 4 pulses at the intermediate phase of each human-powered pulse. a pulse generation circuit, the first three-phase half-wave phase control circuit that is reset by the output of the synchronous pulse generation circuit, and a second three-phase half-wave phase control circuit that is reset by the output of the intermediate pulse generation circuit. A DC arc welding machine equipped with. 2. The intermediate pulse generation circuit uses the output pulse of the synchronization t4) response generation circuit as a reset signal, and has a peak value hole Ji that holds the output peak value of the constant circuit, and a peak value hole Ji that differentiates the output of the comparator and generates a rising edge of the input signal. The DC arc welding machine according to claim 1, comprising a differential circuit that generates a pulse only at times. 3. The intermediate pulse generating circuit includes a phase comparator which receives the output pulse of the synchronizing pulse generating circuit as one input, a voltage controlled oscillator which receives the output of the phase comparator as its input, and a voltage controlled oscillator which receives the output of the voltage controlled oscillator as its input. The branching unit includes a branching unit that branches to a frequency that matches the output frequency of the synchronous pulse generation circuit, and a falling pulse generator that receives the output of the divided period as an input and generates a pulse at the falling edge of the input signal. 2. The DC arc welding machine according to claim 1, further comprising a circuit that feeds back the output of the phase comparator to the other input of the phase comparator.