JPS5848114U - FM demodulation circuit - Google Patents

FM demodulation circuit

Info

Publication number
JPS5848114U
JPS5848114U JP14142181U JP14142181U JPS5848114U JP S5848114 U JPS5848114 U JP S5848114U JP 14142181 U JP14142181 U JP 14142181U JP 14142181 U JP14142181 U JP 14142181U JP S5848114 U JPS5848114 U JP S5848114U
Authority
JP
Japan
Prior art keywords
demodulation circuit
circuit
mono multivibrator
abstract
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14142181U
Other languages
Japanese (ja)
Inventor
雅文 田中
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP14142181U priority Critical patent/JPS5848114U/en
Publication of JPS5848114U publication Critical patent/JPS5848114U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のパルスカウント方式復調器のブロック図
、第２図は本考案の一実施例のブロック図である。１は
ＲＦ入力端子、２はリミッタアンプ、３はモノマルチバ
イブレータ、４はローパスフィルタ、５は出力端子、６
はソースフォロア回°路である。FIG. 1 is a block diagram of a conventional pulse count type demodulator, and FIG. 2 is a block diagram of an embodiment of the present invention. 1 is an RF input terminal, 2 is a limiter amplifier, 3 is a mono multivibrator, 4 is a low-pass filter, 5 is an output terminal, 6
is a source follower circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ＦＭ変調波でモノマルチバイブレータをトリガし、その
出力を積分して復調する回路において、上記モノマルチ
バイブレークと積分器（ローパスフィルタ）との間にエ
ミッタフォロアまたはソースフォロア回路を挿入したこ
とを特徴とするＦＭ復調回路。。A circuit that triggers a mono multivibrator with an FM modulated wave, integrates and demodulates its output, and is characterized in that an emitter follower or source follower circuit is inserted between the mono multivibrator and the integrator (low-pass filter). FM demodulation circuit. .
JP14142181U 1981-09-25 1981-09-25 FM demodulation circuit Pending JPS5848114U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14142181U JPS5848114U (en) 1981-09-25 1981-09-25 FM demodulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14142181U JPS5848114U (en) 1981-09-25 1981-09-25 FM demodulation circuit

Publications (1)

Publication Number Publication Date
JPS5848114U true JPS5848114U (en) 1983-03-31

Family

ID=29934520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14142181U Pending JPS5848114U (en) 1981-09-25 1981-09-25 FM demodulation circuit

Country Status (1)

Country Link
JP (1) JPS5848114U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60162620A (en) * 1984-02-06 1985-08-24 Inoue Japax Res Inc Molding apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327469U (en) * 1976-08-14 1978-03-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327469U (en) * 1976-08-14 1978-03-08

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60162620A (en) * 1984-02-06 1985-08-24 Inoue Japax Res Inc Molding apparatus
JPH0149092B2 (en) * 1984-02-06 1989-10-23 Inoue Japax Res

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