JPS5846476A - Detecting circuit for black area peak - Google Patents

Abstract

PURPOSE:To prevent an unncessary part from being detected as a peak according to unnevenness by eliminating the trouble that plural peaks are detected as to one horizontal segment when detecting the black area peak from a binary pattern. CONSTITUTION:A drum scanner 2 is controlled by an information processor 1 through a signal line 100 to scan drawing to be read which is stuck to a drum, thereby sending multilevel data on its thickness value to a preprocessing circuit 3 through a signal line 200. The preprocessing circuit 3 is controlled by the information processor 1 through the signal line 100 as well to code said multilevel data into a binary signal by using a threshold value supplied previously from the information processor 1 and stores the binary signal in a binary pattern storage circuit 4 through a signal line 300; after one drawing is stored, a detection start signal is sent to a black area peak detecting circuit 5 through a signal line 400.

Description

DETAILED DESCRIPTION OF THE INVENTION This invention is a device for recognizing drawings in which figures, symbols, etc. are described, and in particular, separates and recognizes figures and symbols from a binary pattern obtained by scanning a drawing with a scanner or the like. The present invention relates to a black area vertex detection circuit for use in black area apex detection circuits.

Figures and symbols can be entered into a calculator using a tablet in conversational graphics systems that apply computer graphics.

A common method is to input the outline of a figure as a sequence of points using a coordinate input device such as a digitizer. - This method allows you to proceed with the work in an interactive manner, making it easy to create input figures.・Able to edit.

Although there are advantages such as being able to input shapes while thinking freely, it is difficult to input complex drawings such as map 1 circuit diagrams.
It is not efficient for inputting a large number of drawings.

Therefore, for such applications, with the recent advances in scanner technology, image processing technology, and recognition processing technology, multivalued patterns and binary patterns obtained by scanning drawings with scanners, etc. Research and development into methods for recognizing desired figures and symbols from patterns has progressed and is now being put into practical use.

Generally used drawings, such as maps and circuit diagrams, contain a mixture of figures that differ not only in physical dimensions but also in different recognition methods, such as one figure and eight characters. In order to perform the recognition process efficiently, it is necessary to separate these different things before the recognition process.

Traditionally, when figures and symbols were mixed like this, the relative relationship between figures and symbols was defined, such as arranging them and writing the symbol on the right side of the figure, or one figure could be written freely, but the symbol was fixed. The specifications for creating drawings were designed to make it easier to separate figures and symbols by imposing restrictions such as only being able to write in digits.

Setting such restrictions is inflexible from the perspective of drawing creators, and therefore can only be used in a limited number of practical ways. Free IC book; 2 of drawings written in free VC without any restrictions, where attempts are made to separate 6b figures and symbols.
In order to separate black areas corresponding to appropriate figures from multiple turns, it is necessary to scan the binary pattern and detect the black areas. Since vertices are being determined, for example, for line segments that are long in the rask direction, such as horizontal line segments, unevenness in a binary pattern is determined as the apex of the completely black area, and therefore, a number of vertices are detected. Since the entire screen must be sequentially scanned one nine at a time, there is a drawback that an I river is required during scanning.

This invention was made in consideration of the above-mentioned circumstances, and the purpose of this invention is to detect a number of vertices for one horizontal line segment when detecting the vertices of a black area from a binary value obtained by scanning a drawing. An object of the present invention is to provide a black area apex detection circuit that eliminates the inconvenience of black area apex detection.

Another object of the present invention is to provide a black area apex detection circuit that scans the binary pattern at a higher speed.

According to the present invention, in order to separate figures and symbols from a binary pattern obtained by scanning a drawing, etc. a scanning circuit that scans and extracts the binary pattern in consecutive N line units over the entire value pattern based on the line extraction information described later; and N circuits that temporarily store the extracted binary pattern of the N lines. a line memory, a type generation circuit that sequentially generates a type pattern consisting of N values at each point in the rask direction of the N line memories, and a type in the line generated by the type generation circuit. [by examining the generation sequence of the pattern], it is determined whether or not the black area apex exists in the N line internal pressure, and if it exists, a vertex detection signal is generated, and it is determined which N line should be selected next from the type pattern series. By including a determination circuit that determines whether to retrieve and store the line in the line memory and generates line retrieval information, horizontal line segments existing in a binary pattern are not affected by the presence or absence of unevenness and are unnecessary. A black area vertex detection circuit that can avoid detecting black area vertices is obtained.

The black area apex detection circuit of the present invention can avoid detecting unnecessary vertices even for horizontal line segments with unevenness, so it is possible to avoid unnecessary processing by including it in the following processing such as figure separation processing. Therefore, the crystal processing speed can be increased.

The black area detection circuit of the present invention also determines the next N lines to be scanned based on the states of consecutive N lines.
1a1 to avoid unnecessary line scanning
Therefore, processing speed can be increased.The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram showing an example of a binary pattern for a portion of a map, and the buttons in the diagram include a mixture of large and small figures such as contour lines, schools, and mountain peaks.

FIG. 2 is a diagram illustrating a general table method for detecting black area vertices. In FIG. 2, a black circle-e-tl dot is shown. For the sake of simplicity, I have listed the fancy items in the explanation, but
Other black points and white points are omitted from the drawing. The general method for detecting black-dependent vertices is to obtain all vertices by scanning the entire binary pattern as shown by the dotted lines in the figure. i-th line (hereinafter L(+
) to detect vertices on ), b L(i-1)
and L(i). First, L(+-1
) and memorize the points of change from white to black and the points of change from black to white. - In the case of the example in Figure 2.

For L(i-1)K, there is a black point in K of point a and point b, but there is no black point.When L(i) is scanned in the same way, there is a change from white to black at point a. , it can be seen that there is a change from black to white at point b.Next, in the scan of L(i-1), a
Check whether a black point exists between point and point b. In this time, there is no black point between points a and b on L(i-1), so the black point between point a and point 50 on L(i) is determined as a vertex - however, L(i -1) If there is even one black point between point a and point A, then point a of L(i)
The black dots shown in the dots indicate that they are part of a continuous black area from L(i-1), and are different from the vertices.

Next, a method for detecting black area vertices according to the present invention will be explained.

FIG. 3 is a diagram illustrating type patterns appearing in three consecutive lines. In the following explanation, three consecutive lines (that is, N = 3) will be used as an example. Type pattern ('l'Q~T
7) exists. TQ is a pattern that indicates the absence of a black point, TI and T3 are patterns that indicate the possibility of the existence of a black area, and T4゜'v6 is a pattern that indicates the possibility of the existence of the lower end point of the black area.・T7 is a pattern that indicates the existence of a black point. A pattern in which the regions are connected in the vertical direction across the three fins is shown. Type pattern 1'0 to T7 are three consecutive lines L(i-1).

The values at position j from the left of L(i) and L(i+1) are respectively V(ゑ−”ej)sv(tsJLv(t+x,j)
Then, it is defined by (Formula 1).

T(i,j)=v(i-Lj)×4+v(i-DX2+
v(i+IW) (Formula 1) However, the value of V is at the time of a sunspot! , when the white point is 0 (formula l) is the third
It is clear that these correspond to the eight type patterns TO to T7 shown in the figure.

FIGS. 4(a) and 4(b) are diagrams for explaining a method for detecting a black area vertex and a method for determining the next scanning line from a type pattern series generated using (Equation 1). . FIG. 4(a) shows an example where there is only one black area apex, and FIG. 4(b) shows an example where there are two black area vertices.

As mentioned in the explanation of FIG. 3, the type patterns that indicate the possibility of the existence of black area vertices are T1 and T3, but when scanning three consecutive lines as a unit, rl will be T3 in the next scan.
Considering that it appears as follows, it can be considered that the presence or absence of the determination ViT3 of the existence of the black area vertex becomes essential.

From the above, the type pattern series for the black area vertices can be defined as shown in (Equation 2).

TO・[1゛1・T2・(T3 ) )・To
(Formula 2) (Formula 2)
It means that I, T2゜T3 can be consecutive in any order and length, ! The parentheses mean T3 is required. Therefore, 'I'l, T2 may or may not exist.The explanation will be given below using Figure 4.

In the case of L(2) to L(4) CD scanning lines in FIG. 4(a), the type pattern series is TO・'r□,'r
□・＋１゛0・T1・・１゛3・T3・T3・TO・T
O and unreasonable, the condition of (formula 2) is TO・1"1-T3・T3
・It is detected that there is a black area vertex between 6 and 8 of J of L(3), which is filled with T3・TO. ・In FIG. 4(b), L(2 ) to L(4), the type pattern series is 'I'Q, TQ-'
l'3・T3・Tl-Tl・T3・T3・T1・T1・
TO, (Formula 2) % Formula % is filled with the part T1・TO, so 1. (3)
It is found that there are four black area vertices between j=3 and 80. As is clear from Figure 1 (1)), in the case of Jin, in the conventional method explained in Figure 2, j = 3 ~ 4jj = q
Although there was a problem when the black area vertices were found at two locations .about.8, it can be seen that this problem was improved by the method described here.

Next, an explanation will be given of speeding up the scanning by this method. As explained in the type pattern in Figure 3, TO
indicates that the black area is continuous, and 'i'7 indicates that the rope area is continuous.In other words, the type pattern that appears in the scanning line where the TO type pattern is skipped by one line is TI, T2, . This shows that a type pattern of T2C, Kaashienariko, and TI that appears in a scan line skipped by one line cannot be T4C.Using this characteristic as a rule for determining the scan line to be scanned next, Scanning speed can be increased. That is, if the type pattern series of the current scan line are all TO, or if a group including type patterns other than TO always includes TI, the next scan line can be skipped. That is, currently L(i-1).

If L(s)eL(t+t) is scanned, the original (11) is L(i) a L(s + 1) a ” (i
+ 2), but this scanning is skipped and L(i+1)L(i+2), L(i+3
) Figure 5 is a block diagram when the black area apex detection circuit according to the present invention is used in a reading device. 3 is a drum scanner, 3 is a preprocessing circuit, 4 is a binary pattern storage circuit, 5 is a black area apex detection circuit according to the present invention, 6 is a graphic separation circuit, and 7 is a graphic recognition circuit.

The drum scanner 2 is connected to the signal line 100 from the information processing device 1.
The drawing to be read, which is attached to a drum, is scanned and the once-valued, ie, multivalued data is sent to the preprocessing circuit 3VC through the signal line 200.The preprocessing circuit 3 is connected to the information processing device 1 through the signal line. The multi-valued data sent to the drum scanner is pre-warmed and binarized using a threshold value given by the information processing device l, and after noise processing etc. 1 drawing 02) is completed, a detection start signal is sent to the black area vertex detection circuit 5 through the signal line 400. The binary pattern storage circuit 3 stores the binary pattern sent from the preprocessing circuit 3, and can read the contents from the black area vertex detection circuit 51, figure separation circuit 61, and figure recognition circuit 7 through the signal line 700. It is configured as follows. When the black area apex detection circuit 5 receives the start of detection from the preprocessing circuit 3, it scans the entire binary pattern in units of 3 lines through the signal line 700 and detects the black areas in all directions present in the 21 straight patterns. Detect vertices sequentially. Every time one vertex is detected, black area vertex information is sent to the graphic separation circuit 6 through the signal line 500, and the detection cycle is stopped at t-1.

The figure separation circuit 6 is configured to separate, for example, black areas within dimensions given in advance to the information processing device 1, based on the black area vertex information sent sequentially. Separate symbols such as schools and mountain peaks in Figure 1 from the map. If the separation is successfully performed on the current black area vertex information, the figure separation information is sent to the figure recognition circuit 7t-2 through the signal line 600. On the other hand, if the separation is not possible, the black area detection circuit 5Vc sends an instruction to continue the black area apex detection operation through the signal line 100.When the figure recognition circuit 7 receives the figure separation information, the binary pattern storage circuit 4 passes through the signal line 700. While referring to the corresponding binary pattern, the figure is recognized by a method such as pattern matching, and the recognition result is passed through the signal line 100 to the information processing device IVc, and the black area vertex detection circuit 5 to continue the black area vertex detection operation.

6 is a block diagram of the main parts of the black area apex detection circuit 5 according to the present invention. In FIG. 6, reference number 50 is a scanning circuit, 51 is a line memory, 52 is a type generation circuit,
3 is a determination circuit, 54 is a vertex detection circuit, and 55 is a scanning line determination circuit. When the scanning circuit 50 receives a detection start signal from the preprocessing circuit 3 through the signal line 400, it starts the vertex detection operation. That is, the scanning circuit 5o generates the scanning line determining circuit 55 over the entire binary pattern stored in the binary pattern storage circuit 4 and receives the line extraction information sent through the signal line 401. Originally, the signal line 700 is completely passed through the binary pattern storage circuit 4.
Three consecutive lines are read out and stored in the line memory 51. Further, when the detection signal and black area vertex information generated by the vertex detection circuit 54 described below is received through the signal line 401i, the black area vertex information is sent to the figure separation circuit 6 through the signal line 500.

The line memory 51 is composed of three line memories, and the contents thereof are sent to the type generation circuit 52 through the entire signal line 102. /1'Type Akiosei Occurrence'': 452
is configured to generate the type pattern series explained in FIG. 3 by the method defined by (Equation 1) while sequentially scanning the line from the left based on the contents of the line memory 51. The type pattern series is sequentially connected to signal line 4.
The determination circuit 53 is composed of a vertex detection circuit 54' and a scanning line determination circuit 55. The vertex is detected and the next line to be scanned is determined based on the pattern series.

The vertex detection circuit 54 is configured to determine the presence or absence of a black area vertex based on the type pattern series using the method described in FIG. The black area vertex information including the position and width of the black area is sent to the scanning circuit 50 through the entire signal line 401.

The scanning line determining circuit 55 is configured to determine the line group to be scanned next from the current type pattern series according to the method explained in FIG. 401 to the scanning circuit 50;
Start scanning for the next scanning line. As explained above using the drawings, according to the present invention, each vertex of the black area present in the binary pattern obtained by scanning blood, etc. with a scanner is detected. In particular, the present invention improves the drawback that in the conventional method, an unnecessary part of unevenness of a horizontal line segment is detected as a vertex, and in addition, the dark blue time is shortened. I understand that.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a binary pattern in a drawing in which figures of different sizes coexist, FIG. 2 is a diagram illustrating a conventional method for detecting black area vertices, and FIG. 3 is a diagram according to the present invention. A diagram showing a type pattern used in detecting a vertex of a black region, FIG. 4 is a diagram for explaining the method of detecting a vertex of a black region according to the present invention, and FIG. FIG. 6 is a block diagram showing a block diagram of an embodiment in which the circuit is utilized in an automatic reading device, and FIG. 6 is a main block diagram specifically showing the black area apex detection circuit of the present invention. In the figure, 1... information processing device, 2... drum scanner, 3... preprocessing circuit, 4... binary pattern storage circuit, 5... black area apex detection circuit, 6... Figure separation circuit, 7--Graphic recognition circuit, 50--Scanning circuit,
51... Line memory, 52... Type generation circuit,
53--Judgment circuit, 54-Vertex detection circuit, 55-
...Scanning line determination circuit is shown--1η Figure 1 Figure 2! -, Uchiji Ding I T) No. (α) 3 Fig. ■ 3 D4 7s Ta 77 4 Fig. j+ z345s7s91ot+ (b) Fig. 5 Fig. 6 (n 5j '-11--'

Claims (1)

[Claims] In a circuit that separates and recognizes a black area corresponding to one figure from a binary pattern obtained by scanning a drawing, etc., the circuit separates and recognizes a black area corresponding to one figure from a binary pattern obtained by scanning a drawing. a scanning circuit for extracting the binary pattern for one to consecutive lines from the binary pattern; and a scanning circuit for temporarily storing the extracted binary pattern for N lines.
a type generation circuit that sequentially generates a type pattern constituted by N values at each point in the rask direction of the N line memories for each point VC in the line; and the type generation circuit examines the occurrence series of the type pattern in the line generated by the line, determines whether or not the black area vertex exists in the line, and if so, generates a vertex detection signal; A black area apex detection circuit comprising: a determination circuit that determines which N lines are to be extracted and stored in the line memory, generates line extraction information, and supplies the line extraction information to the scanning circuit.