JPS5843647U - Logic tape recorder device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

Figure 1 is a block configuration diagram for explaining an LSI dedicated to tape recorder control applied to this invention, Figure 2 is an overall block circuit diagram of a tape recorder to which this invention is applied, and Figure 3 is This shows an embodiment of the logic tape recorder device according to this invention, and is a circuit configuration diagram showing a circuit that protects when the forward and reverse playback switches are turned on at the same time. L
A circuit configuration diagram showing a circuit for temporarily stopping the SI, FIGS. 5a to 5d are timing diagrams of each part of the circuit shown in FIG. 4, and FIG. 6 is a circuit diagram and a tape recorder mechanism. Circuit configuration diagrams for preventing malfunctions caused by differences in operating time between
Figures a to f are timing diagrams of each part of the circuit shown in Figure 6, Figures 9a to d are timing diagrams explaining the operation without the malfunction prevention circuit shown in Figure 6, respectively, and Figure 10 is a timing diagram of each part of the circuit shown in Figure 6. Figures 11a to 11f are circuit configuration diagrams showing a circuit in which the recording state is continued even if the LSI is temporarily stopped by the circuit shown in Figure 4 when switching from the forward direction recording state to the reverse direction recording state. 10 is a timing diagram of each part of the circuit, FIG. 12 is a circuit diagram showing a conventional tape end detection means, and FIGS. 13 a to e and 14 a to C are shown in FIG. 12, respectively. A timing diagram showing the timing relationship of each part of the circuit in correspondence with the tape, and a waveform diagram for explaining cases where malfunction occurs, Part 1
5 is a circuit configuration diagram showing a tape end detection circuit applied to the circuit shown in FIG. 2, and FIGS.
FIG. 6 is a waveform diagram showing waveforms of various parts of the circuit shown in FIG. 5; 11...LSI, 12...Forward playback switch, 13...Reverse playback switch, 14
... Record switch, 15 ... Rewind switch, 16 ... Song fast forward switch, 17 ...
Stop switch, 18...Pause switch, 19
......Latch circuit, 20.21...Solenoid positive jack, 22...Control circuit, 23.
... Reel motor, 24 ... Drive circuit,
25゜26...Detection switch, 27...
・ASO detection circuit, 28... Tape end detection circuit, 29... Pulse width expansion circuit, 30...
...Reproduction memory circuit, 31...Select circuit, 3
2...Recording memory circuit, 33...Song power supply
゛Terminal, 34...Drive circuit, 35...
Power terminal, 36... Control drive circuit, 37...
... Drive circuit, 38 ... Control drive circuit, 39
, 40... Differential circuit, 41-43...
Connection terminal, 44... Tape, 451 ``38 (a) : : i■;1 (c) : , , -: + 111
1 1 t-+ b t3 tats
ts ('b) 7 death-j-! ! (e) :'. i-reward i l No. 1, 42 also -ts - 4B QOR26 1♀-Figure 15

Claims (1)

[Scope of utility model registration request] first and second setting operators that set the tape to first and second running states that are opposite to each other; and an electro-mechanical converter that is energized and driven in response to operations of the first and second setting operators. and a tape recorder mechanism unit that brings the tape into the first and second running states corresponding to the first and second setting operators operated by energizing the electro-mechanical converter. a logic tape recorder device comprising: matching means for detecting that the first and second setting operators have been operated together; and matching means for detecting that the first and second setting operators have been operated together; What is claimed is: 1. A logic tape recorder device comprising: energization stopping means for stopping energization to the logic tape recorder device.