JPS5840273B2 - Data search - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Technical field to which the invention pertains The present invention relates to a data processing device, and more particularly to means for allocating memory resources to a plurality of programs and positioning the programs in a timely manner.

(B) Prior Art In data processing systems, it is often necessary to replicate the operation of older data processing systems through a process called emulation.

Legacy or emulated data processing systems may contain hundreds of instructions that function as instructed in the legacy data processing system.

If an instruction of this type was designed for use in an older data processing system and is used by a newer data processing system, it will execute in the new data processing system the same way as in the older data processing system. As such, it is generally necessary to provide one or some instructions, ie, programs or routines.

Instructions received from this type of legacy system (hereinafter simply referred to as "instructions").

) are typically stored in the system's memory.

One way to position these multiple programs is to
It simply links (concatenates) an "instruction" to the corresponding program address in memory.

However, in general, it is not always possible to store all programs in memory due to insufficient or limited memory resource capacity.

That is, only a certain number of programs can be stored in memory.

One way to solve this problem would be to store some programs on a secondary storage medium such as a disk.

However, it has been found that the time required to fetch a program from disk is generally longer than the time required to actually generate or create the program according to the requirements of the "instructions".

Therefore, as described above, consideration must be given to allocating memory resources to various program programs, and further consideration must be given to the speed at which these programs are accessed in response to "instructions."

For example, these programs may relate to input/output operations between a data processing system and its associated peripheral devices;
Also, extremely high speed data transfer is required.

(C) OBJECTS OF THE INVENTION Accordingly, it is an object of the present invention to provide an improved technique for allocating a computer memory area for multiple programs in order to make effective use of the computer memory area.

It is another object of the present invention to provide an improved apparatus that includes techniques for efficiently allocating memory resources as well as effectively and quickly searching and locating specific programs associated with "instructions."

(D) Summary of the Invention In summary, the data processing device allocation and search technique of the present invention comprises a memory storing a plurality of programs and a plurality of entries equal to the number of programs in the memory. and a start point table for addressing a specific one of a plurality of entries in the search table.

Each entry in the search table includes a search argument to specifically identify that entry as corresponding to an "instruction", a pointer to the address of the associated program in memory, and a list of cognates of that particular entry. It includes a ring pointer pointing to another entry in the search table, an H pointer to a more recently used entry in the search table, and a T pointer to a more recently used entry in the search table.

The plurality of significant bits address a location in the start point table, which location contains the address of an entry in the search table.

Upon receipt of the ``instruction'', the start point table is addressed, which in turn addresses the entry in the search table.

If a bit occurs, i.e. en I-I
When a search argument (variable) in J matches an "instruction", the P pointer for that entry addresses a particular program in memory.

If no hits occur, the search continues until a hit occurs, after which the H and T pointers are updated and the link pointers are updated, as appropriate.

If no hits are found after a full search, a new program is created, a corresponding entry is written in the search table, and the various pointers are updated accordingly.

(E) Description of examples (E-1) Overview of device configuration (Figure 1) FIG. 1 is a block diagram representing the apparatus of the present invention.

This device is coupled to receive "commands" from line 100.

This "instruction" is one that is executed by the apparatus of the present invention by a program or one or more instructions stored in memory 108.

Specifically, the "instructions" received from line 100 are designed for another data processing system and are
The associated programs in J-108 are necessary for emulating the commanded operations in the apparatus of the present invention.

Thus, a particular program is addressed in memory 108 in response to an "instruction" from line 100.

There are many programs that must be utilized to emulate the different "instructions" received from line 100, and it is often impractical to have multiple such programs in, e.g., disk memory. Furthermore, since the storage locations of read/write core memory or semiconductor memory such as Memo IJ-108 are generally limited and these locations must be allocated to various operations, this kind of memory resource is not available in the system. The allocation must be within the requirements, and in addition, the time between receipt of an "instruction" on line 100 and the addressing of the associated program in memory 108 must be as short as possible.

As mentioned above, there are various types of "commands" received from line 100.

According to the apparatus of the invention, a plurality of significant bits of the "instruction" are received by the start point table 104 via means of a mask 102.

Starting point table 104 may include a number of locations equal to a power of the number of significant bits.

For example, mask 102 passes 6 significant bits;
This 6-bit address is the starting point table 10.
4, which gives a total of 6 in table 104.
It becomes possible to address four locations.

Each location in start bone component 104 includes an address that is used to address an entry in search table 106, as described below.

Each entry (content information) in search table 106 includes multiple parameters, five of which are important to the present invention.

As mentioned above, since resources within memory 108 are limited, this memory space must be utilized as efficiently as possible.

Therefore, by using a method of arranging entries in the search table 106 such that the most recently used entry and the oldest used entry are located at both ends of the queue, the oldest used entry and its associated The program is replaced with the newly created program and the queue is updated accordingly.

In this way, more frequently used programs have an entry at the top of the queue in the search table and can be utilized without going through the process of creating a new program.

For less used programs, their associated entries in search table 106 are purged and
It is replaced by an entry corresponding to a new program that becomes necessary during operation of the device.

Further, as mentioned above, starting point table 104
The received address of is the "command" received from line 100.
contains multiple significant bits.

These significant bits may address any one of multiple locations within start point table 104.

Each of the plurality of entries addressable by table 104 may address another of its cognate entries.

Thus, entries in search table 106 that are linked together by link pointers are said to be included in cognate entries, and each entry within a cognate is determined by the most recent entry. It can be directly addressed by table 104 depending on what is used.

More specifically, the significant bits passed through the mask 102 are
It is often a bit that distinguishes "instructions" from one another.

Therefore, in an ``instruction'', such as a 32-bit instruction, received from line 100, in many cases the bit pattern of significant bits distributed in the various bit locations of the ``instruction'' will generally distinguish the ``instructions'' from each other. .

Therefore, with 6 significant bits, search table 1
06 can be directly addressed by the start point table 104.

Therefore, depending on its location, a particular entry in table 106 can be directly addressed by table 104 or alternatively, depending on its location,
04 can be addressed by linking to an entry that is directly addressable.

In this way, the mask 102 is the "command" on the line 100.
, and only the significant bits are passed through to address table 104.

The addressed locations in table 104 are locations 0-6 in start point table 104.
Contains the addresses used to address entries in table 106, shown as entries 0-63 corresponding to numbers 3 and 3.

Note that address locations in table 106 need not have numbers corresponding to locations in table 104.

For example, the address at location 2 in table 104 can address the entry at address 75 in table 106.

Ends IJ0, 30.45 and 63 are particularly shown.
does not have to specify additional entries in turn.

For example, entry 0 is shown linked to two additional cognate entries, and entries 30 and 63 are shown linked to N and one additional entry.

Entry 45, on the other hand, has no links, so the family consists only of itself as a single entry.

In search table 106, there may be up to N entries, as shown by the last entry in the family of entries associated with the entry at address 30.

Each entry in search table 106 includes at least five parameters, as shown for the address 30 entries.

These five parameters are the search arguments (ar
) 110, P pointer 111, link pointer 112, H pointer 113, and T pointer 1
Contains 14.

Search argument 110 includes an instruction that matches the “instruction” received from line 100 and determines whether a match or hit (bit) exists between the received “instruction” and the addressed entry in table 106. It is used for the purpose of indicating.

If there is a hit, the P pointer 111 is set to memory 10.
Address the program within 8.

A link pointer 112 is included within each entry.
Points to the next entry within the family.

Here, the "next entry" is one that has not been used as recently as the one first addressed by table 104.

The last entry within a cognate entry has a link pointer of binary 0, thereby indicating that this entry is the last or least used entry within the cognate.

H pointer 113 points to the more recently used entry of all entries in search table 106, regardless of cognateness.

Therefore, if the entry in table 106 with address 30 was more recently used than the entry with address 45, H pointer 113 of entry 45 would point to entry 30.

Similarly, the T pointer points to a previously used entry.

In other words, it indicates the entry used before this entry.

Thus, in this example, entry 30's T pointer points to entry 45.

Additionally, the most recently used entry of all entries in table 106 is indicated by headpoint ink 118.

Similarly, tail pointer 116 points to table 106.
It indicates the least used entry among the entries in the file.

As shown in FIG. 1, head pointer 118 points to entry 30 and tail pointer 116 points to the second of the cognate entries, the first of which has address 63.

Each time there is an entry in the search table 106, the head pointer and, if necessary, the tail pointer are updated.

Furthermore, the H pointer 113 and T pointer 114 point to the hit entry and the immediately preceding (more recently used) entry.
Updated for the entry and immediately following (previously used) entries.

Therefore, when one entry and therefore a program is used, the pointers of only three entries in the search table are updated.

As can be seen, these entries are updated with the start of use, and when the use of another program is started while the program is still running or in use, the operation queue of the program in that entry is updated. It is completely possible to change the situation.

In this way, entries that are rarely used recently are placed at the bottom of the queue, and entries that are used a lot recently are placed at the top of the queue, thus making it possible for the search table 106
If there is no human in the program and a new program must be created to use in conjunction with the "instructions" received from line 100, the least used entry pointed to by tail pointer 116 will be the new program's entry. Replaced by entry.

Furthermore, if there is no hit in the entry in table 106 on the first try, that is, the address in start point table 104 is equal to address 0 in table 106.
Unless directly pointing to an address pointing to an entry with 63 through 63, the link pointer must be updated with respect to the completed entry.

Therefore, if there is a hit in the entry directly obtained from the address in table 104, there is no need to change the link pointer.

However, if there is no direct hit to an entry in search table 106, the link pointer between the hit entry and the immediately preceding entry must be updated.

In this way, for example, the hit entry is at address "0".
If the entry has the address "64J" immediately connected to the entry "64J", the end IJ "64J" is replaced with the entry "0".

That is, entry "64" becomes directly addressable in table 104, and its link pointer points to entry "0".
", while the link pointer of entry "0" is the last entry in the same family that was previously linked from entry "64".

Instruct Enl-IJ.

Therefore, according to the "instructions" received from line 100,
Entry "64" is the first hit and entry "64" is the first hit.
4'' points to entry ``0'', and this en HroJ points to the last en 1-'J in the family.

In this way, we use a technique that allows the most recently used entry among the cognate entries to be directly addressed by the address of the addressed location in the start point table 104, so that an "instruction" is an entry in the table 106. The time required to match is minimized.

(E-2) Explanation of the operation of the device (Figures 2 to 5) Next, the second
The manner in which the H pointer and T pointer are linked will be described with reference to the figure.

FIG. 2 shows the initial state of the search table 106, and is shown as containing five entries A to E for simplicity as an example, where entry E is the most recently used entry and entry A is the least used entry.

Furthermore, FIG. 2 shows two cognate entries, with entries B and A included in one cognate, and entry B being the more recently used enl-IJ of the two.

Entries E, D, and C constitute a second cognate, of which entry E is the most recently used entry within this cognate and entry C is the least used entry within this cognate. It is IJ.

Thus, head pointer 118 points to entry E (the most recently used entry) and tail pointer 116 points to the least used entry, entry A.

Similarly, entry A's H pointer points to entry B, and in turn, entry D's H pointer points to entry E.

The H pointers of entry E are not linked to any entry and are therefore all set to binary "0", for example.

Regarding the T pointers, the T pointer of entry E points to enh IJ D, and in turn the T pointer of entry B points to entry A.

The T pointers of entry A do not point to any entries and are therefore all set to binary "0", for example.

A link pointer that points only to an enl-IJ within a particular entry cognate means that the most recently used entry within that cognate points to the next most recently used entry, and thus the last entry within the cognate. are included as directed.

Therefore, entry E's link pointer is entry D
The link pointer of entry D points to entry C.

Since entry C's link pointer does not point to entry B, and entry C is the last entry in the family of entries, this link pointer is all set to binary 1oJ, which is the last entry in the family. .

Similarly, entry B's link pointer is set to entry A.
, and all link pointers of entry A are set to binary "0" to indicate that it is the last entry in the family.

FIG. 3 shows the linked state of each pointer after, for example, entry D, and therefore its associated program, has become the most recently used entry.

As can be seen, tail pointer 116 contains the address of the least used entry, entry A, and the H pointers of entry A and entry B remain in the state of FIG.

Since entry D is the most recently used entry at this point, it is pointed to by head pointer 118 and its H pointers are all set to binary rOJ.

Therefore, at this point, the H pointer of entry C points to entry E, and the H pointer of entry E points to entry D.

As is clear from these, only three entries are affected by humans.

namely, the hit entry D, the preceding entry or entry C that was used earlier, and the subsequent entry or entry E that was used more recently.

Similarly, the T pointers of entries A, B and C are unaffected.

However, at this point, the T pointer of entry D points to entry E, and the T pointer of entry E points to entry C.

Regarding the link pointer, entry B to entry A
Link pointers to are not affected.

Additionally, the link pointer area of entry C (binary ``0'' is not affected).

Therefore, entry E's link pointer is entry D
Instead of directing, the opposite is true.

That is, the link pointer of entry D points to entry E, and the link pointer of entry E points to entry C.

Therefore, the hit entry (in this case, entry D
) and the link pointer of the immediately preceding entry l-IJ, the more recently used entry (ie, entry E), is affected by the hit in table 106.

Note that, as discussed above, if a hit occurs with respect to entry E, the H and T pointers are unaffected, and furthermore, the link pointer is unaffected.

Furthermore, if a hit occurs in Enl-'JB, the H and T pointers are affected, but the link pointer is not.

FIG. 4 then shows how pointers link or point to entries after a new program has been created and after the entry E associated with this new program has been inserted into table 106. .

Assume now that there is no longer free space in memo IJ-108, and therefore entry A in table 106 must be replaced with a new entry.

Therefore, entry F for the newly created program in memo IJ-108 is inserted in its place.

In this case, entry F is the most recently used entry and is pointed to by head pointer 118.

For purposes of the following explanation, it should be noted that the linking method shown in FIG. 4 does not continue from the initial state shown in FIG. 2 to the state shown in FIG. 3.

At this point, after entry F has been inserted, the least used entry is entry B, which is pointed to by tail pointer 116.

To describe changes in the H pointer with reference to FIGS. 2 and 4, the H pointer of entry B points to entry C as in the case of FIG. Same as in the figure.

However, the H pointer of entry E points to entry F.

Similarly, the T pointers for entries E, D and C are the same as in FIG.

At this point, the T pointer of end IJ B is binary ``0''.
", and the T of the newly used entry P
The pointer points to entry E.

With respect to link pointers, let us say, for example, that entry F is the only entry within its particular cognate, so entry B is the only entry within its particular cognate at this point.

Therefore, the link pointers of entries B and F are both binary "0", indicating that they are the last and only entries in the two en I-IJ family.

The link pointers for entries B, D and C are the same as in FIG.

Above we have shown how pointers link to different entries, but only the H and T pointers of the three entries are
It will be clear that it must be changed depending on the 'human' status or the new entry status.

Regarding link pointers, only the link pointers of the two entries are changed.

The specific manner in which these entries and their pointers are updated as people or new programs are added is:
The operation will be explained with reference to the operational flowchart of FIG. 5 and the block circuit diagram of FIG. 6.

In FIG. 5, when an ``instruction'' is received by the mask, a start point table (SPT) is addressed as shown at block 10.

The entry for the addressed location in the start point table is then retrieved and the search table (ST) is addressed as indicated by block 12.

To determine whether a ``hit'' exists, the received ``instruction'' is compared to the search argument of the addressed entry in the search table, as shown at block 14.

If there is no match, the next block 16 is to determine whether this is the last entry for the link.

If the answer is No, proceeding to block 18, a determination of the link pointer of the addressed entry is made;
The search table is therefore addressed with this link pointer.

This processing operation is repeated until the answer to block 14 indicates a "match."

If a compare match exists, block 15 is entered to determine whether a loop operation back from block 18 was necessary to reach the compare match in block 14, i.e., a match between the instruction and the search argument was obtained in the first comparison in block 14. It is determined whether the

Block 1 if obtained in the first comparison
5 immediately proceeds to block 20.

Otherwise, proceed to block 17, where the link pointers are relinked, and then proceed to block 20.

Proceeding to block 20, the P pointer is retrieved from the addressed entry, thus addressing the memory and thereby executing the program in the addressed memory.

Thereafter, as shown in blocks 22 and 24,
Addressed entries are linked to the head pointer, with more recently used entries and more recently used entries as well as the H and T of the addressed entry.
The pointer is updated and the processing operation then exits.

If no match is found in block 14 and the link pointer is equal to "O", block 16 is exited and block 26 is entered.

In reality, processing is performed from block 26 to block 34 and exits to block 20, but the operation during this time is such that there is no match, and therefore the "command" received on line 100
This is the case when the entry does not exist in the search table.

For this reason, a new program had to be formed,
A new entry for this program is placed in the search table.

At block 26, the tail pointer is retrieved and used to address the entry it points to.

The entry pointed to by the tail pointer is the new entry, ie, the entry to be replaced by the program.

However, before exchanging this entry, it is queried whether the program associated with this entry is still "alive".

As mentioned above, pointers to entries of programs that are still in use and running may change, but it is highly unlikely that the least addressed entry, and therefore its corresponding program, is still running.

Therefore, if this entry and therefore the program is still alive, block 30 is reached and the more recently used entry is addressed.

This loop of operation is repeated until the answer to block 28 is No, and when the entry pointed to by the tail pointer is not linked to any entry, block 32
Proceed to.

Block 34 then places the new entry in the start point table, updates the tail pointer, and addresses the new entry.

Once the newly formed program is placed in memory, block 20 is entered.

This new program is addressed after the operation of block 24 until the operation exits.

(E-3) Detailed explanation of device configuration (FIG. 6) The operation of the system of the present invention has been described above, and the configuration of the device of the present invention will be explained in more detail below with reference to the embodiment device of FIG. 6.

FIG. 6 shows a circuit block diagram of the device of the invention.

An "instruction" is received on line 100 and its significant bits are provided by mask device 102 to start point table 104.

As mentioned above, the "instruction" from line 100 includes a plurality of bits, for example 32 bits, with the six significant bits passing through mask device 102 to address starting point table 104.

The number of locations in start point table 104 corresponds to a "power" of the number of bits that can pass through mask device 102.

Thus, in this example, the 6 bits available at the output of mask device 102 can address up to 64 locations in table 104.

Table 106 includes multiple entries "O" through rNJ.

The number of entries in table 106 is typically greater than the number of locations in table 104.

Therefore, table 106 includes 64 entries, one of which is typically located at location r.
It is shown as N-XJ.

Each entry points to the starting address of a memory segment contained in memory 108, and each memory segment may contain a program, such as the programs described above.

This indication is accomplished by P pointer 111.

This pointer is one parameter or information element included in each entry in table 106.

As mentioned above, each entry also includes a search argument 110, a link pointer 112, an H pointer 113, and a T pointer 114.

Further, as described above, upon receiving an "instruction", the apparatus of the present invention first determines the address of the entry in the search table 106 using the start point table 104.

The first addressed entry in table 106 is line 1.
If it has a search argument that corresponds to the "command" received from 00, the next necessary action is to
Link the H and T pointers of the addressed entry in 6 to position the now addressed entry at the head of the queue, making it the most recently addressed and used entry, i.e. the program. The goal is to show that

Furthermore, the entries following the now addressed entry, i.e. the more recently used entries and the earlier used entries (pointed to by H pointer 113 and T pointer 114), are updated with respect to each pointing location. be done.

Additionally, head pointer 118 is updated to point to the now addressed entry, and tail pointer 116 is updated as necessary.

The head and tail pointers may be included in memory 108 or in separate registers.

If the first entry addressed in search table 106 does not correspond to an instruction received from line 100, then the in-family blowout en I-IJ matches search argument 110 with "instruction" from line 100. up to the link pointer 112.

Thus, if there is no first hit, i.e., there is no first match between the search argument of the first addressed entry in table 106 and the "instruction" from line 100, subsequent entries in the family is addressed.

Note that if there is no entry in the table 106 that matches the "instruction" from the line 100, the tail pointer 11
A new program must be created and placed in the last used location in memory 108, indicated by 6.

In this case, the condition is that the program corresponding to the entry pointed to by the tail pointer 116 is not running (not alive).

On the other hand, if a subsequent entry pointed to by link pointer 112 exists in table 106, the link pointers within this cognate are reconfigured or updated so that the address of the last matched and addressed entry is the same as that cognate. the start point, which has been updated to include the first address of
It is placed at location 104.

Then the link pointer of the entry just addressed is
The first addressed location in start point table 104 is changed to point to the address that previously existed.

In this way, the address of the most recently used or "hit" entry for this family is placed in table 104 with the probability that it will likely be the next used entry or program.

Therefore, by providing an address for such a just-addressed entry in the start point table 104, a "command" from line 100 will likely yield the first hit at the next point in time when addressing this entry cognate. .

Thus, the device of the present invention contemplates the use of addresses consisting of six significant bits of "instructions" of the emulated processing device or "instructions" used for input/output operations.

The six significant bits address a table that gives the address within the search table of the entry corresponding to "instruction."

The entry points to the memory segment that will contain the program in question.

Additionally, to allocate resources in memory 108, the pointer for each entry in search table 106 is updated to point to the most recently used entry, ie, the corresponding program.

Thereby, the resource, which is the memory area of the memory 108, can be allocated only to the most recently used program within the extent of the memory.

Additionally, pointers in the start point table for entries in the search table may be updated to point to the most recently hit entry within the enl-IJ family.

In particular, the significant bits of the ``command'' received from line 100 are masked by masking device 102 and used to address locations shown in FIG. 6, such as location ``2'' in start point table 104. , and then with the contents of this location an entry in search table 106 is addressed by means of an OR function, indicated by OR gate 120, and register 141.

The search argument 110 for the addressed entry is then read and applied to one input of a "hit" comparator 122.

The other power of this comparator is given the "command" received from line 100.

If “Hit” is not specified in the comparator 122, A
ND gate 123 opens and the currently addressed entry's link pointer is used to address another entry in table 106.

If there is a hit in comparator 122, register 1
AND gates 124, 126, 128, and 130 operate through AND gates 124, 126, 128, and 130, respectively, to transfer P pointer 111 to register 132, H pointer 113 to register 134, and T pointer 114 to register 136.
and link pointer 112 to register 138, respectively.

The P pointer now in register 132 is used to address memory 108 via line K.

Now, in order to determine whether this is an initial (first) hit, thereby eliminating the need to update the address in the addressed location of the start point table 104,
The address for the entry in search table 106 addressed in register 142. and is applied to one input of the initial hit comparator 144.

The other input to this comparator 144 is from the entry address register 141, the A
Provided by ND gate 146 and register 147.

If there is an initial hit, A
ND gate 150 closes, thereby linking pointer 112 in each entry to a particular entry cognate.
The requirement to change is prohibited.

Before describing how to utilize the pointers in registers 134 and 136, we will explain how to update link pointers.

The basic operation of updating a link pointer is as follows.

As mentioned above, if there is an initial hit, there is no need to update the link pointer, so the following explanation is for the case where there is no initial hit.

Two situations generally occur.

The first is when the hit entry is not the last entry in the family, and the second is when the hit entry is the last entry in the family.

In both cases, the link pointer of the human entry must be changed to link to the most recently acted entry within the family of entries in which the "human" entry is located.

Therefore, the "Hit" entry must link to the entry whose address is in the start point table 104, ie, the first entry.

Furthermore, in both cases, the start point table must be updated to include the address of the hit entry.

Furthermore, unless the ``Hit'' entry is the last entry in the family, the entries preceding the ``Hit'' entry must be linked to the entries following the ``Hit'' entry.

That is, the more recently used entry before the hit must be linked to the more recently used entry before the hit.

If the ``Hit'' entry is the last entry in the family, the link pointer of the entry that precedes the ``Hit'' entry, i.e., the entry that was previously the more recently used entry, is set to binary ``0'' and must be made to indicate that this particular entry is the last entry in its family.

The above operation is embodied by the apparatus shown in FIG.

Specifically, in order to update the start point table 104, the address of the addressed entry in the search table 106 remains in the register 141 and is entered in the hit address register 147 when the AND gate 146 is opened by the hit indicated by the comparator 122. placed.

However, if this hit is not the first indicated by comparator 144, AND gate 160 writes the address now in register 147 to the addressed location in start point table 104.

As mentioned above, this is the situation when there is no initial hit, and this situation generally occurs in both situations, whether or not the hit entry is the last entry in the entry family.

The just-hit entry in table 106 is also addressed by register 141, the original address (before the hit) of the addressed location in start point table 104 is now in register 142, and To link an entry to the entry indicated by the address in register 142, the contents of register 142, or address, are
Passing through ND gate 168 and OR gate 200, the link pointer location for the currently addressed entry, which in this example was just hit, is written.

AND gate 168 opens due to the hit condition indicated by hit comparator 122 and the absence of an initial hit indicated by comparator 144.

Thus, an entry that has just been hit and has an address at the addressed location of start point table 104 as described above will, by virtue of its link pointer,
The previous hit is now linked to the entry whose address was in the start point table 104.

Having thus updated the start point table and updated the link pointer of the just-hit entry, we now need to determine whether the just-hit entry is the last entry in the family of entries. .

When comparator 122 generates a hit signal, register 1 is now
The link pointer of the hit entry present at 38 is set to binary ``0'' bit 154 by the
compared to

Additionally, the link pointer at line 162 that joins the addressed entry in table 106 is also a "link end".
It is compared with the "0" bit 154 by comparator 156.

Comparator 156 indicates whether it is the end of a link for the currently addressed entry l-IJ in table 106, whereas comparator 202 only indicates whether the hit entry is the end of a link. shows.

If comparator 156 indicates that the addressed entry is the end of the link and there is no hit, AN
D-gate 157 opens and flag 159 is set to indicate that a new program must be created.

If the comparator 202 gives a (NO) indication, the gate 2
06 is opened, and conversely, if the link comparator 202 provides an output of (YES), the AND gate 204 is opened.

However, until the requested entry in table 106 is addressed, AND gate 204 also
It doesn't open completely either.

The reason this condition is necessary is that this entry precedes the entry just hit and the hit entry was not the last entry in the family, or to link to the entry that follows the hit entry. All binary 'O' when the last entry in the family
”, the link pointer must be updated.

The next objective is to locate and address the entry in table 106 that precedes or is a more recently used entry than the just-hit entry.

Therefore, the contents of register 142 containing the address of the entry in search table 106 that was originally addressed for its cognate passes through gate 150 and OR gate 153 to address table 106 again.

The first entry in the family of the entry just hit is thereby addressed in table 106 via gate 120 and register 141.

The next step is to compare the link pointer of the just-addressed entry with the address of the hit entry.

This comparison is not necessary for end IJs addressed by the start point table before the hit, but since the initial hit can be indicated by comparator 144,
This action routine is required for subsequent entries within the family.

In this manner, the link pointer of the addressed entry in table 106 is compared by link comparator 164 with the address in register 147.

The address in register 147 is the initial hit comparator 14
4 gives an output of rNOJ, the AND gate 210
is applied to one input of comparator 164 by opening.

In this case, i.e. in the initial operating loop when the first entry in the family is addressed, the comparator 164
gives the answer rNOj, so that the inverter 212
Gate 150 is closed via.

Also, the rNOJ output from the linkage comparator 164
D-gate 214 opens and the link pointer received at one input of comparator 164 again addresses search table 106 via OR gate 153.

This process continues until link comparator 164 generates an output rYEsj to partially open AND gate 204.

A 1-YESj output from link comparator 164 indicates that a previous or more recently used entry hit before the current hit is currently being addressed in search table 106. There is.

So what we do here is either put the link pointer that was ever present in the previously hit entry into the entry that is now being addressed, or place all the binary " 01 bit.

If this is the end of the link, both comparators 156 and 202
gives a "YES" indication, AND gate 300 opens,
A "0" bit 154 is passed through AND gate 204 and OR gate 200 and written to the link pointer location of the addressed entry in search table 106.

If this is not the end of the link, the link pointer that previously existed in the hit entry and is now in register 138 will be removed by AND gate 206 opened and OR gate 20
0 and is written to each link pointer location.

In this way, the link pointer is updated when the initial hit does not exist.

The link pointer is updated both for the hit entry and also for more recently used entries before the hit.

Additionally, the start point table has also been updated to point to the entry just hit.

Thus, when the link pointer and start point tables are updated, the H pointer and T pointer must be updated simultaneously, along with tail pointer 116 and head pointer 118.

As shown with respect to FIGS. 2, 3, and 4, the H and T pointers of only the just-hit entry and the entries on either side of the hit entry with respect to recent use may be updated.

Additionally, tail pointer 116 and head pointer 118 would also have to be updated.

Therefore, the addresses of entries that are adjacent in terms of usage time to the hit entry must then be addressed correspondingly.

Registers 147, 134 and 136 are used for this purpose.

Register 147 contains the address of the hit entry and updates its H and T pointers when its link pointer is updated.

Registers 134 and 136 contain the addresses of more recently used entries and earlier used entries, respectively, and are utilized to address those entries to update their respective H and T pointers.

Therefore, when the comparator 122 indicates a "hit", the head pointer 118 is immediately updated with the address of the hit entry indicated by the register 147.

The address in register 147 is an open AND gate 30.
2 to the head pointer 118.

Referring to the example described with respect to Figures 2 and 3, if the hit entry is entry D, its H pointer points to deletion of the recently used entry in place of entry E, and its T pointer points to deletion of the recently used entry in place of entry E. Indicate entry E instead of entry C.

Thus, in this example, the more recently used entry indicated by the H pointer 113 for the hit entry is placed in the T pointer 114 for the hit entry.

This processing is accomplished by sending the contents of register 134 through open AND gate 306 and writing it to the T pointer location of the just-hit entry.

On the other hand, based on the match in comparator 310 between the address on line 148 and the address in register 147, the H pointer 113 of the entry just hit has a binary rlJ 308
is written.

Comparator 310 with “hit” indication from comparator 122
The rYEsJ indication from opens the AND gate 312, and the binary "1" passes through the OR gate 314, resulting in a binary "1".
is written to the H pointer location of the entry just hit.

After updating the pointer of the entry just hit,
Pointers to entries that precede or follow the just-hit entry for recent use must also be updated.

Assuming that we have to update the pointer of the more recently used entry with respect to the hit entry, the second
Referring to FIG. 3 and FIG. 3, in this case, the H pointer and T pointer of the encoder I-IJE are updated.

Thus, the H and T pointers, which previously referred to the more recently used entry deletion and entry D, respectively, now point to entry D and entry C, respectively.

Entry E is thereby addressed by the contents of register 134.

This operation is performed by conventional timing means (not shown).
This occurs based on a similar timing sequence operation as for another address received by OR gate 120.

When entry E is being addressed, register 136
The contents of , the address of entry C in this example, are written to the T pointer location of entry E via OR gate 320 based on a time-ordered operation.

The H pointer area or location of entry E is
The address in register 147 is updated with the address of entry D.

That is, the address of the hit entry, entry D, is updated in accordance with the timing order via the OR gate 314.

In this way, we have updated the H and T pointers of the more recently used entries, such as before the hit.
The H pointer and T pointer locations of entry C must now be updated.

Using the other input of OR gate 120 and register 141, entry C is timed and addressed by the contents of register 136 via OR gate 322, as in the case of an operation on the contents of register 134.

Since the T pointer for entry C does not change after the hit, there is no need to update it.

However, instead of pointing to entry D, the H pointer of entry C must be updated so that it points to entry E after the hit.

Therefore, register 1 with the address of entry E
The contents of 34 are timed and written to the H pointer location for entry C by another input via OR gate 1-314.

Having updated the H and T pointers for the three entries in search table 106 that were affected by hits, we now describe how tail pointer 116 is updated.

The tail pointer 116 is updated to contain the address of, or point to, the least used entry of all other entries in the search table 106 except for cognates.

The most common example of the tail pointer 116 being updated is when the least used entry is actually used.

In this case, the next least used entry is updated to point to tail pointer 116.

The least used entry contains a binary "1" signal in its T pointer location 114.

If such an entry is hit, it indicates that tail pointer 116 must be updated.

Therefore, if binary rIJ 326 matches the code of the T pointer location in comparator 328, AND gate 330 is fully open when the currently addressed entry is also the hit entry.

When AND gate 330 opens, AND gate 332 also opens, and the address in register 134 becomes tail pointer 11.
6 is passed to be written.

The reason is that the hit entry that was the least used entry before the hit has the H pointer address stored in register 134 by the hit, and the indicates the next least used entry in table 106.

Accordingly, the tail pointer 116 is updated and the entire processing operation of updating the various pointers and start point table is completed.

('8) By using the configuration as described in the detailed description of the present invention, the device of the present invention can determine whether the required program is in the main memory or not.
The decision whether to retrieve it from another storage medium can be made very quickly, and the most recently used program entry or queue can be used to increase the probability that the required program is in main memory. can.

Therefore, the device of the present invention makes it possible to run multiple programs at high speed using a limited amount of main memory, thereby making it possible, for example, to emulate instructions of other older systems at high speed. do.

[Brief explanation of drawings]

FIG. 1 is a general block diagram of the apparatus of the present invention, FIG. 2 is a diagram showing the initial state of a group of entries in the search table of the present invention, and FIG. FIG. 4 is a diagram showing the link states of pointers of a group of entries in the search table after a new entry has been inserted into the search table. FIG. 5 is a diagram showing the state of various pointers after a new entry is inserted into the search table. The flowcharts shown in FIGS. 6A and 6B are detailed block diagrams of the apparatus of the present invention. 100... "Command" line, 102... Mask device, 104... Start point table, 106... Search table, 108...
...Memory, 116...Tail pointer,
118...Head pointer.

Claims (1)

[Scope of Claims] 1. A main memory storing a plurality of programs each including a plurality of commands for executing one of the plurality of specified functions; and a plurality of entries, the number of which is equal to the number of the programs. a first pointer to said in-memory address of one of said programs, and an instruction enabling addressing of said one of said programs and thereby enabling execution of an associated one of said particular functions; a first parameter containing said entry containing one associated parameter;
a table; means for receiving the instruction; means for comparing the received instruction with the parameter of at least one of the entries; and means for addressing one of the programs. 2. The data processing device according to claim 1, further comprising: means for indicating the operating state of the entry according to the most recently used one of the programs; and the comparison means includes: and means for initially comparing said instructions with said parameters of an entry corresponding to the most recently used one of said programs. 3. The data processing device according to claim 1, further comprising: a second table consisting of a plurality of locations each including a second address; and one of the locations in the second table according to the instruction.
means included in said comparing means for comparing said instruction with a parameter in one of said entries indicated by a second address in an addressed location of said second table; A data processing device comprising: