JPS5836431B2 - head control device - Google Patents

head control device

Info

Publication number
JPS5836431B2
JPS5836431B2 JP50115792A JP11579275A JPS5836431B2 JP S5836431 B2 JPS5836431 B2 JP S5836431B2 JP 50115792 A JP50115792 A JP 50115792A JP 11579275 A JP11579275 A JP 11579275A JP S5836431 B2 JPS5836431 B2 JP S5836431B2
Authority
JP
Japan
Prior art keywords
circuit
head
address storage
current
head address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50115792A
Other languages
Japanese (ja)
Other versions
JPS5240111A (en
Inventor
慎吾 秋吉
俊夫 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP50115792A priority Critical patent/JPS5836431B2/en
Publication of JPS5240111A publication Critical patent/JPS5240111A/en
Publication of JPS5836431B2 publication Critical patent/JPS5836431B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は磁気ヘッド等の制御装置に関し、特に磁気円板
等へのヘッド移動を確実に行ない得るヘッド制御装置に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for a magnetic head, and more particularly to a head control device that can reliably move the head to a magnetic disk or the like.

第1図は本発明の一実施例にして、CPUは演算制御装
置、DCはCPUからの命令判別その他を行なう制御回
路、A1はヘッドを目的の位置に移動させるための指定
ヘッドアドレス記憶回路、A2はヘッドの現位置を記憶
している現ヘッドアドレス記憶回路、CはAI,A2の
位置情報を比較する回路、SCはCの出力を受けてヘッ
ドの移動方向をコントロールする回路、HDはSCの出
力によりヘッドを適宜な方向に移動させる駆動回路、D
は磁気円板、WはDへの書込みを制御する回路、RはD
からの読み出しを制御する回路である。
FIG. 1 shows an embodiment of the present invention, in which CPU is an arithmetic control unit, DC is a control circuit for discriminating commands from the CPU, etc., A1 is a specified head address storage circuit for moving the head to a target position, A2 is a current head address storage circuit that stores the current position of the head, C is a circuit that compares the position information of AI and A2, SC is a circuit that receives the output of C and controls the moving direction of the head, and HD is SC a drive circuit that moves the head in an appropriate direction by the output of D;
is a magnetic disk, W is a circuit that controls writing to D, R is D
This is a circuit that controls reading from.

今、第2図示の如くヘッドHが磁気円板Dの15トラッ
ク目に位置していたとする。
Now, assume that the head H is located at the 15th track on the magnetic disk D as shown in the second figure.

また現ヘッドアドレス記憶回路A2はそのヘッドHの正
しい位置情報15が記憶されていたとする。
It is also assumed that the current head address storage circuit A2 stores correct position information 15 for the head H.

このとき、CPUからヘッドアドレス情報(例えばトラ
ック数8)を含んだ書込み命令等が出力されると制御回
路DCがこれを判別し、指定ヘッドアドレス記憶回路A
1に8を記憶させる。
At this time, when a write command including head address information (for example, 8 tracks) is output from the CPU, the control circuit DC determines this and the specified head address storage circuit A
Store 8 in 1.

現ヘッド位置は15トラックであり、比較回路Cはその
差を検出し、移動方向コントロール回路SC及びヘッド
駆動回路HDを作動させてヘッドHを8トラック目まで
移動させる。
The current head position is track 15, and the comparator circuit C detects the difference and operates the moving direction control circuit SC and head drive circuit HD to move the head H to the 8th track.

このとき同時に現ヘッドアドレス記憶回路A2の内容(
15)から1づつ減算する。
At the same time, the contents of the current head address storage circuit A2 (
Subtract 1 from 15).

その内容が8になったとき比較回路Cは一致を検出し、
移動方向コントロール回路の起動を停止させてヘッドH
の移動を停止すれは、ヘッドは8トラック目に位置する
ことになる。
When the content becomes 8, the comparison circuit C detects a match,
The head H is stopped by stopping the movement direction control circuit.
If the movement of the head is stopped, the head will be located at the 8th track.

またこの一致出力は制御回路DCに印加され、また先の
命令が書込み命令であることを判別しているので書込み
回MWを起動してCPUからの所定の情報を8トラック
目に書込む。
Further, this coincidence output is applied to the control circuit DC, and since it has been determined that the previous command is a write command, the write circuit MW is activated to write the predetermined information from the CPU to the 8th track.

上述の作動において、ヘッドHの具体的移動作業と現ヘ
ッドアドレス記憶回路A2の減算動作には因果関係を有
していないので、ヘッド移動後の位置とA2の内容が一
致しない場合が従来しばしば発生した。
In the above-mentioned operation, there is no causal relationship between the specific movement work of the head H and the subtraction operation of the current head address storage circuit A2, so conventionally, cases often occur where the position after the head movement and the contents of A2 do not match. did.

本発明はかかる難点を解決するために比較回路Cが一致
を検出したらすぐに書き込み動作等を始めないで、現ヘ
ッド位置を一度確認し、確かにヘッド位置が正しいとき
のみ書込み動作等の具体的作業に移る如く構成したもの
である。
In order to solve this problem, the present invention does not start a write operation immediately after the comparator circuit C detects a match, but once confirms the current head position, and performs a specific write operation etc. only when the head position is certainly correct. It is structured so that you can move on to your work.

すなわち、先の比較回路Cが一致を検出したならば書込
み回路Wを作動させる前に読出し回路Rを作動させる3
読出し回路RはヘッドHにより磁気円板に設けられたト
ラック位置情報を読出し現ヘッドアドレス記憶回路A2
に記憶させる。
That is, if the comparison circuit C detects a match, the read circuit R is activated before the write circuit W is activated.
The read circuit R reads the track position information provided on the magnetic disk by the head H and stores the current head address storage circuit A2.
to be memorized.

ここで再び一致検出作動を行なう。Here, the coincidence detection operation is performed again.

ヘッド移動動作が正しく行なわれた場合には現ヘッドア
ドレス記憶回路A2にはトラック数8が再び記憶され、
直され比較回路Cからはやはり一致出力が制御回路DC
に送出される3制御回路DCは読出し回路Rを作動させ
た後の一致出力を検知したならば、読出し回路Rの作動
を停止させる。
If the head movement operation is performed correctly, the number of tracks 8 is stored again in the current head address storage circuit A2, and
The matching output from the corrected comparison circuit C is also sent to the control circuit DC.
3 control circuit DC, which is sent out, stops the operation of the readout circuit R when it detects a coincidence output after the readout circuit R is activated.

また書き込み回路Wを起動させて所定の情報書込みを行
なう。
Also, the write circuit W is activated to write predetermined information.

もし、ヘッド移動が正しく行なわれず例えば10トラッ
ク目でその移動動作が停止していた場合、現ヘッドアド
レス記憶回路A2にはトラック情報10が記憶される。
If the head movement is not performed correctly and the movement operation stops at, for example, the 10th track, track information 10 is stored in the current head address storage circuit A2.

指定アドレスは8であり、A1に8、A2に10の内容
記憶であるから前述の如く移動方向コントロール回路S
Cを再び作動させ、さらに2トラックだけヘッドHを移
動させると比較回路Cから一致出力が制御回路DCに送
出され、前述の如く読出し回路Rの作動後の一致出力を
最終的な正しい一致出力と判定して具体的作業例えば書
込み動作を前述の如く行なうものである。
The specified address is 8, and the contents of 8 and 10 are stored in A1 and A2, respectively, so as mentioned above, the moving direction control circuit S
When C is activated again and the head H is moved by two more tracks, a coincidence output is sent from the comparator circuit C to the control circuit DC, and as mentioned above, the coincidence output after activation of the readout circuit R is taken as the final correct coincidence output. After making a determination, a specific operation such as a write operation is performed as described above.

本発明は上述の如くヘッドアドレスを確実に行ない得る
ので、ヘッドの高速移動、先回り移動等を容易に行なわ
せ得るものである。
Since the present invention enables head addressing to be performed reliably as described above, it is possible to easily perform high-speed movement of the head, advance movement, etc.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図は磁気
円板の斜視図である。 D・・・・・・磁気円板、H・・・・・・ヘッド、HD
・・・・・・ヘッド駆動回路、R・・・・・読出し回路
、W・・・・・・書込み回路、A1・・・・・・指定ヘ
ッドアドレス記憶回路、A2・・・・・・現ヘッドアド
レス記憶回路、SC・・・・・・移動方向コントロール
回路、C・・・・・・比較回路、DC・・・・・・制御
回路。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a perspective view of a magnetic disk. D...Magnetic disk, H...Head, HD
...Head drive circuit, R...Read circuit, W...Write circuit, A1...Specified head address storage circuit, A2...Currently Head address storage circuit, SC: movement direction control circuit, C: comparison circuit, DC: control circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 磁気円板の所定トラック位置に対して情報の記録又
は再生を行なうヘッド、前記ヘッドを目的の位置に移動
させるための指定ヘッドアドレス記憶回路、前記ヘッド
の現位置を記憶している現ヘッドアドレス記憶回路、前
記指定ヘッドアドレス記憶回路の位置情報と前記現ヘッ
ドアドレス記憶回路の位置情報とを比較する比較回路、
前記比較回路の出力と前記現ヘッドアドレス記憶回路の
出力とを受けて前記現ヘッドアドレス記憶回路に記憶さ
れた値を変える移動方向制御回路、前記移動方向制御回
路の出力を受けて前記ヘッドを駆動して移動させるヘッ
ド駆動回路、前記ヘッドの磁気円板への書込みを制御す
る書込み回路、前記ヘッドの磁気円板からの読出しを制
御する読出し回路、前記比較回路が位置情報の一致を検
出した場合に前記読出し回路が読出したトラック位置情
報を前記現ヘッドアドレス記憶回路に記憶させ、再び前
記比較回路から出力される一致検出によって前記読出し
回路の作動を停止させて前記書込み回路を起動させる制
御回路を有することを特徴とするヘッド制御装置。
1. A head for recording or reproducing information on a predetermined track position of a magnetic disk, a specified head address storage circuit for moving the head to a target position, and a current head address for storing the current position of the head. a storage circuit; a comparison circuit that compares position information of the specified head address storage circuit with position information of the current head address storage circuit;
a movement direction control circuit that receives the output of the comparison circuit and the output of the current head address storage circuit and changes the value stored in the current head address storage circuit; and a movement direction control circuit that receives the output of the movement direction control circuit and drives the head. When the head drive circuit that moves the head by moving the head, the write circuit that controls writing of the head to the magnetic disk, the read circuit that controls the read of the head from the magnetic disk, and the comparison circuit detect coincidence of positional information. a control circuit that causes the current head address storage circuit to store the track position information read by the readout circuit, stops the operation of the readout circuit, and activates the write circuit based on coincidence detection output from the comparison circuit again; A head control device comprising:
JP50115792A 1975-09-25 1975-09-25 head control device Expired JPS5836431B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50115792A JPS5836431B2 (en) 1975-09-25 1975-09-25 head control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50115792A JPS5836431B2 (en) 1975-09-25 1975-09-25 head control device

Publications (2)

Publication Number Publication Date
JPS5240111A JPS5240111A (en) 1977-03-28
JPS5836431B2 true JPS5836431B2 (en) 1983-08-09

Family

ID=14671173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50115792A Expired JPS5836431B2 (en) 1975-09-25 1975-09-25 head control device

Country Status (1)

Country Link
JP (1) JPS5836431B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992482A (en) * 1982-11-16 1984-05-28 Seiichiro Sogo Sound recording card

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128058A (en) * 1981-09-30 1983-07-30 Mitsubishi Electric Corp Storage device
JP2510410B2 (en) * 1983-10-27 1996-06-26 パイオニア株式会社 Information selection device for disk player
JPS60177466A (en) * 1984-02-22 1985-09-11 Sharp Corp Control system of floppy disc drive
JPH07114067B2 (en) * 1986-07-03 1995-12-06 ティアツク株式会社 How to search for unrecorded track positions

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991625A (en) * 1972-12-22 1974-09-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991625A (en) * 1972-12-22 1974-09-02

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992482A (en) * 1982-11-16 1984-05-28 Seiichiro Sogo Sound recording card

Also Published As

Publication number Publication date
JPS5240111A (en) 1977-03-28

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